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hw/a9mpcore: Switch to using sysbus GIC
Switch the a9mpcore to using the sysbus GIC device ratherthan having the a9mp private memory region device subclassthe GIC.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm_gic: Move NCPU definition to arm_gic.c
Move the NCPU definition to arm_gic.c: the maximum numberof CPU interfaces is defined by the GIC architecture specificationto be 8, so we don't need to have this #define in each of thesources files which currently includes arm_gic.c....
hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
Move the gic_get_current_cpu() function into arm_gic.c.There are only two implementations: (1) "get the indexof the currently executing CPU", used by all multicoreGICs, and (2) "always 0", used by all GICs instantiated...
hw/arm_gic: Make the GIC its own sysbus device
Compile arm_gic.c as a standalone C file to produce a self containedsysbus GIC device. Support the legacy usage by #include of the .c fileby making those users #define LEGACY_INCLUDED_GIC, so we can convert...
qom: Unify type registration
Replace device_init() with generalized type_init().
While at it, unify naming convention: type_init([$prefix_]register_types)Also, type_init() is a function, so add preceding blank line wherenecessary and don't put a semicolon after the closing brace....
qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion. I did it in three steps and thenrebased it into a single step which avoids repeatedly touching every file inthe tree.
The first step was a sed-based addition of the parent type to the subclass...
sysbus: apic: ioapic: convert to QEMU Object Model
This converts three devices because apic and ioapic are subclasses of sysbus.Converting subclasses independently of their base class is prohibitively hard.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
arm: make the number of GIC interrupts configurable
Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,and create a configurable property for each defaulting to 96 and 64(respectively) so that device modelers can set the value appropriately...
arm: add missing scu registers
Add power control register to a9mpcore
Signed-off-by: Rob Herring <rob.herring@calxeda.com>Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/a9mpcore.c: Implement A9MP peripherals rather than 11MPcore ones
Implement the A9MP private peripheral region correctly, ratherthan piggybacking on the 11MPCore code; the two CPUs are not thesame in this area.
Correct spelling of licensed
Correct typos of "licenced" to "licensed".
Reviewed-by: Stefan Weil <weil@mail.berlios.de>Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de>Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ARM PBX-A9 board support
Implement ARM RealView PBX-A9 board support.
Signed-off-by: Paul Brook <paul@codesourcery.com>