History | View | Annotate | Download (17.5 kB)
hw/arm_gic: Remove the special casing of NCPU for the NVIC
Drop the special casing of NCPU=1 for the NVIC. This slightlyincreases the amount of memory used by its state structure,but removes some ifdeffery and means we can safely move theGIC state into a common subclass structure....
hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset
Move the NVIC specific bits of reset to the NVIC's ownreset function, rather than using ifdefs in the commonarm_gic reset.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers
Implement the NVIC specific register areas using a set ofoverlaid MemoryRegions in a container, rather than by havingthe arm_gic read/write functions use special purpose callbacks.
hw/arm_gic: Add qdev property for GIC revision
GIC behaviour can be different between revision 1 and2 of the architectural GIC specification; we also haveto handle the legacy 11MPCore GIC, which is differentagain in some places. Introduce a qdev property so we...
hw/arm_gic: Move CPU interface memory region setup into arm_gic_init
Remove more NVIC ifdefs by moving the code to setup the CPU interfacememory regions into the GIC specific arm_gic_init() function ratherthan the gic_init() function. Rename the latter to more closely...
hw/armv7m_nvic: Make the NVIC a freestanding class
Rearrange the GIC and NVIC so both are straightforwardsubclasses of a common class, rather than having the NVICsource file textually include arm_gic.c.
hw/arm_gic: Make gic_reset a sysbus reset function
Make gic_reset a sysbus reset function, so we actuallyreset the GIC on system reset rather than only at init.For the NVIC this requires us also to implement resetof the SysTick.
hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
Now all the A profile cores have been switched to use the standalonesysbus GIC, the only remaining code which #includes arm_gic.c isthe v7M NVIC. The coupling is much closer here so it's not so...
hw/arm_gic: Move NCPU definition to arm_gic.c
Move the NCPU definition to arm_gic.c: the maximum numberof CPU interfaces is defined by the GIC architecture specificationto be 8, so we don't need to have this #define in each of thesources files which currently includes arm_gic.c....
hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
Move the gic_get_current_cpu() function into arm_gic.c.There are only two implementations: (1) "get the indexof the currently executing CPU", used by all multicoreGICs, and (2) "always 0", used by all GICs instantiated...
hw/arm_gic: Make the GIC its own sysbus device
Compile arm_gic.c as a standalone C file to produce a self containedsysbus GIC device. Support the legacy usage by #include of the .c fileby making those users #define LEGACY_INCLUDED_GIC, so we can convert...
qom: Unify type registration
Replace device_init() with generalized type_init().
While at it, unify naming convention: type_init([$prefix_]register_types)Also, type_init() is a function, so add preceding blank line wherenecessary and don't put a semicolon after the closing brace....
qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion. I did it in three steps and thenrebased it into a single step which avoids repeatedly touching every file inthe tree.
The first step was a sed-based addition of the parent type to the subclass...
sysbus: apic: ioapic: convert to QEMU Object Model
This converts three devices because apic and ioapic are subclasses of sysbus.Converting subclasses independently of their base class is prohibitively hard.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
arm: make the number of GIC interrupts configurable
Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,and create a configurable property for each defaulting to 96 and 64(respectively) so that device modelers can set the value appropriately...
arm_gic: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Correct spelling of licensed
Correct typos of "licenced" to "licensed".
Reviewed-by: Stefan Weil <weil@mail.berlios.de>Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de>Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
vmstate: port armv7m nvic
Signed-off-by: Juan Quintela <quintela@redhat.com>
change all other clock references to use nanosecond resolution accessors
This was done with:
sed -i 's/qemu_get_clock\>/qemu_get_clock_ns/' \ $(git grep -l 'qemu_get_clock\>' ) sed -i 's/qemu_new_timer\>/qemu_new_timer_ns/' \ $(git grep -l 'qemu_new_timer\>' )...
savevm: Add DeviceState param
When available, we'd like to be able to access the DeviceStatewhen registering a savevm. For buses with a get_dev_path()function, this will allow us to create more unique savevmid strings.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>...
Fix missing '|' in '|=', spotted by clang analyzer
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
qdev: add return value to init() callbacks.
Sorry folks, but it has to be. One more of these invasive qdev patches.
We have a serious design bug in the qdev interface: device initcallbacks can't signal failure because the init() callback has noreturn value. This patch fixes it....
Remove ARM NVIC initialization hack
The ARMv7-M NVIC device pokes itself into the CPU state. Now we have aproper device model we can have the CPU/SoC code do this.
Signed-off-by: Paul Brook <paul@codesourcery.com>
ARM GIC qdev conversion
Replace cpu_abort with hw_error
Fix warnings that would be caused by ld flag --warn-common
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5240 c046a42c-6fe2-441c-8c8c-71466251a162
Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
Save/restore for stellaris boards.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4824 c046a42c-6fe2-441c-8c8c-71466251a162
Stellaris ethernet support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3728 c046a42c-6fe2-441c-8c8c-71466251a162
ARMv7-M SysTick fix.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3727 c046a42c-6fe2-441c-8c8c-71466251a162
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162