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1 | 87ecb68b | pbrook | #ifndef QEMU_PCI_H
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2 | 87ecb68b | pbrook | #define QEMU_PCI_H
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3 | 87ecb68b | pbrook | |
4 | 376253ec | aliguori | #include "qemu-common.h" |
5 | 163c8a59 | Luiz Capitulino | #include "qobject.h" |
6 | 376253ec | aliguori | |
7 | 6b1b92d3 | Paul Brook | #include "qdev.h" |
8 | 1e39101c | Avi Kivity | #include "memory.h" |
9 | 6b1b92d3 | Paul Brook | |
10 | 87ecb68b | pbrook | /* PCI includes legacy ISA access. */
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11 | 87ecb68b | pbrook | #include "isa.h" |
12 | 87ecb68b | pbrook | |
13 | 0428527c | Isaku Yamahata | #include "pcie.h" |
14 | 0428527c | Isaku Yamahata | |
15 | 87ecb68b | pbrook | /* PCI bus */
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16 | 87ecb68b | pbrook | |
17 | 3ae80618 | aliguori | #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) |
18 | 3ae80618 | aliguori | #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
19 | 3ae80618 | aliguori | #define PCI_FUNC(devfn) ((devfn) & 0x07) |
20 | 90a20dbb | Isaku Yamahata | #define PCI_SLOT_MAX 32 |
21 | 6fa84913 | Isaku Yamahata | #define PCI_FUNC_MAX 8 |
22 | 3ae80618 | aliguori | |
23 | a770dc7e | aliguori | /* Class, Vendor and Device IDs from Linux's pci_ids.h */
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24 | a770dc7e | aliguori | #include "pci_ids.h" |
25 | 173a543b | blueswir1 | |
26 | a770dc7e | aliguori | /* QEMU-specific Vendor and Device ID definitions */
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27 | 6f338c34 | aliguori | |
28 | a770dc7e | aliguori | /* IBM (0x1014) */
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29 | a770dc7e | aliguori | #define PCI_DEVICE_ID_IBM_440GX 0x027f |
30 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff |
31 | deb54399 | aliguori | |
32 | a770dc7e | aliguori | /* Hitachi (0x1054) */
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33 | deb54399 | aliguori | #define PCI_VENDOR_ID_HITACHI 0x1054 |
34 | a770dc7e | aliguori | #define PCI_DEVICE_ID_HITACHI_SH7751R 0x350e |
35 | deb54399 | aliguori | |
36 | a770dc7e | aliguori | /* Apple (0x106b) */
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37 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_343S1201 0x0010 |
38 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e |
39 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f |
40 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022 |
41 | a770dc7e | aliguori | #define PCI_DEVICE_ID_APPLE_IPID_USB 0x003f |
42 | deb54399 | aliguori | |
43 | a770dc7e | aliguori | /* Realtek (0x10ec) */
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44 | a770dc7e | aliguori | #define PCI_DEVICE_ID_REALTEK_8029 0x8029 |
45 | deb54399 | aliguori | |
46 | a770dc7e | aliguori | /* Xilinx (0x10ee) */
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47 | a770dc7e | aliguori | #define PCI_DEVICE_ID_XILINX_XC2VP30 0x0300 |
48 | deb54399 | aliguori | |
49 | a770dc7e | aliguori | /* Marvell (0x11ab) */
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50 | a770dc7e | aliguori | #define PCI_DEVICE_ID_MARVELL_GT6412X 0x4620 |
51 | deb54399 | aliguori | |
52 | a770dc7e | aliguori | /* QEMU/Bochs VGA (0x1234) */
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53 | 4ebcf884 | blueswir1 | #define PCI_VENDOR_ID_QEMU 0x1234 |
54 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_QEMU_VGA 0x1111 |
55 | 4ebcf884 | blueswir1 | |
56 | a770dc7e | aliguori | /* VMWare (0x15ad) */
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57 | deb54399 | aliguori | #define PCI_VENDOR_ID_VMWARE 0x15ad |
58 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 |
59 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 |
60 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_NET 0x0720 |
61 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SCSI 0x0730 |
62 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_IDE 0x1729 |
63 | deb54399 | aliguori | |
64 | cef3017c | aliguori | /* Intel (0x8086) */
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65 | a770dc7e | aliguori | #define PCI_DEVICE_ID_INTEL_82551IT 0x1209 |
66 | d6fd1e66 | Stefan Weil | #define PCI_DEVICE_ID_INTEL_82557 0x1229 |
67 | 1a5a86fb | Alexander Graf | #define PCI_DEVICE_ID_INTEL_82801IR 0x2922 |
68 | 74c62ba8 | aurel32 | |
69 | deb54399 | aliguori | /* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */
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70 | d350d97d | aliguori | #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 |
71 | d350d97d | aliguori | #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 |
72 | d350d97d | aliguori | #define PCI_SUBDEVICE_ID_QEMU 0x1100 |
73 | d350d97d | aliguori | |
74 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_NET 0x1000 |
75 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BLOCK 0x1001 |
76 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002 |
77 | 14d50bef | aliguori | #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003 |
78 | d350d97d | aliguori | |
79 | 4f8589e1 | Isaku Yamahata | #define FMT_PCIBUS PRIx64
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80 | 6e355d90 | Isaku Yamahata | |
81 | 87ecb68b | pbrook | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
82 | 87ecb68b | pbrook | uint32_t address, uint32_t data, int len);
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83 | 87ecb68b | pbrook | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
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84 | 87ecb68b | pbrook | uint32_t address, int len);
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85 | 87ecb68b | pbrook | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
86 | 6e355d90 | Isaku Yamahata | pcibus_t addr, pcibus_t size, int type);
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87 | 5851e08c | aliguori | typedef int PCIUnregisterFunc(PCIDevice *pci_dev); |
88 | 87ecb68b | pbrook | |
89 | 87ecb68b | pbrook | typedef struct PCIIORegion { |
90 | 6e355d90 | Isaku Yamahata | pcibus_t addr; /* current PCI mapping address. -1 means not mapped */
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91 | 6e355d90 | Isaku Yamahata | #define PCI_BAR_UNMAPPED (~(pcibus_t)0) |
92 | 6e355d90 | Isaku Yamahata | pcibus_t size; |
93 | a0c7a97e | Isaku Yamahata | pcibus_t filtered_size; |
94 | 87ecb68b | pbrook | uint8_t type; |
95 | 79ff8cb0 | Avi Kivity | MemoryRegion *memory; |
96 | 5968eca3 | Avi Kivity | MemoryRegion *address_space; |
97 | 87ecb68b | pbrook | } PCIIORegion; |
98 | 87ecb68b | pbrook | |
99 | 87ecb68b | pbrook | #define PCI_ROM_SLOT 6 |
100 | 87ecb68b | pbrook | #define PCI_NUM_REGIONS 7 |
101 | 87ecb68b | pbrook | |
102 | fb58a897 | Isaku Yamahata | #include "pci_regs.h" |
103 | fb58a897 | Isaku Yamahata | |
104 | fb58a897 | Isaku Yamahata | /* PCI HEADER_TYPE */
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105 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80 |
106 | 8098ed41 | aurel32 | |
107 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config header */
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108 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_HEADER_SIZE 0x40 |
109 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config space */
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110 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_SPACE_SIZE 0x100 |
111 | a9f49946 | Isaku Yamahata | /* Size of the standart PCIe config space: 4KB */
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112 | a9f49946 | Isaku Yamahata | #define PCIE_CONFIG_SPACE_SIZE 0x1000 |
113 | b7ee1603 | Michael S. Tsirkin | |
114 | e369cad7 | Isaku Yamahata | #define PCI_NUM_PINS 4 /* A-D */ |
115 | e369cad7 | Isaku Yamahata | |
116 | 02eb84d0 | Michael S. Tsirkin | /* Bits in cap_present field. */
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117 | 02eb84d0 | Michael S. Tsirkin | enum {
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118 | e4c7d2ae | Isaku Yamahata | QEMU_PCI_CAP_MSI = 0x1,
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119 | e4c7d2ae | Isaku Yamahata | QEMU_PCI_CAP_MSIX = 0x2,
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120 | e4c7d2ae | Isaku Yamahata | QEMU_PCI_CAP_EXPRESS = 0x4,
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121 | 49823868 | Isaku Yamahata | |
122 | 49823868 | Isaku Yamahata | /* multifunction capable device */
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123 | e4c7d2ae | Isaku Yamahata | #define QEMU_PCI_CAP_MULTIFUNCTION_BITNR 3 |
124 | 49823868 | Isaku Yamahata | QEMU_PCI_CAP_MULTIFUNCTION = (1 << QEMU_PCI_CAP_MULTIFUNCTION_BITNR),
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125 | b1aeb926 | Isaku Yamahata | |
126 | b1aeb926 | Isaku Yamahata | /* command register SERR bit enabled */
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127 | b1aeb926 | Isaku Yamahata | #define QEMU_PCI_CAP_SERR_BITNR 4 |
128 | b1aeb926 | Isaku Yamahata | QEMU_PCI_CAP_SERR = (1 << QEMU_PCI_CAP_SERR_BITNR),
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129 | 02eb84d0 | Michael S. Tsirkin | }; |
130 | 02eb84d0 | Michael S. Tsirkin | |
131 | 87ecb68b | pbrook | struct PCIDevice {
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132 | 6b1b92d3 | Paul Brook | DeviceState qdev; |
133 | 87ecb68b | pbrook | /* PCI config space */
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134 | a9f49946 | Isaku Yamahata | uint8_t *config; |
135 | b7ee1603 | Michael S. Tsirkin | |
136 | ebabb67a | Stefan Weil | /* Used to enable config checks on load. Note that writable bits are
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137 | bd4b65ee | Michael S. Tsirkin | * never checked even if set in cmask. */
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138 | a9f49946 | Isaku Yamahata | uint8_t *cmask; |
139 | bd4b65ee | Michael S. Tsirkin | |
140 | b7ee1603 | Michael S. Tsirkin | /* Used to implement R/W bytes */
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141 | a9f49946 | Isaku Yamahata | uint8_t *wmask; |
142 | 87ecb68b | pbrook | |
143 | 92ba5f51 | Isaku Yamahata | /* Used to implement RW1C(Write 1 to Clear) bytes */
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144 | 92ba5f51 | Isaku Yamahata | uint8_t *w1cmask; |
145 | 92ba5f51 | Isaku Yamahata | |
146 | 6f4cbd39 | Michael S. Tsirkin | /* Used to allocate config space for capabilities. */
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147 | a9f49946 | Isaku Yamahata | uint8_t *used; |
148 | 6f4cbd39 | Michael S. Tsirkin | |
149 | 87ecb68b | pbrook | /* the following fields are read only */
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150 | 87ecb68b | pbrook | PCIBus *bus; |
151 | 54586bd1 | Gerd Hoffmann | uint32_t devfn; |
152 | 87ecb68b | pbrook | char name[64]; |
153 | 87ecb68b | pbrook | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
154 | 87ecb68b | pbrook | |
155 | 87ecb68b | pbrook | /* do not access the following fields */
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156 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read; |
157 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write; |
158 | 87ecb68b | pbrook | |
159 | 87ecb68b | pbrook | /* IRQ objects for the INTA-INTD pins. */
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160 | 87ecb68b | pbrook | qemu_irq *irq; |
161 | 87ecb68b | pbrook | |
162 | 87ecb68b | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
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163 | d036bb21 | Michael S. Tsirkin | uint8_t irq_state; |
164 | 02eb84d0 | Michael S. Tsirkin | |
165 | 02eb84d0 | Michael S. Tsirkin | /* Capability bits */
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166 | 02eb84d0 | Michael S. Tsirkin | uint32_t cap_present; |
167 | 02eb84d0 | Michael S. Tsirkin | |
168 | 02eb84d0 | Michael S. Tsirkin | /* Offset of MSI-X capability in config space */
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169 | 02eb84d0 | Michael S. Tsirkin | uint8_t msix_cap; |
170 | 02eb84d0 | Michael S. Tsirkin | |
171 | 02eb84d0 | Michael S. Tsirkin | /* MSI-X entries */
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172 | 02eb84d0 | Michael S. Tsirkin | int msix_entries_nr;
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173 | 02eb84d0 | Michael S. Tsirkin | |
174 | 02eb84d0 | Michael S. Tsirkin | /* Space to store MSIX table */
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175 | 02eb84d0 | Michael S. Tsirkin | uint8_t *msix_table_page; |
176 | 02eb84d0 | Michael S. Tsirkin | /* MMIO index used to map MSIX table and pending bit entries. */
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177 | 95524ae8 | Avi Kivity | MemoryRegion msix_mmio; |
178 | 02eb84d0 | Michael S. Tsirkin | /* Reference-count for entries actually in use by driver. */
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179 | 02eb84d0 | Michael S. Tsirkin | unsigned *msix_entry_used;
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180 | 02eb84d0 | Michael S. Tsirkin | /* Region including the MSI-X table */
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181 | 02eb84d0 | Michael S. Tsirkin | uint32_t msix_bar_size; |
182 | f16c4abf | Juan Quintela | /* Version id needed for VMState */
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183 | f16c4abf | Juan Quintela | int32_t version_id; |
184 | c2039bd0 | Anthony Liguori | |
185 | e4c7d2ae | Isaku Yamahata | /* Offset of MSI capability in config space */
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186 | e4c7d2ae | Isaku Yamahata | uint8_t msi_cap; |
187 | e4c7d2ae | Isaku Yamahata | |
188 | 0428527c | Isaku Yamahata | /* PCI Express */
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189 | 0428527c | Isaku Yamahata | PCIExpressDevice exp; |
190 | 0428527c | Isaku Yamahata | |
191 | c2039bd0 | Anthony Liguori | /* Location of option rom */
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192 | 8c52c8f3 | Gerd Hoffmann | char *romfile;
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193 | 14caaf7f | Avi Kivity | bool has_rom;
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194 | 14caaf7f | Avi Kivity | MemoryRegion rom; |
195 | 88169ddf | Gerd Hoffmann | uint32_t rom_bar; |
196 | 87ecb68b | pbrook | }; |
197 | 87ecb68b | pbrook | |
198 | 87ecb68b | pbrook | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
199 | 87ecb68b | pbrook | int instance_size, int devfn, |
200 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read, |
201 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write); |
202 | 87ecb68b | pbrook | |
203 | e824b2cc | Avi Kivity | void pci_register_bar(PCIDevice *pci_dev, int region_num, |
204 | e824b2cc | Avi Kivity | uint8_t attr, MemoryRegion *memory); |
205 | 16a96f28 | Avi Kivity | pcibus_t pci_get_bar_addr(PCIDevice *pci_dev, int region_num);
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206 | 87ecb68b | pbrook | |
207 | ca77089d | Isaku Yamahata | int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
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208 | ca77089d | Isaku Yamahata | uint8_t offset, uint8_t size); |
209 | 6f4cbd39 | Michael S. Tsirkin | |
210 | 6f4cbd39 | Michael S. Tsirkin | void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
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211 | 6f4cbd39 | Michael S. Tsirkin | |
212 | 6f4cbd39 | Michael S. Tsirkin | void pci_reserve_capability(PCIDevice *pci_dev, uint8_t offset, uint8_t size);
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213 | 6f4cbd39 | Michael S. Tsirkin | |
214 | 6f4cbd39 | Michael S. Tsirkin | uint8_t pci_find_capability(PCIDevice *pci_dev, uint8_t cap_id); |
215 | 6f4cbd39 | Michael S. Tsirkin | |
216 | 6f4cbd39 | Michael S. Tsirkin | |
217 | 87ecb68b | pbrook | uint32_t pci_default_read_config(PCIDevice *d, |
218 | 87ecb68b | pbrook | uint32_t address, int len);
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219 | 87ecb68b | pbrook | void pci_default_write_config(PCIDevice *d,
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220 | 87ecb68b | pbrook | uint32_t address, uint32_t val, int len);
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221 | 87ecb68b | pbrook | void pci_device_save(PCIDevice *s, QEMUFile *f);
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222 | 87ecb68b | pbrook | int pci_device_load(PCIDevice *s, QEMUFile *f);
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223 | 87ecb68b | pbrook | |
224 | 5d4e84c8 | Juan Quintela | typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level); |
225 | 87ecb68b | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
226 | e927d487 | Michael S. Tsirkin | |
227 | e927d487 | Michael S. Tsirkin | typedef enum { |
228 | e927d487 | Michael S. Tsirkin | PCI_HOTPLUG_DISABLED, |
229 | e927d487 | Michael S. Tsirkin | PCI_HOTPLUG_ENABLED, |
230 | e927d487 | Michael S. Tsirkin | PCI_COLDPLUG_ENABLED, |
231 | e927d487 | Michael S. Tsirkin | } PCIHotplugState; |
232 | e927d487 | Michael S. Tsirkin | |
233 | e927d487 | Michael S. Tsirkin | typedef int (*pci_hotplug_fn)(DeviceState *qdev, PCIDevice *pci_dev, |
234 | e927d487 | Michael S. Tsirkin | PCIHotplugState state); |
235 | 21eea4b3 | Gerd Hoffmann | void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
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236 | 1e39101c | Avi Kivity | const char *name, |
237 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
238 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
239 | 1e39101c | Avi Kivity | uint8_t devfn_min); |
240 | 1e39101c | Avi Kivity | PCIBus *pci_bus_new(DeviceState *parent, const char *name, |
241 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
242 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
243 | aee97b84 | Avi Kivity | uint8_t devfn_min); |
244 | 21eea4b3 | Gerd Hoffmann | void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
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245 | 21eea4b3 | Gerd Hoffmann | void *irq_opaque, int nirq); |
246 | 9ddf8437 | Isaku Yamahata | int pci_bus_get_irq_level(PCIBus *bus, int irq_num); |
247 | 87c30546 | Isaku Yamahata | void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *dev);
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248 | 02e2da45 | Paul Brook | PCIBus *pci_register_bus(DeviceState *parent, const char *name, |
249 | 02e2da45 | Paul Brook | pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
250 | 1e39101c | Avi Kivity | void *irq_opaque,
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251 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
252 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
253 | 1e39101c | Avi Kivity | uint8_t devfn_min, int nirq);
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254 | 0ead87c8 | Isaku Yamahata | void pci_device_reset(PCIDevice *dev);
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255 | 9bb33586 | Isaku Yamahata | void pci_bus_reset(PCIBus *bus);
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256 | 87ecb68b | pbrook | |
257 | 2e01c8cf | Blue Swirl | void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base);
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258 | 2e01c8cf | Blue Swirl | |
259 | 5607c388 | Markus Armbruster | PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, |
260 | 5607c388 | Markus Armbruster | const char *default_devaddr); |
261 | 07caea31 | Markus Armbruster | PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char *default_model, |
262 | 07caea31 | Markus Armbruster | const char *default_devaddr); |
263 | 87ecb68b | pbrook | int pci_bus_num(PCIBus *s);
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264 | e822a52a | Isaku Yamahata | void pci_for_each_device(PCIBus *bus, int bus_num, void (*fn)(PCIBus *bus, PCIDevice *d)); |
265 | c469e1dd | Isaku Yamahata | PCIBus *pci_find_root_bus(int domain);
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266 | e075e788 | Isaku Yamahata | int pci_find_domain(const PCIBus *bus); |
267 | e822a52a | Isaku Yamahata | PCIBus *pci_find_bus(PCIBus *bus, int bus_num);
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268 | 5256d8bf | Isaku Yamahata | PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
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269 | f3006dd1 | Isaku Yamahata | int pci_qdev_find_device(const char *id, PCIDevice **pdev); |
270 | 49bd1458 | Markus Armbruster | PCIBus *pci_get_bus_devfn(int *devfnp, const char *devaddr); |
271 | 87ecb68b | pbrook | |
272 | 43c945f1 | Isaku Yamahata | int pci_parse_devaddr(const char *addr, int *domp, int *busp, |
273 | 43c945f1 | Isaku Yamahata | unsigned int *slotp, unsigned int *funcp); |
274 | e9283f8b | Jan Kiszka | int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp, |
275 | e9283f8b | Jan Kiszka | unsigned *slotp);
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276 | 880345c4 | aliguori | |
277 | 163c8a59 | Luiz Capitulino | void do_pci_info_print(Monitor *mon, const QObject *data); |
278 | 163c8a59 | Luiz Capitulino | void do_pci_info(Monitor *mon, QObject **ret_data);
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279 | 783753fd | Isaku Yamahata | void pci_bridge_update_mappings(PCIBus *b);
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280 | 87ecb68b | pbrook | |
281 | 4c92325b | Isaku Yamahata | void pci_device_deassert_intx(PCIDevice *dev);
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282 | 4c92325b | Isaku Yamahata | |
283 | deb54399 | aliguori | static inline void |
284 | 64d50b8b | Michael S. Tsirkin | pci_set_byte(uint8_t *config, uint8_t val) |
285 | 64d50b8b | Michael S. Tsirkin | { |
286 | 64d50b8b | Michael S. Tsirkin | *config = val; |
287 | 64d50b8b | Michael S. Tsirkin | } |
288 | 64d50b8b | Michael S. Tsirkin | |
289 | 64d50b8b | Michael S. Tsirkin | static inline uint8_t |
290 | cb95c2e4 | Stefan Weil | pci_get_byte(const uint8_t *config)
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291 | 64d50b8b | Michael S. Tsirkin | { |
292 | 64d50b8b | Michael S. Tsirkin | return *config;
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293 | 64d50b8b | Michael S. Tsirkin | } |
294 | 64d50b8b | Michael S. Tsirkin | |
295 | 64d50b8b | Michael S. Tsirkin | static inline void |
296 | 14e12559 | Michael S. Tsirkin | pci_set_word(uint8_t *config, uint16_t val) |
297 | 14e12559 | Michael S. Tsirkin | { |
298 | 14e12559 | Michael S. Tsirkin | cpu_to_le16wu((uint16_t *)config, val); |
299 | 14e12559 | Michael S. Tsirkin | } |
300 | 14e12559 | Michael S. Tsirkin | |
301 | 14e12559 | Michael S. Tsirkin | static inline uint16_t |
302 | cb95c2e4 | Stefan Weil | pci_get_word(const uint8_t *config)
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303 | 14e12559 | Michael S. Tsirkin | { |
304 | cb95c2e4 | Stefan Weil | return le16_to_cpupu((const uint16_t *)config); |
305 | 14e12559 | Michael S. Tsirkin | } |
306 | 14e12559 | Michael S. Tsirkin | |
307 | 14e12559 | Michael S. Tsirkin | static inline void |
308 | 14e12559 | Michael S. Tsirkin | pci_set_long(uint8_t *config, uint32_t val) |
309 | 14e12559 | Michael S. Tsirkin | { |
310 | 14e12559 | Michael S. Tsirkin | cpu_to_le32wu((uint32_t *)config, val); |
311 | 14e12559 | Michael S. Tsirkin | } |
312 | 14e12559 | Michael S. Tsirkin | |
313 | 14e12559 | Michael S. Tsirkin | static inline uint32_t |
314 | cb95c2e4 | Stefan Weil | pci_get_long(const uint8_t *config)
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315 | 14e12559 | Michael S. Tsirkin | { |
316 | cb95c2e4 | Stefan Weil | return le32_to_cpupu((const uint32_t *)config); |
317 | 14e12559 | Michael S. Tsirkin | } |
318 | 14e12559 | Michael S. Tsirkin | |
319 | 14e12559 | Michael S. Tsirkin | static inline void |
320 | fb5ce7d2 | Isaku Yamahata | pci_set_quad(uint8_t *config, uint64_t val) |
321 | fb5ce7d2 | Isaku Yamahata | { |
322 | fb5ce7d2 | Isaku Yamahata | cpu_to_le64w((uint64_t *)config, val); |
323 | fb5ce7d2 | Isaku Yamahata | } |
324 | fb5ce7d2 | Isaku Yamahata | |
325 | fb5ce7d2 | Isaku Yamahata | static inline uint64_t |
326 | cb95c2e4 | Stefan Weil | pci_get_quad(const uint8_t *config)
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327 | fb5ce7d2 | Isaku Yamahata | { |
328 | cb95c2e4 | Stefan Weil | return le64_to_cpup((const uint64_t *)config); |
329 | fb5ce7d2 | Isaku Yamahata | } |
330 | fb5ce7d2 | Isaku Yamahata | |
331 | fb5ce7d2 | Isaku Yamahata | static inline void |
332 | deb54399 | aliguori | pci_config_set_vendor_id(uint8_t *pci_config, uint16_t val) |
333 | deb54399 | aliguori | { |
334 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_VENDOR_ID], val); |
335 | deb54399 | aliguori | } |
336 | deb54399 | aliguori | |
337 | deb54399 | aliguori | static inline void |
338 | deb54399 | aliguori | pci_config_set_device_id(uint8_t *pci_config, uint16_t val) |
339 | deb54399 | aliguori | { |
340 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_DEVICE_ID], val); |
341 | deb54399 | aliguori | } |
342 | deb54399 | aliguori | |
343 | 173a543b | blueswir1 | static inline void |
344 | cf602c7b | Izik Eidus | pci_config_set_revision(uint8_t *pci_config, uint8_t val) |
345 | cf602c7b | Izik Eidus | { |
346 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_REVISION_ID], val); |
347 | cf602c7b | Izik Eidus | } |
348 | cf602c7b | Izik Eidus | |
349 | cf602c7b | Izik Eidus | static inline void |
350 | 173a543b | blueswir1 | pci_config_set_class(uint8_t *pci_config, uint16_t val) |
351 | 173a543b | blueswir1 | { |
352 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_CLASS_DEVICE], val); |
353 | 173a543b | blueswir1 | } |
354 | 173a543b | blueswir1 | |
355 | cf602c7b | Izik Eidus | static inline void |
356 | cf602c7b | Izik Eidus | pci_config_set_prog_interface(uint8_t *pci_config, uint8_t val) |
357 | cf602c7b | Izik Eidus | { |
358 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_CLASS_PROG], val); |
359 | cf602c7b | Izik Eidus | } |
360 | cf602c7b | Izik Eidus | |
361 | cf602c7b | Izik Eidus | static inline void |
362 | cf602c7b | Izik Eidus | pci_config_set_interrupt_pin(uint8_t *pci_config, uint8_t val) |
363 | cf602c7b | Izik Eidus | { |
364 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_INTERRUPT_PIN], val); |
365 | cf602c7b | Izik Eidus | } |
366 | cf602c7b | Izik Eidus | |
367 | aabcf526 | Isaku Yamahata | /*
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368 | aabcf526 | Isaku Yamahata | * helper functions to do bit mask operation on configuration space.
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369 | aabcf526 | Isaku Yamahata | * Just to set bit, use test-and-set and discard returned value.
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370 | aabcf526 | Isaku Yamahata | * Just to clear bit, use test-and-clear and discard returned value.
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371 | aabcf526 | Isaku Yamahata | * NOTE: They aren't atomic.
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372 | aabcf526 | Isaku Yamahata | */
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373 | aabcf526 | Isaku Yamahata | static inline uint8_t |
374 | aabcf526 | Isaku Yamahata | pci_byte_test_and_clear_mask(uint8_t *config, uint8_t mask) |
375 | aabcf526 | Isaku Yamahata | { |
376 | aabcf526 | Isaku Yamahata | uint8_t val = pci_get_byte(config); |
377 | aabcf526 | Isaku Yamahata | pci_set_byte(config, val & ~mask); |
378 | aabcf526 | Isaku Yamahata | return val & mask;
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379 | aabcf526 | Isaku Yamahata | } |
380 | aabcf526 | Isaku Yamahata | |
381 | aabcf526 | Isaku Yamahata | static inline uint8_t |
382 | aabcf526 | Isaku Yamahata | pci_byte_test_and_set_mask(uint8_t *config, uint8_t mask) |
383 | aabcf526 | Isaku Yamahata | { |
384 | aabcf526 | Isaku Yamahata | uint8_t val = pci_get_byte(config); |
385 | aabcf526 | Isaku Yamahata | pci_set_byte(config, val | mask); |
386 | aabcf526 | Isaku Yamahata | return val & mask;
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387 | aabcf526 | Isaku Yamahata | } |
388 | aabcf526 | Isaku Yamahata | |
389 | aabcf526 | Isaku Yamahata | static inline uint16_t |
390 | aabcf526 | Isaku Yamahata | pci_word_test_and_clear_mask(uint8_t *config, uint16_t mask) |
391 | aabcf526 | Isaku Yamahata | { |
392 | aabcf526 | Isaku Yamahata | uint16_t val = pci_get_word(config); |
393 | aabcf526 | Isaku Yamahata | pci_set_word(config, val & ~mask); |
394 | aabcf526 | Isaku Yamahata | return val & mask;
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395 | aabcf526 | Isaku Yamahata | } |
396 | aabcf526 | Isaku Yamahata | |
397 | aabcf526 | Isaku Yamahata | static inline uint16_t |
398 | aabcf526 | Isaku Yamahata | pci_word_test_and_set_mask(uint8_t *config, uint16_t mask) |
399 | aabcf526 | Isaku Yamahata | { |
400 | aabcf526 | Isaku Yamahata | uint16_t val = pci_get_word(config); |
401 | aabcf526 | Isaku Yamahata | pci_set_word(config, val | mask); |
402 | aabcf526 | Isaku Yamahata | return val & mask;
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403 | aabcf526 | Isaku Yamahata | } |
404 | aabcf526 | Isaku Yamahata | |
405 | aabcf526 | Isaku Yamahata | static inline uint32_t |
406 | aabcf526 | Isaku Yamahata | pci_long_test_and_clear_mask(uint8_t *config, uint32_t mask) |
407 | aabcf526 | Isaku Yamahata | { |
408 | aabcf526 | Isaku Yamahata | uint32_t val = pci_get_long(config); |
409 | aabcf526 | Isaku Yamahata | pci_set_long(config, val & ~mask); |
410 | aabcf526 | Isaku Yamahata | return val & mask;
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411 | aabcf526 | Isaku Yamahata | } |
412 | aabcf526 | Isaku Yamahata | |
413 | aabcf526 | Isaku Yamahata | static inline uint32_t |
414 | aabcf526 | Isaku Yamahata | pci_long_test_and_set_mask(uint8_t *config, uint32_t mask) |
415 | aabcf526 | Isaku Yamahata | { |
416 | aabcf526 | Isaku Yamahata | uint32_t val = pci_get_long(config); |
417 | aabcf526 | Isaku Yamahata | pci_set_long(config, val | mask); |
418 | aabcf526 | Isaku Yamahata | return val & mask;
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419 | aabcf526 | Isaku Yamahata | } |
420 | aabcf526 | Isaku Yamahata | |
421 | aabcf526 | Isaku Yamahata | static inline uint64_t |
422 | aabcf526 | Isaku Yamahata | pci_quad_test_and_clear_mask(uint8_t *config, uint64_t mask) |
423 | aabcf526 | Isaku Yamahata | { |
424 | aabcf526 | Isaku Yamahata | uint64_t val = pci_get_quad(config); |
425 | aabcf526 | Isaku Yamahata | pci_set_quad(config, val & ~mask); |
426 | aabcf526 | Isaku Yamahata | return val & mask;
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427 | aabcf526 | Isaku Yamahata | } |
428 | aabcf526 | Isaku Yamahata | |
429 | aabcf526 | Isaku Yamahata | static inline uint64_t |
430 | aabcf526 | Isaku Yamahata | pci_quad_test_and_set_mask(uint8_t *config, uint64_t mask) |
431 | aabcf526 | Isaku Yamahata | { |
432 | aabcf526 | Isaku Yamahata | uint64_t val = pci_get_quad(config); |
433 | aabcf526 | Isaku Yamahata | pci_set_quad(config, val | mask); |
434 | aabcf526 | Isaku Yamahata | return val & mask;
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435 | aabcf526 | Isaku Yamahata | } |
436 | aabcf526 | Isaku Yamahata | |
437 | 81a322d4 | Gerd Hoffmann | typedef int (*pci_qdev_initfn)(PCIDevice *dev); |
438 | 0aab0d3a | Gerd Hoffmann | typedef struct { |
439 | 0aab0d3a | Gerd Hoffmann | DeviceInfo qdev; |
440 | 0aab0d3a | Gerd Hoffmann | pci_qdev_initfn init; |
441 | e3936fa5 | Gerd Hoffmann | PCIUnregisterFunc *exit; |
442 | 0aab0d3a | Gerd Hoffmann | PCIConfigReadFunc *config_read; |
443 | 0aab0d3a | Gerd Hoffmann | PCIConfigWriteFunc *config_write; |
444 | a9f49946 | Isaku Yamahata | |
445 | 113f89df | Isaku Yamahata | uint16_t vendor_id; |
446 | 113f89df | Isaku Yamahata | uint16_t device_id; |
447 | 113f89df | Isaku Yamahata | uint8_t revision; |
448 | 113f89df | Isaku Yamahata | uint16_t class_id; |
449 | 113f89df | Isaku Yamahata | uint16_t subsystem_vendor_id; /* only for header type = 0 */
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450 | 113f89df | Isaku Yamahata | uint16_t subsystem_id; /* only for header type = 0 */
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451 | 113f89df | Isaku Yamahata | |
452 | e327e323 | Isaku Yamahata | /*
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453 | e327e323 | Isaku Yamahata | * pci-to-pci bridge or normal device.
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454 | e327e323 | Isaku Yamahata | * This doesn't mean pci host switch.
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455 | e327e323 | Isaku Yamahata | * When card bus bridge is supported, this would be enhanced.
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456 | e327e323 | Isaku Yamahata | */
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457 | e327e323 | Isaku Yamahata | int is_bridge;
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458 | fb231628 | Isaku Yamahata | |
459 | a9f49946 | Isaku Yamahata | /* pcie stuff */
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460 | 3c217c14 | Isaku Yamahata | int is_express; /* is this device pci express? */ |
461 | 8c52c8f3 | Gerd Hoffmann | |
462 | 180c22e1 | Gerd Hoffmann | /* device isn't hot-pluggable */
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463 | 180c22e1 | Gerd Hoffmann | int no_hotplug;
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464 | 180c22e1 | Gerd Hoffmann | |
465 | 8c52c8f3 | Gerd Hoffmann | /* rom bar */
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466 | 8c52c8f3 | Gerd Hoffmann | const char *romfile; |
467 | 0aab0d3a | Gerd Hoffmann | } PCIDeviceInfo; |
468 | 0aab0d3a | Gerd Hoffmann | |
469 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register(PCIDeviceInfo *info);
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470 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register_many(PCIDeviceInfo *info);
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471 | 6b1b92d3 | Paul Brook | |
472 | 49823868 | Isaku Yamahata | PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunction, |
473 | 49823868 | Isaku Yamahata | const char *name); |
474 | 49823868 | Isaku Yamahata | PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
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475 | 49823868 | Isaku Yamahata | bool multifunction,
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476 | 49823868 | Isaku Yamahata | const char *name); |
477 | 7cc050b1 | Blue Swirl | PCIDevice *pci_try_create_multifunction(PCIBus *bus, int devfn,
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478 | 7cc050b1 | Blue Swirl | bool multifunction,
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479 | 7cc050b1 | Blue Swirl | const char *name); |
480 | 499cf102 | Markus Armbruster | PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); |
481 | 6b1b92d3 | Paul Brook | PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); |
482 | 7cc050b1 | Blue Swirl | PCIDevice *pci_try_create(PCIBus *bus, int devfn, const char *name); |
483 | 6b1b92d3 | Paul Brook | |
484 | 3c18685f | Isaku Yamahata | static inline int pci_is_express(const PCIDevice *d) |
485 | a9f49946 | Isaku Yamahata | { |
486 | a9f49946 | Isaku Yamahata | return d->cap_present & QEMU_PCI_CAP_EXPRESS;
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487 | a9f49946 | Isaku Yamahata | } |
488 | a9f49946 | Isaku Yamahata | |
489 | 3c18685f | Isaku Yamahata | static inline uint32_t pci_config_size(const PCIDevice *d) |
490 | a9f49946 | Isaku Yamahata | { |
491 | a9f49946 | Isaku Yamahata | return pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE;
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492 | a9f49946 | Isaku Yamahata | } |
493 | a9f49946 | Isaku Yamahata | |
494 | 87ecb68b | pbrook | #endif |