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Revision 8098ed41

ID8098ed414ada4265f646e94d65eca063b3689f50

Added by aurel32 over 12 years ago

PCI: Mask writes to RO bits in the status reg of PCI config space

The Status register in the PCI config space has some read-only bits.
Any writes to those bits should be masked out.

Signed-off-by: Amit Shah <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6091 c046a42c-6fe2-441c-8c8c-71466251a162

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