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cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helperscpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd()....
cpu: Drop unnecessary dynamic casts in *_env_get_cpu()
A transition from CPUFooState to FooCPU can be considered safe,just like FooCPU::env access in the opposite direction.The only benefit of the FOO_CPU() casts would be protection againstbogus CPUFooState pointers, but then surrounding code would likely...
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
Make cpustats monitor command available unconditionally.
Prepares for changing kvm_handle_internal_error() and kvm_cpu_exec()arguments to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
target-arm: Convert TCG to using (index,value) list for cp migration
Convert the TCG ARM target to using an (index,value) list for migratingcoprocessors. The primary benefit of the (index,value) list is forpassing state between KVM and QEMU, but it works for TCG-to-TCG...
target-arm: Reinitialize all KVM VCPU registers on reset
Since the ARM KVM API doesn't include a "reset this VCPU" ioctl, we have to capture the initial values of everyregister it knows about so that we can reset the VCPUby feeding those values back again....
target-arm: port ARM CPU save/load to use VMState
Port the ARM CPU save/load code to use VMState. Some state issaved in a slightly different order to simplify things -- forexample arrays are saved one after the other rather than 'striped',and we always save all 32 VFP registers even if the CPU happens...
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one stepcloser to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU...
target-arm: Override do_interrupt for ARMv7-M profile
Enable ARMCPUInfo to specify a custom class_init functions.Introduce arm_v7m_class_init() and use it for "cortex-m3" model.
Instead of forwarding from arm_cpu_do_interrupt() to do_interrupt_v7m(),override CPUClass::do_interrupt with arm_v7m_cpu_do_interrupt()...
cpu: Introduce ENV_OFFSET macros
Introduce ENV_OFFSET macros which can be used in non-target-specificcode that needs to generate TCG instructions which reference CPUStatefields given the cpu_env register that TCG targets set up with apointer to the CPUArchState struct....
target-arm: Update ARMCPU to QOM realizefn
Turn arm_cpu_realize() into a QOM realize function, no longer calledvia cpu.h prototype. To maintain the semantics of cpu_init(), setrealized = true explicitly in cpu_arm_init().
Move GDB coprocessor registration, CPU reset and vCPU initialization...
qom: move include files to include/qom/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target-arm: Convert cp15 crn=1 registers
Convert the cp15 crn=1 registers to the new scheme.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Add register_cp_regs_for_features()
Add new function register_cp_regs_for_features() as a place toregister coprocessor registers dependent on feature flags.
target-arm: initial coprocessor register framework
Initial infrastructure for data-driven registration ofcoprocessor register implementations.
We still fall back to the old-style switch statements pendingcomplete conversion of all existing registers....
target-arm: Move A9 config_base_address reset value to ARMCPU
Move the A9 config_base_address cp15 register reset value toARMCPU. This should become a QOM property so that the Highbankboard can set it without having to pull in cpu-qom.h, but atleast this avoids the implicit dependency on reset ordering...
target-arm: Change cpu_arm_init() return type to ARMCPU
Make cpu_arm_init() return a QOM ARMCPU, so that we don't need toobtain an ARMCPU through arm_env_get_cpu() in machine init code.This requires to adjust the inclusion site of cpu-qom.h and in turn,...
target-arm: Move cache ID register setup to cpu specific init fns
Move cache ID register reset out of cpu_reset_model_id() bycreating a field for the reset value in ARMCPU and setting itup in the cpu specific init functions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
target-arm: Move feature register setup to per-CPU init fns
Move feature register value setup to per-CPU init functions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Acked-by: Andreas Färber <afaerber@suse.de>
target-arm: Move SCTLR reset value setup to per cpu init fns
Move the reset value of SCTLR to ARMCPU, initialised inthe per-cpu init functions. It can then be reset by asimple copy, and we can drop the code from cpu_reset_model_id().
target-arm: Move CTR setup to per cpu init fns
Move CTR (cache type register) value to an ARMCPU fieldset up by per-cpu init fns.
target-arm: Move MVFR* setup to per cpu init fns
Move the MVFR* VFP feature register values to ARMCPU,so they are set up by the implementation-specific instanceinit functions rather than in cpu_reset_model_id().
target-arm: Move FPSID config to cpu init fns
Move the reset FPSID to the ARMCPU struct, and set it in theper-implementation instance init function. At reset we thenjust copy the reset value into the CPUARMState field.
target-arm: Move feature bit settings to CPU init fns
Move the setting of the feature bits from cpu_reset_model_id()to each CPU's instance init function. This requires us to movethe features field in CPUARMState so that it is not clearedon reset.
target-arm: Add QOM subclasses for each ARM cpu implementation
Register subclasses for each ARM CPU implementation.
Let arm_cpu_list() enumerate CPU subclasses in alphabetical order,except for special value "any".
Replace cpu_arm_find_by_name()'s string -> CPUID lookup by storing the...
target-arm: Minimalistic CPU QOM'ification
Introduce only one non-abstract type TYPE_ARM_CPU and do not touchcp15 registers to not interfere with Peter's ongoing remodelling.Embed CPUARMState as first (additional) field of ARMCPU.
Let CPUClass::reset() call cpu_state_reset() for now....