History | View | Annotate | Download (8.1 kB)
PPC: Fix dcbz for linux-user on 970
The default with linux-user for dcbz on 970 is to emulate 32 byte clears.However, redoing the dcbzl support we added a check to not honor the bitin HID5 that sets this.
Remove the #ifdef check on linux user, so that we get 32 byte clears again....
target-ppc: Move ppc tlb_fill implementation into mmu_helper.c
For softmmu builds the interface from the generic code to the targetspecific MMU implementation is through the tlb_fill() function. For ppcthis is currently in mem_helper.c, whereas it would make more sense in...
PPC: Unify dcbzl code path
The bit that makes a dcbz instruction a dcbzl instruction was declared asreserved in ppc32 ISAs. However, hardware simply ignores the bit, makingcode valid if it simply invokes dcbzl instead of dcbz even on 750 and G4.
Thus, mark the bit as unreserved so that we properly emulate a simple dcbz...
misc: move include files to include/qemu/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
exec: move include files to include/exec/
exec: refactor cpu_restore_state
Refactor common code around calls to cpu_restore_state().
tb_find_pc() has now no external users, make it static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
PPC: Add support for MSR_CM
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG tosupport running 64bit code with MSR_CM set.
Signed-off-by: Alexander Graf <agraf@suse.de>
ppc: Move load and store helpers, switch to AREG0 free mode
Add an explicit CPUPPCState parameter instead of relying on AREG0and rename op_helper.c (which only contains load and store helpers)to mem_helper.c. Remove AREG0 swapping intlb_fill().
Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation...