tcg: Add qemu_ld_st_i32/64
Step two in the transition, adding the new ldst opcodes. Keep the oldopcodes around until all backends support the new opcodes.
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg: Add tcg-be-ldst.h
Move TCGLabelQemuLdst and related stuff out of tcg.h.
tcg-ppc64: Implement CONFIG_QEMU_LDST_OPTIMIZATION
tcg-ppc64: Fold constant call address into descriptor load
Eliminates one insn per call:
: lis r2,4165: ori r2,r2,59616: ld r0,0(r2): ld r0,-5920(r2) : mtctr r0-: ld r2,8(r2): ld r2,-5912(r2) : bctrl
tcg-ppc64: Look through a constant function descriptor
Especially in the user-only configurations, a direct branch intothe executable may be in range.
tcg-ppc64: Tidy register allocation order
Remove conditionalization from tcg_target_reg_alloc_order, relying onreserved_regs to prevent register allocation that shouldn't happen.So R11 is now present in reg_alloc_order for APPLE, but also nowreserved....
tcg-ppc64: Handle long offsets better
Previously we'd only handle 16-bit offsets from memory operand without fallingback to indexed, but it's easy to use ADDIS to handle full 32-bit offsets.
This also lets us unify code that existed inline in tcg_out_op for handling...
tcg-ppc64: Implement tcg_register_jit
tcg-ppc64: Streamline tcg_out_tlb_read
Less conditional compilation. Merge an add insn with the indexedmemory load insn. Load the tlb addend earlier. Avoid the addressupdate memory form.
Fix a bug in not allowing large enough tlb offsets for some guests....
tcg-ppc64: Add _noaddr functions for emitting forward branches
... rather than open-coding this stuff through the file.
View revisions
Also available in: Atom