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i386: wire up MSR_IA32_MISC_ENABLE
It's needed for its default value - bit 0 specifies that "rep movs" isgood enough for memcpy, and Linux may use a slower memcpu if it is not set,depending on cpu family/model.
Signed-off-by: Avi Kivity <avi@redhat.com>...
softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture localcpu_single_env hacks.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
x86: fix daa opcode for al register values higher than 0xf9
The second if statement should consider the original al register value,and not the new one.
Signed-off-by: Boris Figovsky <boris.figovksy@ravellosystems.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.
x86: use caller supplied CPUState for interrupt related stuff
Several x86 specific functions are called from cpu-exec.c with theassumption that global env register is valid. This will be changedlater, so make the functions use caller supplied CPUState parameter....
cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relyingon global env.
target-i386: use floatx80 constants in helper_fld*_ST0()
Instead of using a table which doesn't correspond to anything fromphysical in the CPU, use directly the constants in helper_fld*_ST0().
Cc: Andreas Färber <andreas.faerber@web.de>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-i386: remove old code handling float64
Now that target-i386 uses softfloat, floatx80 is always available andthere is no need anymore to have code handling both float64 and floax80.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: fix helper_fscale() wrt softfloat
Use the scalbn softfloat function to implement helper_fscale(). Thisfixes corner cases (e.g. NaN) and makes a few more GNU libc math teststo pass.
target-i386: fix helper_fbld_ST0() wrt softfloat
target-i386: fix helper_fxtract() wrt softfloat
With softfloat it's not possible to play with the overflow of anunsigned value to get the 0 case partially correct. Use a special casefor that. Using a division to generate an infinity is the easiest waythat works for both softfloat and softfloat-native....
target-i386: fix helper_fdiv() wrt softfloat
target-i386: fix helper_fsqrt() wrt softfloat
target-i386: replace approx_rsqrt and approx_rcp by softfloat ops
target-i386: add CPU86_LDouble <-> double conversion functions
Add functions to convert CPU86_LDouble to double and vice versa. Theyare going to be used to implement logarithmic and trigonometric functionuntil softfloat implement them.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-i386: fix logarithmic and trigonometric helpers wrt softfloat
Use the new CPU86_LDouble <-> double conversion functions to make logarithmicand trigonometric helpers working with softfloat.
target-i386: fix helper_fprem() and helper_fprem1() wrt softfloat
target-i386: fix constants wrt softfloat
Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.Is is now unused, so remove it.
Cc: Aurelien Jarno <aurelien@aurel32.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Weil <weil@mail.berlios.de>
target-i386: add floatx_{add,mul,sub} and use them
Add floatx_{add,mul,sub} defines, and use them instead of using directC operations.
i386: avoid a write only variable
Compiling with GCC 4.6.0 20100925 produced warnings:/src/qemu/target-i386/op_helper.c: In function 'switch_tss':/src/qemu/target-i386/op_helper.c:283:53: error: variable 'new_trap' set but not used [-Werror=unused-but-set-variable]...
target-i386: svm: Fix MSRPM check
Correct the calculation of the offset in the msrpmfor the MSR range 0 - 0x1fff.
Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
remove unused stuff from */exec.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
x86: svm: Always clear event_inj on vmexit
We currently only clear SVM_EVTINJ_VALID after successful interruptdelivery. This apparently does not match real hardware which clears thewhole event_inj field on every vmexit, including unsuccessful interrupt...
apic: avoid passing CPUState from CPU code
Pass only APICState when accessing APIC from CPU code.
target-i386: Fix variable in (disabled) debugging code
Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Move ioport.h out of cpu-all.h
Only include ioport.h where it is actually needed.
Signed-off-by: Paul Brook <paul@codesourcery.com>
target-i386: fix crash on x86 32bit linux host with hw breakpoint exceptions
If you make use of hw breakpoints on a 32bit x86 linux host, qemuwill segmentation fault when processing the exception.
The problem is that the value of env is stored in $ebp in the op_helper...
target-i386: implement lzcnt emulation
lzcnt is a AMD Phenom/Barcelona added instruction returning thenumber of leading zero bits in a word.As this is similar to the "bsr" instruction, reuse the existingcode. There need to be some more changes, though, as lzcnt always...
target-i386: Fix exceptions for fxsave/fxrstor
This patch corrects the following aspects of exception generation infxsave/fxrstor:
target-i386: add RDTSCP support
RDTSCP reads the time stamp counter and atomically also the contentof a 32-bit MSR, which can be freely set by the OS. This allows CPUlocal data to be queried by userspace.Linux uses this to allow a fast implementation of the getcpu()...
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
ioports: remove unused env parameter and compile only once
The CPU state parameter is not used, remove it and adjust callers. Now wecan compile ioport.c once for all targets.
Unbreak large mem support by removing kqemu
kqemu introduces a number of restrictions on the i386 target. The worst is thatit prevents large memory from working in the default build.
Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on...
Update to a hopefully more future proof FSF address
QEMU: MCE: Add MCE simulation to qemu/tcg
- MCE features are initialized when VCPU is intialized according to CPUID.- A monitor command "mce" is added to inject a MCE.- A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE.
aliguori: fix build for linux-user...
x86: Add support for resume flag
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Fix i386-linux-user build (Laurent Desnogues)
This broke due to r7230.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7233 c046a42c-6fe2-441c-8c8c-71466251a162
put valid data into exit_int_info if needed (Gleb Natapov)
If fault happened during event delivery exit_int_info should containvalid info about the event on vm exit.
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
kqemu: merge CONFIG_KQEMU and USE_KQEMU
Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g".
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Add NULL check to lsl (Jan Kiszka)
According to the Intel specs, lsl performs a check against NULL for theprovided selector, just like lar does. helper_lar() includes thecorresponding code, helper_lsl() was lacking it so far.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
x86: use qemu_log_mask on triple faults (Chris Wright)
replace open coded qemu_log_mask with proper macro
Signed-off-by: Chris Wright <chrisw@sous-sol.org>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6649 c046a42c-6fe2-441c-8c8c-71466251a162
KVM: CPUID takes ecx as input value for some functions (Amit Shah)
The CPUID instruction takes the value of ECX as an input parameterin addition to the value of EAX as the count for functions 4, 0xband 0xd. Make sure we pass the value to the instruction....
Implement FFXSR (Alexander Graf)
Newer AMD CPUs have the FFXSR capability. This leaves out XMMregister in FXSAVE/FXRESTORE when in CPL=0 and 64-bit mode.
This is required for Hyper-V.
Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Replace noreturn with QEMU_NORETURN
Thanks to Robert Riebisch for analysis [1]
[1] http://marc.info/?l=qemu-devel&m=123352293319271&w=2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6492 c046a42c-6fe2-441c-8c8c-71466251a162
Use new logging API in reset handling (Jan Kiszka)
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6473 c046a42c-6fe2-441c-8c8c-71466251a162
MTRR support on x86, part 2 (Carl-Daniel Hailfinger)
Load and save MTRR state together with machine state.
Add support for the MTRRcap MSR which is used by the latest Bochs BIOSand some operating systems.
Fix a typo in ext2_feature_name.
With this patch, MTRR emulation should be good enough to not trigger any...
x86: Issue reset on triple faults (Jan Kiszka)
As discussed a few times on this list: A triple fault causes a systemreset on x86, and some guests make use of this (e.g. 386BSD). To keepthe chance of tracing unexpected resets, log them if CPU_LOG_RESET is...
MTRR support on x86 (Carl-Daniel Hailfinger)
The current codebase ignores MTRR (Memory Type Range Register)configuration writes and reads because Qemu does not implement caching.All BIOS/firmware in know of for x86 do implement a mode calledCache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU...
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevelglobal variables to use the new qemu_log*() macros.
Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.
This patch doesn't try to merge logging macros from different files,but just unify the debugging code #ifdefs onto a macro on each file. Afurther cleanup can unify the debugging macros on a common header, later...
Suppress i386 warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6304 c046a42c-6fe2-441c-8c8c-71466251a162
Add noreturn function attribute
Introduce noreturn attribute and attach it to cpu_loop_exit as well asinterrupt/exception helpers for i386. This avoids a bunch of gcc4warnings.
[ Note that this patch comes with a workaround to include qemu-common.heven in cases where is currently causes conflicts with dyngen-exec.h....
Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplatein most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
x86 cleanup
Remove some unnecessary includes, add needed includes, move prototypes tocpu.h to suppress missing prototype warnings.
Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock,cpu_unlock, restore_native_fp_state, save_native_fp_state)....
Remove FORCE_RET() and RETURN
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5923 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Debug register emulation (Jan Kiszka)
Built on top of previously enhanced breakpoint/watchpoint support, thispatch adds full debug register emulation for the x86 architecture.
Many corner cases were considered, and the result was successfullytested inside a Linux guest with gdb, but I won't be surprised if one...
TCG variable type checking.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
Split CPUID from op_helper
KVM needs to call CPUID from outside of the TCG code. This patchsplits out the CPUID logic into a separate helper that both the ophelper and KVM can call.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5626 c046a42c-6fe2-441c-8c8c-71466251a162
Fix undeclared symbol warnings from sparse
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
i386/SVM: return amount of ASIDs
With SVM the TLB supports tagging to distinguish TLB entries fromdifferent virtual CPUs. This tag is called an ASID. The amount of ASIDs isgiven in EBX of the SVM-CPUID-leaf. Currently we return 0, which mightbreak hypervisors. Let's better return something >0 here, say 0x10....
target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried toresemble the original as closely as possible and document what featuresare missing still. This patch enables the use of a recent CPU definitionon 32 bit platforms....
Do not use load_seg_vm to load CS in real mode iret handling
load_seg_vm calls cpu_x86_load_seg_cache which updates hflags ofcurrent env, real hardware doesn't do this, nor the code that handlesreal mode lret/lcall/ljmp.
This unbreaks "unreal mode" and makes QEMU the first emulator being...
Handle MSR_IA32_PERF_STATUS in rdmsr (Alexander Graf).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5366 c046a42c-6fe2-441c-8c8c-71466251a162
My core2duo patch introduced a vague statement of "missing features" inthe CPUID specification. This patch addresses this by specifying exactlywhat is missing.While going along the missing CPUID entries I also stumbled acrossinvalid and missing CPUID #defines while comparing them to the Intel...
SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).
On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patchmakes both 64-bit aware and enables them for Intel CPUs.Add cpu save/load for 64-bit wide sysenter variables.
Signed-off-by: Alexander Graf <agraf@suse.de>...
Core 2 Duo specification (Alexander Graf).
This patch adds a Core 2 Duo CPU to the available CPU types. The CPUdefinition tries to resemble a real CPU as good as possible, whilst notexposing features qemu does not implement.The patch also includes some minor additions that Core 2 Duo CPUs have:...
Fix up pxe boot (Glauber Costa)
As discussed inhttp://lists.gnu.org/archive/html/qemu-devel/2008-08/msg00667.html,current pxe boot is broken for some use cases. The problemgoes away if we reduce the number of allowed bits in the address spaceto 32 (which has the side effect of reducing guest max mem size to 4Gb)....
Fix most warnings that would be caused by gcc flag -Wundef
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5173 c046a42c-6fe2-441c-8c8c-71466251a162
cmpxchg fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4755 c046a42c-6fe2-441c-8c8c-71466251a162
HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4746 c046a42c-6fe2-441c-8c8c-71466251a162
SVM: Fix segment attribute clobbering (Alexander Graf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4716 c046a42c-6fe2-441c-8c8c-71466251a162
SVM: added tsc_offset
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4668 c046a42c-6fe2-441c-8c8c-71466251a162
GIF flag handling fix (Alexander Graf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4663 c046a42c-6fe2-441c-8c8c-71466251a162
reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
32 bit SVM fixes - INVLPG and INVLPGA updates
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4660 c046a42c-6fe2-441c-8c8c-71466251a162
EFER loading fixes, including SVME bit
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4659 c046a42c-6fe2-441c-8c8c-71466251a162
Spelling fixes, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4655 c046a42c-6fe2-441c-8c8c-71466251a162
kqemu API change - allow use of kqemu with 32 bit QEMU on a 64 bit host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4628 c046a42c-6fe2-441c-8c8c-71466251a162
moved halted field to CPU_COMMON
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
SVM rework
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
consistent naming for i386 TCG helper file
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4603 c046a42c-6fe2-441c-8c8c-71466251a162