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tcg: Always define all of the TCGOpcode enum members.
By always defining these symbols, we can eliminate a lot of ifdefs.
To allow this to be checked reliably, the semantics of theTCG_TARGET_HAS_* macros must be changed from def/undef to true/false.This allows even more ifdefs to be removed, converting them into...
tcg: Add and use TCG_OPF_64BIT.
This allows the simplification of the op_bits function fromtcg/optimize.c.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Define "deposit" as an optional operation.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
tcg: get rid of copy_size in TCGOpDef
copy_size is a left-over from the dyngen era, remove it.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: get rid of DEF2 in tcg-opc.h
Now that tcg-opc.h is only used in TCG code, get rid of DEF2 intcg-opc.h.
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operandssign-extended in 64-bit registers (regardless of the "real" signof the operand). For that, we need to be able to distinguishbetween a 32-bit load with a 32-bit result and a 32-bit load with...
tcg: Allow target-specific implementation of NOR.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: Allow target-specific implementation of NAND.
tcg: Allow target-specific implementation of EQV.
tcg: protect div2 in tcg/tcg-opc.h
tcg: fix assertion with --enable-debug
On 32-bit hosts op_qemu_ld32s is unused. Remove it to fix thefollowing assertion failure:
qemu-alpha: tcg/tcg.c:1055:tcg_add_target_add_op_defs: Assertion `tcg_op_defs[op].used' failed.
Signed-off-by: Jay Foad <jay.foad@gmail.com>...
tcg: Optional target implementation of ORC.
Previously ORC was always implemented by tcg-op.h withan explicit NOT opcode. Allow a target implementation.
tcg: Optional target implementation of ANDC.
Previously ANDC was always implemented by tcg-op.h withan explicit NOT opcode. Allow a target implementation.
tcg: generic support for conditional set
Defines setcond_{i32,i64} and setcond2_i32 for 64-on-32-bit.
tcg: add ext{8,16,32}u_i{32,64} TCG ops
Currently zero extensions ops are implemented by a and op with aconstant. This is then catched in some backend, and replaced bya zero extension instruction. While this works well on RISCmachines, this adds a useless register move on non-RISC machines....
tcg: add bswap16_i64 and bswap32_i64 TCG ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6832 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: allow bswap16_i32 to be implemented by TCG backends
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6830 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: rename bswap_i32/i64 functions
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: move {not,neg}_i{32,64} definitions at the right place
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6811 c046a42c-6fe2-441c-8c8c-71466251a162
Implement TCG not ops for x86-64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6797 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: don't define TCG rotation ops if they are not supported
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6796 c046a42c-6fe2-441c-8c8c-71466251a162
Implement TCG rotation ops for x86-64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6795 c046a42c-6fe2-441c-8c8c-71466251a162
Some cleanups after dyngen removal
this patch removes some now unused things after dyngen removal.
1. dyngen-exec.h: op_param, op _jmp and some associated macros are now unused;2. Makefile.target: tcg-dyngen is not needed anymore2. tcg/tcg-op.h, tcg/tcg-opc.h: gen-op.h is dead...
suppressed unused macro handling
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4580 c046a42c-6fe2-441c-8c8c-71466251a162
added debug_insn_start debug instruction
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4531 c046a42c-6fe2-441c-8c8c-71466251a162
Add TCG native negation op.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
Rename CONFIG_NO_DYNGEN_OP to CONFIG_DYNGEN_OP to avoid double negatives
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4412 c046a42c-6fe2-441c-8c8c-71466251a162
Prepare for op.c removal and zero legacy ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4095 c046a42c-6fe2-441c-8c8c-71466251a162
fixed sign extensions - added explicit side effect op flag - added discard instruction
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3963 c046a42c-6fe2-441c-8c8c-71466251a162
TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3943 c046a42c-6fe2-441c-8c8c-71466251a162