linux-headers: Update from v3.14-rc3
Update to tag v3.14-rc3 (6d0abeca3242a88cab8232e4acd7e2bf088f3bc2)
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>Message-id: 1392687720-26806-2-git-send-email-christoffer.dall@linaro.orgSigned-off-by: Peter Maydell <peter.maydell@linaro.org>
kvm: Introduce kvm_arch_irqchip_create
Introduce kvm_arch_irqchip_create an arch-specific hook in preparationfor architecture-specific use of the device control API to create IRQchips.
Following patches will implement the ARM irqchip create method to prefer...
kvm: Common device control API functions
Introduces two simple functions: int kvm_device_ioctl(int fd, int type, ...); int kvm_create_device(KVMState *s, uint64_t type, bool test);
These functions wrap the basic ioctl-based interactions with KVM in a...
arm: vgic device control api support
Support creating the ARM vgic device through the device control API andsetting the base address for the distributor and cpu interfaces in KVMVMs using this API.
Because the older KVM_CREATE_IRQCHIP interface needs the irq chip to be...
hw/arm/musicpal: Remove nonexistent CDTP2, CDTP3 registers
The ethernet device in the musicpal only has two tx queues,but we modelled it with four CTDP registers, presumably acut and paste from the rx queue registers. Since the tx_queue[]array is only 2 entries long this allowed a guest to overrun...
target-arm: Load correct access bits from ARMv5 level 2 page table descriptors
In ARMv5 level 2 page table descriptors, each 4K or 64K page is split intofour subpages, each of which can have different access permission settings,which are specified by four two-bit fields in the l2 descriptor. A...
hw/intc/arm_gic: Fix GIC_SET_LEVEL
The GIC_SET_LEVEL macro unfortunately overwrote the entire levelbitmask instead of just or'ing on the necessary bits, causing activelevel PPIs on a core to clear PPIs on other cores.
Cc: qemu-stable@nongnu.orgReported-by: Rob Herring <rob.herring@linaro.org>...
hw/timer/arm_timer: Avoid array overrun for bad addresses
The integrator's timer read/write functions log an error forbad addresses in guest accesses, but were falling through andusing an out of bounds array index rather than returning early.Fix this....
target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS ops
Correct some obviously nonsensical bit manipulation spotted by Coveritywhen constructing the short-form PAR value for ATS operations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
hw/intc/exynos4210_combiner: Don't overrun output_irq array in init
The Exynos4210 combiner has IIC_NIRQ inputs and IIC_NGRP outputs;use the correct constant in the loop initializing our outputsysbus IRQs so that we don't overrun the output_irq[] array....
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