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root / target-arm @ 1dc324d2

Name Size
cpu.h 18.3 kB
helper.c 96.2 kB
helper.h 17.1 kB
iwmmxt_helper.c 24.8 kB
machine.c 7.6 kB
neon_helper.c 52.9 kB
op_addsub.h 1.8 kB
op_helper.c 9.6 kB
translate.c 347.5 kB

Latest revisions

# Date Author Comment
9349b4f9 03/14/2012 11:20 pm Andreas Färber

Rename CPUState -> CPUArchState

Scripted conversion:
for file in .[hc] hw/.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
sed -i "s/CPUState/CPUArchState/g" $file
done...
1bba0dc9 03/14/2012 11:20 pm Andreas Färber

Rename cpu_reset() to cpu_state_reset()

Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <>...
0ecb72a5 03/14/2012 11:20 pm Andreas Färber

target-arm: Don't overuse CPUState

Scripted conversion:
sed -i "s/CPUState/CPUARMState/g" target-arm/*.[hc]
sed -i "s/#define CPUARMState/#define CPUState/" target-arm/cpu.h

Signed-off-by: Andreas Färber <>
Acked-by: Anthony Liguori <>...
853bfcc7 02/28/2012 11:33 pm Stefan Weil

target-arm: Clean includes

Remove some include statements which are not needed.

Reviewed-by: Peter Maydell <>
Signed-off-by: Stefan Weil <>
a84fac14 02/17/2012 09:34 am Peter Maydell

target-arm/helper.c: tb_flush() on CPU reset

Since target-arm has some CPUState fields for which we take the approach
of baking assumptions about them into translated code and then calling
tb_flush() when the fields change, we must also tb_flush on CPU reset,...
2d2624a0 02/17/2012 09:15 am Peter Maydell

target-arm/helper.c: Correct FPSID value for Cortex-A9

The correct FPSID for the Cortex-A9 (according to the TRM) is
0x41033090 for the r0p0 that we claim to model.

Signed-off-by: Peter Maydell <>
Signed-off-by: Andrzej Zaborowski <>
0b03bdfc 01/25/2012 05:10 pm Peter Maydell

Add Cortex-A15 CPU definition

Add a definition of a Cortex-A15 CPU. Note that for the moment we do
not implement any of: * Large Physical Address Extensions (LPAE) * Virtualization Extensions * Generic Timer * TrustZone (this is also true of our existing Cortex-A9 model, etc)...
0383ac00 01/25/2012 02:42 pm Peter Maydell

Add dummy implementation of generic timer cp15 registers

Add a dummy implementation of the cp15 registers for the generic
timer (found in the Cortex-A15), just sufficient for Linux to
decide that it can't use it. This requires at least CNTP_CTL and
CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14....
85836979 01/25/2012 01:49 pm Peter Maydell

target-arm/helper.c: Don't assume softfloat int32 is 32 bits only

In the helper routines for VCVT float-to-int conversions, add
an explicit cast rather than relying on the softfloat int32
type being exactly 32 bits wide (which it is not guaranteed to be)....
5fe91019 01/25/2012 01:49 pm Mark Langsdorf

arm: store the config_base_register during cpu_reset

Long term, the config_base_register will be a QDM parameter. In the
meantime, models that use it need to be able to preserve it across
cpu_reset() calls.

Signed-off-by: Mark Langsdorf <>...

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