root / hw / ppc_mac.h @ 1ffc346f
History | View | Annotate | Download (4.1 kB)
1 | 3cbee15b | j_mayer | /*
|
---|---|---|---|
2 | 3cbee15b | j_mayer | * QEMU PowerMac emulation shared definitions and prototypes
|
3 | 3cbee15b | j_mayer | *
|
4 | 3cbee15b | j_mayer | * Copyright (c) 2004-2007 Fabrice Bellard
|
5 | 3cbee15b | j_mayer | * Copyright (c) 2007 Jocelyn Mayer
|
6 | 3cbee15b | j_mayer | *
|
7 | 3cbee15b | j_mayer | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
8 | 3cbee15b | j_mayer | * of this software and associated documentation files (the "Software"), to deal
|
9 | 3cbee15b | j_mayer | * in the Software without restriction, including without limitation the rights
|
10 | 3cbee15b | j_mayer | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
11 | 3cbee15b | j_mayer | * copies of the Software, and to permit persons to whom the Software is
|
12 | 3cbee15b | j_mayer | * furnished to do so, subject to the following conditions:
|
13 | 3cbee15b | j_mayer | *
|
14 | 3cbee15b | j_mayer | * The above copyright notice and this permission notice shall be included in
|
15 | 3cbee15b | j_mayer | * all copies or substantial portions of the Software.
|
16 | 3cbee15b | j_mayer | *
|
17 | 3cbee15b | j_mayer | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
18 | 3cbee15b | j_mayer | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
19 | 3cbee15b | j_mayer | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
20 | 3cbee15b | j_mayer | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
21 | 3cbee15b | j_mayer | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
22 | 3cbee15b | j_mayer | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
23 | 3cbee15b | j_mayer | * THE SOFTWARE.
|
24 | 3cbee15b | j_mayer | */
|
25 | 3cbee15b | j_mayer | #if !defined(__PPC_MAC_H__)
|
26 | 3cbee15b | j_mayer | #define __PPC_MAC_H__
|
27 | 3cbee15b | j_mayer | |
28 | 3cbee15b | j_mayer | /* SMP is not enabled, for now */
|
29 | 3cbee15b | j_mayer | #define MAX_CPUS 1 |
30 | 3cbee15b | j_mayer | |
31 | 3cbee15b | j_mayer | #define BIOS_FILENAME "ppc_rom.bin" |
32 | 3cbee15b | j_mayer | #define VGABIOS_FILENAME "video.x" |
33 | 3cbee15b | j_mayer | #define NVRAM_SIZE 0x2000 |
34 | 3cbee15b | j_mayer | |
35 | 3cbee15b | j_mayer | #define KERNEL_LOAD_ADDR 0x01000000 |
36 | 3cbee15b | j_mayer | #define INITRD_LOAD_ADDR 0x01800000 |
37 | 3cbee15b | j_mayer | |
38 | 3cbee15b | j_mayer | /* DBDMA */
|
39 | 3cbee15b | j_mayer | void dbdma_init (int *dbdma_mem_index); |
40 | 3cbee15b | j_mayer | |
41 | 3cbee15b | j_mayer | /* Cuda */
|
42 | 3cbee15b | j_mayer | void cuda_init (int *cuda_mem_index, qemu_irq irq); |
43 | 3cbee15b | j_mayer | |
44 | 3cbee15b | j_mayer | /* MacIO */
|
45 | 3cbee15b | j_mayer | void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index, |
46 | 74e91155 | j_mayer | int dbdma_mem_index, int cuda_mem_index, void *nvram, |
47 | 3cbee15b | j_mayer | int nb_ide, int *ide_mem_index); |
48 | 3cbee15b | j_mayer | |
49 | 3cbee15b | j_mayer | /* NewWorld PowerMac IDE */
|
50 | 3cbee15b | j_mayer | int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq);
|
51 | 3cbee15b | j_mayer | |
52 | 3cbee15b | j_mayer | /* Heathrow PIC */
|
53 | 3cbee15b | j_mayer | qemu_irq *heathrow_pic_init(int *pmem_index,
|
54 | 3cbee15b | j_mayer | int nb_cpus, qemu_irq **irqs);
|
55 | 3cbee15b | j_mayer | |
56 | 3cbee15b | j_mayer | /* Grackle PCI */
|
57 | 3cbee15b | j_mayer | PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic); |
58 | 3cbee15b | j_mayer | |
59 | 3cbee15b | j_mayer | /* UniNorth PCI */
|
60 | 3cbee15b | j_mayer | PCIBus *pci_pmac_init(qemu_irq *pic); |
61 | 3cbee15b | j_mayer | |
62 | 3cbee15b | j_mayer | /* Mac NVRAM */
|
63 | 3cbee15b | j_mayer | typedef struct MacIONVRAMState MacIONVRAMState; |
64 | 3cbee15b | j_mayer | |
65 | 74e91155 | j_mayer | MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size);
|
66 | 74e91155 | j_mayer | void macio_nvram_map (void *opaque, target_phys_addr_t mem_base); |
67 | 3cbee15b | j_mayer | void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len); |
68 | 3cbee15b | j_mayer | uint32_t macio_nvram_read (void *opaque, uint32_t addr);
|
69 | 3cbee15b | j_mayer | void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val); |
70 | 3cbee15b | j_mayer | |
71 | 87ecb68b | pbrook | /* adb.c */
|
72 | 87ecb68b | pbrook | |
73 | 87ecb68b | pbrook | #define MAX_ADB_DEVICES 16 |
74 | 87ecb68b | pbrook | |
75 | 87ecb68b | pbrook | #define ADB_MAX_OUT_LEN 16 |
76 | 87ecb68b | pbrook | |
77 | 87ecb68b | pbrook | typedef struct ADBDevice ADBDevice; |
78 | 87ecb68b | pbrook | |
79 | 87ecb68b | pbrook | /* buf = NULL means polling */
|
80 | 87ecb68b | pbrook | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
81 | 87ecb68b | pbrook | const uint8_t *buf, int len); |
82 | 87ecb68b | pbrook | typedef int ADBDeviceReset(ADBDevice *d); |
83 | 87ecb68b | pbrook | |
84 | 87ecb68b | pbrook | struct ADBDevice {
|
85 | 87ecb68b | pbrook | struct ADBBusState *bus;
|
86 | 87ecb68b | pbrook | int devaddr;
|
87 | 87ecb68b | pbrook | int handler;
|
88 | 87ecb68b | pbrook | ADBDeviceRequest *devreq; |
89 | 87ecb68b | pbrook | ADBDeviceReset *devreset; |
90 | 87ecb68b | pbrook | void *opaque;
|
91 | 87ecb68b | pbrook | }; |
92 | 87ecb68b | pbrook | |
93 | 87ecb68b | pbrook | typedef struct ADBBusState { |
94 | 87ecb68b | pbrook | ADBDevice devices[MAX_ADB_DEVICES]; |
95 | 87ecb68b | pbrook | int nb_devices;
|
96 | 87ecb68b | pbrook | int poll_index;
|
97 | 87ecb68b | pbrook | } ADBBusState; |
98 | 87ecb68b | pbrook | |
99 | 87ecb68b | pbrook | int adb_request(ADBBusState *s, uint8_t *buf_out,
|
100 | 87ecb68b | pbrook | const uint8_t *buf, int len); |
101 | 87ecb68b | pbrook | int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
102 | 87ecb68b | pbrook | |
103 | 87ecb68b | pbrook | ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
104 | 87ecb68b | pbrook | ADBDeviceRequest *devreq, |
105 | 87ecb68b | pbrook | ADBDeviceReset *devreset, |
106 | 87ecb68b | pbrook | void *opaque);
|
107 | 87ecb68b | pbrook | void adb_kbd_init(ADBBusState *bus);
|
108 | 87ecb68b | pbrook | void adb_mouse_init(ADBBusState *bus);
|
109 | 87ecb68b | pbrook | |
110 | 87ecb68b | pbrook | extern ADBBusState adb_bus;
|
111 | 87ecb68b | pbrook | |
112 | 87ecb68b | pbrook | /* openpic.c */
|
113 | 87ecb68b | pbrook | /* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */
|
114 | 87ecb68b | pbrook | enum {
|
115 | 87ecb68b | pbrook | OPENPIC_OUTPUT_INT = 0, /* IRQ */ |
116 | 87ecb68b | pbrook | OPENPIC_OUTPUT_CINT, /* critical IRQ */
|
117 | 87ecb68b | pbrook | OPENPIC_OUTPUT_MCK, /* Machine check event */
|
118 | 87ecb68b | pbrook | OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */
|
119 | 87ecb68b | pbrook | OPENPIC_OUTPUT_RESET, /* Core reset event */
|
120 | 87ecb68b | pbrook | OPENPIC_OUTPUT_NB, |
121 | 87ecb68b | pbrook | }; |
122 | 87ecb68b | pbrook | qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
123 | 87ecb68b | pbrook | qemu_irq **irqs, qemu_irq irq_out); |
124 | 87ecb68b | pbrook | |
125 | 3cbee15b | j_mayer | #endif /* !defined(__PPC_MAC_H__) */ |