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tcg: Make some tcg-target.c routines static.
Both tcg_target_init and tcg_target_qemu_prologueare unused outside of tcg.c.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: Add TYPE parameter to tcg_out_mov.
Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64to perform the move at the proper width, which may elide a REX prefix.
Introduce a TCG_TYPE_REG enumerator to represent the "native width" of the host register, and to distinguish the usage from "pointer data"...
tcg-i386: fix a typo
Fix a typo introduced by c28b14c694d759f39fe3ae4f8d03b567da5b93f8.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg-i386: declare tcg_out_tlb_load() inline
Declare tcg_out_tlb_load() inline so that we don't loose optimisationswith commit 8516a04467cb7954cdc32e8b79b4b7df56dccb16.
tcg-i386: Remove some ifdefs in qemu_ld/st.
Tidy some code by replacing ifdefs by C ifs.
tcg-i386: Tidy data16 prefixes.
Include it in the opcode as an extension, as with P_EXTor the REX bits in the x86-64 port.
tcg-i386: Split out TLB Hit path from qemu_ld/st.
Splitting out these functions will allow further cleanups.
tcg-i386: Swap order of TLB hit and miss paths.
Make fallthru be TLB hit and branch be TLB miss. Doing thisboth improves branch prediction and will allow further cleanup.
tcg-i386: Split out tlb load function.
Share some code between qemu_ld and qemu_st.
tcg-i386: Use lea for three-operand add.
The result is shorter than the mov+add that TCG wouldotherwise generate for us.
tcg-i386: Nuke trailing whitespace.
tcg-i386: Tidy ext8u and ext16u operations.
Define OPC_MOVZBL and OPC_MOVZWL. Factor opcode emission toseparate functions.
tcg-i386: Tidy ext8s and ext16s operations.
Define OPC_MOVSBL and OPC_MOVSWL. Factor opcode emission toseparate functions.
tcg-i386: Tidy immediate arithmetic operations.
Define OPC_ARITH_EvI[bz]; use throughout. Use tcg_out_ext8udirectly in setcond. Use tgen_arithi in qemu_ld/st.
tcg-i386: Tidy non-immediate arithmetic operations.
Add more OPC values, and tgen_arithr. Use the later throughout.
Note that normal reg/reg arithmetic now uses the Gv,Ev opcode forminstead of the Ev,Gv opcode form used previously. Both formsdisassemble properly, and so there's no visible change when diffing...
tcg-i386: Tidy movi.
Define and use OPC_MOVL_Iv.
tcg-i386: Tidy push/pop.
Move tcg_out_push/pop up in the file so that they can be usedby qemu_ld/st. Define a tcg_out_pushi to be used as well.
tcg-i386: Tidy calls.
Define OPC_CALL_Jz, generated by tcg_out_calli; use the laterthroughout. Unify the calls within qemu_st; adjust the stackwith a single pop if applicable.
Define and use EXT_CALLN_Ev for indirect calls.
Signed-off-by: Richard Henderson <rth@twiddle.net>...
tcg-i386: Tidy ret.
Define and use OPC_RET.
tcg-i386: Tidy setcc.
Define and use OPC_SETCC.
tcg-i386: Tidy unary arithmetic.
Define OPC_GRP3 and EXT3_FOO to match. Use them instead ofbare constants.
Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR tomake it clear which extension should be used with which opcode.
tcg-i386: Tidy multiply.
Define and use OPC_IMUL_GvEv{,Ib,Iz}.
tcg-i386: Tidy xchg.
Define and use OPC_XCHG_ax_r32.
tcg-i386: Tidy lea.
Implement full modrm+sib addressing mode processing.Use that in qemu_ld/st to output the LEA.
tcg-i386: Tidy jumps.
Define OPC_JCC*, OC_JMP*, and EXT_JMPN_Ev. Use them throughout.
tcg-i386: Eliminate extra move from qemu_ld64.
If the address register overlaps one of the output registerssimply issue the clobbering load last, rather than emittingan extra move of the address register.
tcg-i386: Tidy move operations.
Define OPC_MOVB* and OPC_MOVL*; use them throughout.Use tcg_out_ld/st instead of bare tcg_out_modrm_offsetwhen it makes sense.
tcg-i386: Tidy shift operations.
Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function.
tcg-i386: Tidy bswap operations.
Define OPC_BSWAP. Factor opcode emission to separate functions.
tcg-i386: Allocate call-saved registers first.
tcg-i386: Tidy initialization of tcg_target_call_clobber_regs.
Setting the registers one by one is easier to read, and getsoptimized by the compiler just the same.
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operandssign-extended in 64-bit registers (regardless of the "real" signof the operand). For that, we need to be able to distinguishbetween a 32-bit load with a 32-bit result and a 32-bit load with...
tcg: Use TCGCond where appropriate.
Use the TCGCond enumeration type in the brcond and setcondrelated prototypes in tcg-op.h and each code generator.
tcg: Name the opcode enumeration.
Give the enumeration formed from tcg-opc.h a name: TCGOpcode.Use that enumeration type instead of "int" whereever appropriate.
Remove TLB from userspace
Remove TLB from userspace CPU structure.
Signed-off-by: Paul Brook <paul@codesourcery.com>
tcg-i386: Implement setcond.
tcg-i386: Implement small forward branches.
There are places, like brcond2, where we know that the destinationof a forward branch will be within 127 bytes.
Add the R_386_PC8 relocation type to support this. Add a flag totcg_out_jxx and tcg_out_brcond* to enable it. Set the flag in the...
tcg/i386: remove duplicate sar opcode
Signed-off-by: Magnus Damm <damm@opensource.se>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/i386: add support for ext{8,16}u_i32 TCG ops
tcg/i386: generates dec/inc instead of sub/add when possible
We must take care that dec/inc do not compute CF, which is needed byadd2/sub2.
tcg/i386: optimize and $0xff(ff), reg
Userspace guest address offsetting
Fix type in i386 tcg.
Signed-off-by: Juan Quintela <quintela@redhat.com>
Re-implement GUEST_BASE support.Offset guest ddress space by default if the guest binary containsregions below the host mmap_min_addr.Implement support for i386, x86-64 and arm hosts.
Signed-off-by: Riku Voipio <riku.voipio@iki.fi>...
tcg/x86: add bswap16_i32 ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: rename bswap_i32/i64 functions
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
tcg/x86: add not/neg/extu/bswap/rot i32 ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6806 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: kill two warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6029 c046a42c-6fe2-441c-8c8c-71466251a162
TCG x86/x86-64: use move with zero-extend for loads/stores
Starting with version 4.3, gcc returns the result of a function inrax/eax/ax/al instead of rax/eax, depending of the return type. Asa consequence we should use a zero extend moe in TCG loads/stores....
Add some missing static and const qualifiers, reg_names only used if NDEBUG set
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162
Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
64 bit signed comparison fix (Juergen Lock)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162
jump optimizations
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162
fixed global variable handling with qemu load/stores - initial global prologue/epilogue implementation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4406 c046a42c-6fe2-441c-8c8c-71466251a162
HPPA (PA-RISC) host support
(Stuart Brady)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
Fix i32 memory backed variables on 64-bit host
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4044 c046a42c-6fe2-441c-8c8c-71466251a162
Remove blank elements in tcg_target_reg_alloc_order[] (Stuart Brady)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4039 c046a42c-6fe2-441c-8c8c-71466251a162
Simplify TCG relocation bugfix.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3974 c046a42c-6fe2-441c-8c8c-71466251a162
compare fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3962 c046a42c-6fe2-441c-8c8c-71466251a162
TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3943 c046a42c-6fe2-441c-8c8c-71466251a162