root / hw / spapr.c @ 2558e0a6
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 8d90ad90 | David Gibson | #include "net.h" |
31 | 6e270446 | Ben Herrenschmidt | #include "blockdev.h" |
32 | e97c3636 | David Gibson | #include "cpus.h" |
33 | e97c3636 | David Gibson | #include "kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
43 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
44 | 9fdf0c29 | David Gibson | |
45 | f61b4bed | Alexander Graf | #include "kvm.h" |
46 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
47 | 3384f95c | David Gibson | #include "pci.h" |
48 | f61b4bed | Alexander Graf | |
49 | 890c2b77 | Avi Kivity | #include "exec-memory.h" |
50 | 890c2b77 | Avi Kivity | |
51 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
52 | 9fdf0c29 | David Gibson | |
53 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF memory layout:
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54 | 4d8d5467 | Benjamin Herrenschmidt | *
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55 | 4d8d5467 | Benjamin Herrenschmidt | * SLOF raw image loaded at 0, copies its romfs right below the flat
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56 | 4d8d5467 | Benjamin Herrenschmidt | * device-tree, then position SLOF itself 31M below that
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57 | 4d8d5467 | Benjamin Herrenschmidt | *
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58 | 4d8d5467 | Benjamin Herrenschmidt | * So we set FW_OVERHEAD to 40MB which should account for all of that
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59 | 4d8d5467 | Benjamin Herrenschmidt | * and more
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60 | 4d8d5467 | Benjamin Herrenschmidt | *
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61 | 4d8d5467 | Benjamin Herrenschmidt | * We load our kernel at 4M, leaving space for SLOF initial image
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62 | 4d8d5467 | Benjamin Herrenschmidt | */
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63 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
64 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
65 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
66 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
67 | 4d8d5467 | Benjamin Herrenschmidt | #define FW_OVERHEAD 0x2800000 |
68 | 4d8d5467 | Benjamin Herrenschmidt | #define KERNEL_LOAD_ADDR FW_MAX_SIZE
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69 | a9f8ad8f | David Gibson | |
70 | 4d8d5467 | Benjamin Herrenschmidt | #define MIN_RMA_SLOF 128UL |
71 | 9fdf0c29 | David Gibson | |
72 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
73 | 9fdf0c29 | David Gibson | |
74 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
75 | 4d8d5467 | Benjamin Herrenschmidt | #define XICS_IRQS 1024 |
76 | 9fdf0c29 | David Gibson | |
77 | 3384f95c | David Gibson | #define SPAPR_PCI_BUID 0x800000020000001ULL |
78 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_ADDR (0x10000000000ULL + 0xA0000000) |
79 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_SIZE 0x20000000 |
80 | 3384f95c | David Gibson | #define SPAPR_PCI_IO_WIN_ADDR (0x10000000000ULL + 0x80000000) |
81 | 3384f95c | David Gibson | |
82 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
83 | 0c103f8e | David Gibson | |
84 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
85 | 9fdf0c29 | David Gibson | |
86 | e6c866d4 | David Gibson | qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num) |
87 | e6c866d4 | David Gibson | { |
88 | e6c866d4 | David Gibson | uint32_t irq; |
89 | e6c866d4 | David Gibson | qemu_irq qirq; |
90 | e6c866d4 | David Gibson | |
91 | e6c866d4 | David Gibson | if (hint) {
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92 | e6c866d4 | David Gibson | irq = hint; |
93 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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94 | e6c866d4 | David Gibson | } else {
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95 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
96 | e6c866d4 | David Gibson | } |
97 | e6c866d4 | David Gibson | |
98 | e6c866d4 | David Gibson | qirq = xics_find_qirq(spapr->icp, irq); |
99 | e6c866d4 | David Gibson | if (!qirq) {
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100 | e6c866d4 | David Gibson | return NULL; |
101 | e6c866d4 | David Gibson | } |
102 | e6c866d4 | David Gibson | |
103 | e6c866d4 | David Gibson | if (irq_num) {
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104 | e6c866d4 | David Gibson | *irq_num = irq; |
105 | e6c866d4 | David Gibson | } |
106 | e6c866d4 | David Gibson | |
107 | e6c866d4 | David Gibson | return qirq;
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108 | e6c866d4 | David Gibson | } |
109 | e6c866d4 | David Gibson | |
110 | 6e806cc3 | Bharata B Rao | static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr) |
111 | 6e806cc3 | Bharata B Rao | { |
112 | 6e806cc3 | Bharata B Rao | int ret = 0, offset; |
113 | 6e806cc3 | Bharata B Rao | CPUState *env; |
114 | 6e806cc3 | Bharata B Rao | char cpu_model[32]; |
115 | 6e806cc3 | Bharata B Rao | int smt = kvmppc_smt_threads();
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116 | 6e806cc3 | Bharata B Rao | |
117 | 6e806cc3 | Bharata B Rao | assert(spapr->cpu_model); |
118 | 6e806cc3 | Bharata B Rao | |
119 | 6e806cc3 | Bharata B Rao | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
120 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x5),
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121 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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122 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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123 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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124 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->numa_node), |
125 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->cpu_index)}; |
126 | 6e806cc3 | Bharata B Rao | |
127 | 6e806cc3 | Bharata B Rao | if ((env->cpu_index % smt) != 0) { |
128 | 6e806cc3 | Bharata B Rao | continue;
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129 | 6e806cc3 | Bharata B Rao | } |
130 | 6e806cc3 | Bharata B Rao | |
131 | 6e806cc3 | Bharata B Rao | snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, |
132 | 6e806cc3 | Bharata B Rao | env->cpu_index); |
133 | 6e806cc3 | Bharata B Rao | |
134 | 6e806cc3 | Bharata B Rao | offset = fdt_path_offset(fdt, cpu_model); |
135 | 6e806cc3 | Bharata B Rao | if (offset < 0) { |
136 | 6e806cc3 | Bharata B Rao | return offset;
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137 | 6e806cc3 | Bharata B Rao | } |
138 | 6e806cc3 | Bharata B Rao | |
139 | 6e806cc3 | Bharata B Rao | ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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140 | 6e806cc3 | Bharata B Rao | sizeof(associativity));
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141 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
142 | 6e806cc3 | Bharata B Rao | return ret;
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143 | 6e806cc3 | Bharata B Rao | } |
144 | 6e806cc3 | Bharata B Rao | } |
145 | 6e806cc3 | Bharata B Rao | return ret;
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146 | 6e806cc3 | Bharata B Rao | } |
147 | 6e806cc3 | Bharata B Rao | |
148 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
149 | 354ac20a | David Gibson | target_phys_addr_t rma_size, |
150 | a3467baa | David Gibson | target_phys_addr_t initrd_base, |
151 | a3467baa | David Gibson | target_phys_addr_t initrd_size, |
152 | 4d8d5467 | Benjamin Herrenschmidt | target_phys_addr_t kernel_size, |
153 | a3467baa | David Gibson | const char *boot_device, |
154 | a3467baa | David Gibson | const char *kernel_cmdline, |
155 | a3467baa | David Gibson | long hash_shift)
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156 | 9fdf0c29 | David Gibson | { |
157 | 9fdf0c29 | David Gibson | void *fdt;
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158 | c7a5c0c9 | David Gibson | CPUState *env; |
159 | 6e806cc3 | Bharata B Rao | uint64_t mem_reg_property[2];
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160 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
161 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
162 | f43e3525 | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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163 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
164 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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165 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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166 | 9fdf0c29 | David Gibson | int i;
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167 | 9fdf0c29 | David Gibson | char *modelname;
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168 | e97c3636 | David Gibson | int smt = kvmppc_smt_threads();
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169 | 6e806cc3 | Bharata B Rao | unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; |
170 | 6e806cc3 | Bharata B Rao | uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; |
171 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0), |
172 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0), cpu_to_be32(0x0), |
173 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0)};
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174 | 6e806cc3 | Bharata B Rao | char mem_name[32]; |
175 | 6e806cc3 | Bharata B Rao | target_phys_addr_t node0_size, mem_start; |
176 | 9fdf0c29 | David Gibson | |
177 | 9fdf0c29 | David Gibson | #define _FDT(exp) \
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178 | 9fdf0c29 | David Gibson | do { \
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179 | 9fdf0c29 | David Gibson | int ret = (exp); \
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180 | 9fdf0c29 | David Gibson | if (ret < 0) { \ |
181 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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182 | 9fdf0c29 | David Gibson | #exp, fdt_strerror(ret)); \
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183 | 9fdf0c29 | David Gibson | exit(1); \
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184 | 9fdf0c29 | David Gibson | } \ |
185 | 9fdf0c29 | David Gibson | } while (0) |
186 | 9fdf0c29 | David Gibson | |
187 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
188 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
189 | 9fdf0c29 | David Gibson | |
190 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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191 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size))); |
192 | 4d8d5467 | Benjamin Herrenschmidt | } |
193 | 4d8d5467 | Benjamin Herrenschmidt | if (initrd_size) {
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194 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size))); |
195 | 4d8d5467 | Benjamin Herrenschmidt | } |
196 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
197 | 9fdf0c29 | David Gibson | |
198 | 9fdf0c29 | David Gibson | /* Root node */
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199 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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200 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
201 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
202 | 9fdf0c29 | David Gibson | |
203 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
204 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
205 | 9fdf0c29 | David Gibson | |
206 | 9fdf0c29 | David Gibson | /* /chosen */
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207 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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208 | 9fdf0c29 | David Gibson | |
209 | 6e806cc3 | Bharata B Rao | /* Set Form1_affinity */
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210 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5)))); |
211 | 6e806cc3 | Bharata B Rao | |
212 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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213 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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214 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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215 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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216 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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217 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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218 | 4d8d5467 | Benjamin Herrenschmidt | uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
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219 | 4d8d5467 | Benjamin Herrenschmidt | cpu_to_be64(kernel_size) }; |
220 | 9fdf0c29 | David Gibson | |
221 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop)))); |
222 | 4d8d5467 | Benjamin Herrenschmidt | } |
223 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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224 | 3384f95c | David Gibson | |
225 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
226 | 9fdf0c29 | David Gibson | |
227 | 354ac20a | David Gibson | /* memory node(s) */
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228 | 6e806cc3 | Bharata B Rao | node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size; |
229 | 6e806cc3 | Bharata B Rao | if (rma_size > node0_size) {
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230 | 6e806cc3 | Bharata B Rao | rma_size = node0_size; |
231 | 6e806cc3 | Bharata B Rao | } |
232 | 9fdf0c29 | David Gibson | |
233 | 6e806cc3 | Bharata B Rao | /* RMA */
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234 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = 0; |
235 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(rma_size);
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236 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, "memory@0")));
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237 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
238 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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239 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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240 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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241 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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242 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
243 | 9fdf0c29 | David Gibson | |
244 | 6e806cc3 | Bharata B Rao | /* RAM: Node 0 */
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245 | 6e806cc3 | Bharata B Rao | if (node0_size > rma_size) {
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246 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(rma_size);
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247 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node0_size - rma_size);
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248 | 354ac20a | David Gibson | |
249 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, rma_size);
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250 | 354ac20a | David Gibson | _FDT((fdt_begin_node(fdt, mem_name))); |
251 | 354ac20a | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
252 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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253 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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254 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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255 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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256 | 354ac20a | David Gibson | _FDT((fdt_end_node(fdt))); |
257 | 354ac20a | David Gibson | } |
258 | 354ac20a | David Gibson | |
259 | 6e806cc3 | Bharata B Rao | /* RAM: Node 1 and beyond */
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260 | 6e806cc3 | Bharata B Rao | mem_start = node0_size; |
261 | 6e806cc3 | Bharata B Rao | for (i = 1; i < nb_numa_nodes; i++) { |
262 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(mem_start);
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263 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node_mem[i]);
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264 | 6e806cc3 | Bharata B Rao | associativity[3] = associativity[4] = cpu_to_be32(i); |
265 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
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266 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, mem_name))); |
267 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
268 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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269 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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270 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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271 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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272 | 6e806cc3 | Bharata B Rao | _FDT((fdt_end_node(fdt))); |
273 | 6e806cc3 | Bharata B Rao | mem_start += node_mem[i]; |
274 | 6e806cc3 | Bharata B Rao | } |
275 | 6e806cc3 | Bharata B Rao | |
276 | 9fdf0c29 | David Gibson | /* cpus */
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277 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
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278 | 9fdf0c29 | David Gibson | |
279 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
280 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
281 | 9fdf0c29 | David Gibson | |
282 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
283 | 9fdf0c29 | David Gibson | |
284 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
285 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
286 | 9fdf0c29 | David Gibson | } |
287 | 9fdf0c29 | David Gibson | |
288 | 6e806cc3 | Bharata B Rao | /* This is needed during FDT finalization */
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289 | 6e806cc3 | Bharata B Rao | spapr->cpu_model = g_strdup(modelname); |
290 | 6e806cc3 | Bharata B Rao | |
291 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
292 | c7a5c0c9 | David Gibson | int index = env->cpu_index;
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293 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
294 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
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295 | 9fdf0c29 | David Gibson | char *nodename;
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296 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
297 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
298 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
299 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
300 | 9fdf0c29 | David Gibson | |
301 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
302 | e97c3636 | David Gibson | continue;
|
303 | e97c3636 | David Gibson | } |
304 | e97c3636 | David Gibson | |
305 | c7a5c0c9 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, index) < 0) { |
306 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
|
307 | 9fdf0c29 | David Gibson | exit(1);
|
308 | 9fdf0c29 | David Gibson | } |
309 | 9fdf0c29 | David Gibson | |
310 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
311 | 9fdf0c29 | David Gibson | |
312 | 9fdf0c29 | David Gibson | free(nodename); |
313 | 9fdf0c29 | David Gibson | |
314 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
|
315 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
316 | 9fdf0c29 | David Gibson | |
317 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
318 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
|
319 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
320 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
|
321 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
322 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
323 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
324 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
325 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,pft-size",
|
326 | f43e3525 | David Gibson | pft_size_prop, sizeof(pft_size_prop))));
|
327 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
328 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
329 | e97c3636 | David Gibson | |
330 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
|
331 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
332 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
333 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
|
334 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
|
335 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
336 | e97c3636 | David Gibson | } |
337 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
338 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
|
339 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
340 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
|
341 | 9fdf0c29 | David Gibson | |
342 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
343 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
344 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
|
345 | 9fdf0c29 | David Gibson | } |
346 | 9fdf0c29 | David Gibson | |
347 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
|
348 | 6659394f | David Gibson | * 0 / no property == no vector extensions
|
349 | 6659394f | David Gibson | * 1 == VMX / Altivec available
|
350 | 6659394f | David Gibson | * 2 == VSX available */
|
351 | a7342588 | David Gibson | if (env->insns_flags & PPC_ALTIVEC) {
|
352 | a7342588 | David Gibson | uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; |
353 | a7342588 | David Gibson | |
354 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
355 | 6659394f | David Gibson | } |
356 | 6659394f | David Gibson | |
357 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
|
358 | 6659394f | David Gibson | * 0 / no property == no DFP
|
359 | 6659394f | David Gibson | * 1 == DFP available */
|
360 | a7342588 | David Gibson | if (env->insns_flags2 & PPC2_DFP) {
|
361 | a7342588 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); |
362 | 6659394f | David Gibson | } |
363 | 6659394f | David Gibson | |
364 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
365 | 9fdf0c29 | David Gibson | } |
366 | 9fdf0c29 | David Gibson | |
367 | 7267c094 | Anthony Liguori | g_free(modelname); |
368 | 9fdf0c29 | David Gibson | |
369 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
370 | 9fdf0c29 | David Gibson | |
371 | f43e3525 | David Gibson | /* RTAS */
|
372 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
|
373 | f43e3525 | David Gibson | |
374 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
375 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
|
376 | f43e3525 | David Gibson | |
377 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
378 | 6e806cc3 | Bharata B Rao | refpoints, sizeof(refpoints))));
|
379 | 6e806cc3 | Bharata B Rao | |
380 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
381 | f43e3525 | David Gibson | |
382 | b5cec4c5 | David Gibson | /* interrupt controller */
|
383 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
384 | b5cec4c5 | David Gibson | |
385 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
|
386 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
|
387 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
388 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
389 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
390 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
391 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
|
392 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
393 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
394 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
395 | b5cec4c5 | David Gibson | |
396 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
397 | b5cec4c5 | David Gibson | |
398 | 4040ab72 | David Gibson | /* vdevice */
|
399 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
|
400 | 4040ab72 | David Gibson | |
401 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
402 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
403 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
404 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
405 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
406 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
407 | 4040ab72 | David Gibson | |
408 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
409 | 4040ab72 | David Gibson | |
410 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
|
411 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
412 | 9fdf0c29 | David Gibson | |
413 | a3467baa | David Gibson | return fdt;
|
414 | a3467baa | David Gibson | } |
415 | a3467baa | David Gibson | |
416 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
417 | a3467baa | David Gibson | target_phys_addr_t fdt_addr, |
418 | a3467baa | David Gibson | target_phys_addr_t rtas_addr, |
419 | a3467baa | David Gibson | target_phys_addr_t rtas_size) |
420 | a3467baa | David Gibson | { |
421 | a3467baa | David Gibson | int ret;
|
422 | a3467baa | David Gibson | void *fdt;
|
423 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
424 | a3467baa | David Gibson | |
425 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
426 | a3467baa | David Gibson | |
427 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
428 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
429 | 4040ab72 | David Gibson | |
430 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
431 | 4040ab72 | David Gibson | if (ret < 0) { |
432 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
433 | 4040ab72 | David Gibson | exit(1);
|
434 | 4040ab72 | David Gibson | } |
435 | 4040ab72 | David Gibson | |
436 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
437 | 3384f95c | David Gibson | ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt); |
438 | 3384f95c | David Gibson | } |
439 | 3384f95c | David Gibson | |
440 | 3384f95c | David Gibson | if (ret < 0) { |
441 | 3384f95c | David Gibson | fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
442 | 3384f95c | David Gibson | exit(1);
|
443 | 3384f95c | David Gibson | } |
444 | 3384f95c | David Gibson | |
445 | 39ac8455 | David Gibson | /* RTAS */
|
446 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
447 | 39ac8455 | David Gibson | if (ret < 0) { |
448 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
449 | 39ac8455 | David Gibson | } |
450 | 39ac8455 | David Gibson | |
451 | 6e806cc3 | Bharata B Rao | /* Advertise NUMA via ibm,associativity */
|
452 | 6e806cc3 | Bharata B Rao | if (nb_numa_nodes > 1) { |
453 | 6e806cc3 | Bharata B Rao | ret = spapr_set_associativity(fdt, spapr); |
454 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
455 | 6e806cc3 | Bharata B Rao | fprintf(stderr, "Couldn't set up NUMA device tree properties\n");
|
456 | 6e806cc3 | Bharata B Rao | } |
457 | 6e806cc3 | Bharata B Rao | } |
458 | 6e806cc3 | Bharata B Rao | |
459 | 68f3a94c | David Gibson | spapr_populate_chosen_stdout(fdt, spapr->vio_bus); |
460 | 68f3a94c | David Gibson | |
461 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
462 | 4040ab72 | David Gibson | |
463 | 4d8d5467 | Benjamin Herrenschmidt | if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
464 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
465 | 4d8d5467 | Benjamin Herrenschmidt | fdt_totalsize(fdt), FDT_MAX_SIZE); |
466 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
467 | 4d8d5467 | Benjamin Herrenschmidt | } |
468 | 4d8d5467 | Benjamin Herrenschmidt | |
469 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
470 | 9fdf0c29 | David Gibson | |
471 | 7267c094 | Anthony Liguori | g_free(fdt); |
472 | 9fdf0c29 | David Gibson | } |
473 | 9fdf0c29 | David Gibson | |
474 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
475 | 9fdf0c29 | David Gibson | { |
476 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
477 | 9fdf0c29 | David Gibson | } |
478 | 9fdf0c29 | David Gibson | |
479 | 9fdf0c29 | David Gibson | static void emulate_spapr_hypercall(CPUState *env) |
480 | 9fdf0c29 | David Gibson | { |
481 | 9fdf0c29 | David Gibson | env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
482 | 9fdf0c29 | David Gibson | } |
483 | 9fdf0c29 | David Gibson | |
484 | a3467baa | David Gibson | static void spapr_reset(void *opaque) |
485 | a3467baa | David Gibson | { |
486 | a3467baa | David Gibson | sPAPREnvironment *spapr = (sPAPREnvironment *)opaque; |
487 | a3467baa | David Gibson | |
488 | a3467baa | David Gibson | fprintf(stderr, "sPAPR reset\n");
|
489 | a3467baa | David Gibson | |
490 | a3467baa | David Gibson | /* flush out the hash table */
|
491 | a3467baa | David Gibson | memset(spapr->htab, 0, spapr->htab_size);
|
492 | a3467baa | David Gibson | |
493 | a3467baa | David Gibson | /* Load the fdt */
|
494 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
495 | a3467baa | David Gibson | spapr->rtas_size); |
496 | a3467baa | David Gibson | |
497 | a3467baa | David Gibson | /* Set up the entry state */
|
498 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
499 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
500 | a3467baa | David Gibson | first_cpu->halted = 0;
|
501 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
502 | a3467baa | David Gibson | |
503 | a3467baa | David Gibson | } |
504 | a3467baa | David Gibson | |
505 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
506 | 9fdf0c29 | David Gibson | static void ppc_spapr_init(ram_addr_t ram_size, |
507 | 9fdf0c29 | David Gibson | const char *boot_device, |
508 | 9fdf0c29 | David Gibson | const char *kernel_filename, |
509 | 9fdf0c29 | David Gibson | const char *kernel_cmdline, |
510 | 9fdf0c29 | David Gibson | const char *initrd_filename, |
511 | 9fdf0c29 | David Gibson | const char *cpu_model) |
512 | 9fdf0c29 | David Gibson | { |
513 | c7a5c0c9 | David Gibson | CPUState *env; |
514 | 9fdf0c29 | David Gibson | int i;
|
515 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
516 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
517 | 354ac20a | David Gibson | target_phys_addr_t rma_alloc_size, rma_size; |
518 | 4d8d5467 | Benjamin Herrenschmidt | uint32_t initrd_base = 0;
|
519 | 4d8d5467 | Benjamin Herrenschmidt | long kernel_size = 0, initrd_size = 0; |
520 | 4d8d5467 | Benjamin Herrenschmidt | long load_limit, rtas_limit, fw_size;
|
521 | f43e3525 | David Gibson | long pteg_shift = 17; |
522 | 39ac8455 | David Gibson | char *filename;
|
523 | 9fdf0c29 | David Gibson | |
524 | d43b45e2 | David Gibson | spapr = g_malloc0(sizeof(*spapr));
|
525 | d43b45e2 | David Gibson | QLIST_INIT(&spapr->phbs); |
526 | d43b45e2 | David Gibson | |
527 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
528 | 9fdf0c29 | David Gibson | |
529 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
530 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
531 | 354ac20a | David Gibson | |
532 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
533 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
534 | 354ac20a | David Gibson | exit(1);
|
535 | 354ac20a | David Gibson | } |
536 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
537 | 354ac20a | David Gibson | rma_size = rma_alloc_size; |
538 | 354ac20a | David Gibson | } else {
|
539 | 354ac20a | David Gibson | rma_size = ram_size; |
540 | 354ac20a | David Gibson | } |
541 | 354ac20a | David Gibson | |
542 | 4d8d5467 | Benjamin Herrenschmidt | /* We place the device tree and RTAS just below either the top of the RMA,
|
543 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
544 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
545 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit = MIN(rma_size, 0x80000000);
|
546 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE; |
547 | 4d8d5467 | Benjamin Herrenschmidt | spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE; |
548 | 4d8d5467 | Benjamin Herrenschmidt | load_limit = spapr->fdt_addr - FW_OVERHEAD; |
549 | 9fdf0c29 | David Gibson | |
550 | 9fdf0c29 | David Gibson | /* init CPUs */
|
551 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
552 | 6b7a2cf6 | David Gibson | cpu_model = kvm_enabled() ? "host" : "POWER7"; |
553 | 9fdf0c29 | David Gibson | } |
554 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
555 | c7a5c0c9 | David Gibson | env = cpu_init(cpu_model); |
556 | 9fdf0c29 | David Gibson | |
557 | 9fdf0c29 | David Gibson | if (!env) {
|
558 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
559 | 9fdf0c29 | David Gibson | exit(1);
|
560 | 9fdf0c29 | David Gibson | } |
561 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
562 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
563 | 9fdf0c29 | David Gibson | qemu_register_reset((QEMUResetHandler *)&cpu_reset, env); |
564 | 9fdf0c29 | David Gibson | |
565 | 9fdf0c29 | David Gibson | env->hreset_vector = 0x60;
|
566 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
567 | c7a5c0c9 | David Gibson | env->gpr[3] = env->cpu_index;
|
568 | 9fdf0c29 | David Gibson | } |
569 | 9fdf0c29 | David Gibson | |
570 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
571 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
572 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
573 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
574 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
575 | 354ac20a | David Gibson | |
576 | c5705a77 | Avi Kivity | memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
|
577 | c5705a77 | Avi Kivity | vmstate_register_ram_global(ram); |
578 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
579 | 354ac20a | David Gibson | } |
580 | 9fdf0c29 | David Gibson | |
581 | f43e3525 | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
582 | f43e3525 | David Gibson | * later we should probably make it scale to the size of guest
|
583 | f43e3525 | David Gibson | * RAM */
|
584 | a3467baa | David Gibson | spapr->htab_size = 1ULL << (pteg_shift + 7); |
585 | f61b4bed | Alexander Graf | spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size); |
586 | f43e3525 | David Gibson | |
587 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
588 | a3467baa | David Gibson | env->external_htab = spapr->htab; |
589 | c7a5c0c9 | David Gibson | env->htab_base = -1;
|
590 | a3467baa | David Gibson | env->htab_mask = spapr->htab_size - 1;
|
591 | f61b4bed | Alexander Graf | |
592 | f61b4bed | Alexander Graf | /* Tell KVM that we're in PAPR mode */
|
593 | f61b4bed | Alexander Graf | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
594 | f61b4bed | Alexander Graf | ((pteg_shift + 7) - 18); |
595 | f61b4bed | Alexander Graf | env->spr[SPR_HIOR] = 0;
|
596 | f61b4bed | Alexander Graf | |
597 | f61b4bed | Alexander Graf | if (kvm_enabled()) {
|
598 | f61b4bed | Alexander Graf | kvmppc_set_papr(env); |
599 | f61b4bed | Alexander Graf | } |
600 | f43e3525 | David Gibson | } |
601 | f43e3525 | David Gibson | |
602 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
603 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
604 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit - spapr->rtas_addr); |
605 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
606 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
607 | 39ac8455 | David Gibson | exit(1);
|
608 | 39ac8455 | David Gibson | } |
609 | 4d8d5467 | Benjamin Herrenschmidt | if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
610 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
611 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_size, RTAS_MAX_SIZE); |
612 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
613 | 4d8d5467 | Benjamin Herrenschmidt | } |
614 | 7267c094 | Anthony Liguori | g_free(filename); |
615 | 39ac8455 | David Gibson | |
616 | 4d8d5467 | Benjamin Herrenschmidt | |
617 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
618 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
619 | e6c866d4 | David Gibson | spapr->next_irq = 16;
|
620 | b5cec4c5 | David Gibson | |
621 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
622 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
623 | 4040ab72 | David Gibson | |
624 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
625 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
626 | b4a78527 | David Gibson | spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i, |
627 | 277f9acf | Paolo Bonzini | serial_hds[i]); |
628 | 4040ab72 | David Gibson | } |
629 | 4040ab72 | David Gibson | } |
630 | 9fdf0c29 | David Gibson | |
631 | 3384f95c | David Gibson | /* Set up PCI */
|
632 | 3384f95c | David Gibson | spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
|
633 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_ADDR, |
634 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_SIZE, |
635 | 3384f95c | David Gibson | SPAPR_PCI_IO_WIN_ADDR); |
636 | 3384f95c | David Gibson | |
637 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
638 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
639 | 8d90ad90 | David Gibson | |
640 | 8d90ad90 | David Gibson | if (!nd->model) {
|
641 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
642 | 8d90ad90 | David Gibson | } |
643 | 8d90ad90 | David Gibson | |
644 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
645 | 277f9acf | Paolo Bonzini | spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
|
646 | 8d90ad90 | David Gibson | } else {
|
647 | 3384f95c | David Gibson | pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
648 | 8d90ad90 | David Gibson | } |
649 | 8d90ad90 | David Gibson | } |
650 | 8d90ad90 | David Gibson | |
651 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
652 | 277f9acf | Paolo Bonzini | spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
|
653 | 6e270446 | Ben Herrenschmidt | } |
654 | 6e270446 | Ben Herrenschmidt | |
655 | 4d8d5467 | Benjamin Herrenschmidt | if (rma_size < (MIN_RMA_SLOF << 20)) { |
656 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
657 | 4d8d5467 | Benjamin Herrenschmidt | "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
658 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
659 | 4d8d5467 | Benjamin Herrenschmidt | } |
660 | 4d8d5467 | Benjamin Herrenschmidt | |
661 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "sPAPR memory map:\n");
|
662 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "RTAS : 0x%08lx..%08lx\n",
|
663 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)spapr->rtas_addr, |
664 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)(spapr->rtas_addr + spapr->rtas_size - 1)); |
665 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "FDT : 0x%08lx..%08lx\n",
|
666 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)spapr->fdt_addr, |
667 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)(spapr->fdt_addr + FDT_MAX_SIZE - 1)); |
668 | 4d8d5467 | Benjamin Herrenschmidt | |
669 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
670 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
671 | 9fdf0c29 | David Gibson | |
672 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
673 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
674 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
675 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
676 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
677 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - KERNEL_LOAD_ADDR); |
678 | 9fdf0c29 | David Gibson | } |
679 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
680 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
681 | 9fdf0c29 | David Gibson | kernel_filename); |
682 | 9fdf0c29 | David Gibson | exit(1);
|
683 | 9fdf0c29 | David Gibson | } |
684 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Kernel : 0x%08x..%08lx\n",
|
685 | 4d8d5467 | Benjamin Herrenschmidt | KERNEL_LOAD_ADDR, KERNEL_LOAD_ADDR + kernel_size - 1);
|
686 | 9fdf0c29 | David Gibson | |
687 | 9fdf0c29 | David Gibson | /* load initrd */
|
688 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
689 | 4d8d5467 | Benjamin Herrenschmidt | /* Try to locate the initrd in the gap between the kernel
|
690 | 4d8d5467 | Benjamin Herrenschmidt | * and the firmware. Add a bit of space just in case
|
691 | 4d8d5467 | Benjamin Herrenschmidt | */
|
692 | 4d8d5467 | Benjamin Herrenschmidt | initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff; |
693 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
694 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - initrd_base); |
695 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
696 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
697 | 9fdf0c29 | David Gibson | initrd_filename); |
698 | 9fdf0c29 | David Gibson | exit(1);
|
699 | 9fdf0c29 | David Gibson | } |
700 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Ramdisk : 0x%08lx..%08lx\n",
|
701 | 4d8d5467 | Benjamin Herrenschmidt | (long)initrd_base, (long)(initrd_base + initrd_size - 1)); |
702 | 9fdf0c29 | David Gibson | } else {
|
703 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
704 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
705 | 9fdf0c29 | David Gibson | } |
706 | 4d8d5467 | Benjamin Herrenschmidt | } |
707 | a3467baa | David Gibson | |
708 | 4d8d5467 | Benjamin Herrenschmidt | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
709 | 4d8d5467 | Benjamin Herrenschmidt | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
710 | 4d8d5467 | Benjamin Herrenschmidt | if (fw_size < 0) { |
711 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
712 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
713 | 4d8d5467 | Benjamin Herrenschmidt | } |
714 | 4d8d5467 | Benjamin Herrenschmidt | g_free(filename); |
715 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Firmware load : 0x%08x..%08lx\n",
|
716 | 4d8d5467 | Benjamin Herrenschmidt | 0, fw_size);
|
717 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Firmware runtime : 0x%08lx..%08lx\n",
|
718 | 4d8d5467 | Benjamin Herrenschmidt | load_limit, (unsigned long)spapr->fdt_addr); |
719 | 4d8d5467 | Benjamin Herrenschmidt | |
720 | 4d8d5467 | Benjamin Herrenschmidt | spapr->entry_point = 0x100;
|
721 | 4d8d5467 | Benjamin Herrenschmidt | |
722 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF will startup the secondary CPUs using RTAS */
|
723 | 4d8d5467 | Benjamin Herrenschmidt | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
724 | 4d8d5467 | Benjamin Herrenschmidt | env->halted = 1;
|
725 | 9fdf0c29 | David Gibson | } |
726 | 9fdf0c29 | David Gibson | |
727 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
728 | 354ac20a | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size, |
729 | a3467baa | David Gibson | initrd_base, initrd_size, |
730 | 4d8d5467 | Benjamin Herrenschmidt | kernel_size, |
731 | a3467baa | David Gibson | boot_device, kernel_cmdline, |
732 | a3467baa | David Gibson | pteg_shift + 7);
|
733 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
734 | 9fdf0c29 | David Gibson | |
735 | a3467baa | David Gibson | qemu_register_reset(spapr_reset, spapr); |
736 | 9fdf0c29 | David Gibson | } |
737 | 9fdf0c29 | David Gibson | |
738 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
739 | 9fdf0c29 | David Gibson | .name = "pseries",
|
740 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
|
741 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
742 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
743 | 9fdf0c29 | David Gibson | .no_parallel = 1,
|
744 | 6e270446 | Ben Herrenschmidt | .use_scsi = 1,
|
745 | 9fdf0c29 | David Gibson | }; |
746 | 9fdf0c29 | David Gibson | |
747 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
748 | 9fdf0c29 | David Gibson | { |
749 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
750 | 9fdf0c29 | David Gibson | } |
751 | 9fdf0c29 | David Gibson | |
752 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |