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root / target-mips @ 286d52eb

Name Size
Makefile.objs 109 Bytes
TODO 1.9 kB
cpu-qom.h 1.8 kB
cpu.c 1.8 kB
cpu.h 24 kB
dsp_helper.c 143.6 kB
helper.c 22 kB
helper.h 27.9 kB
lmi_helper.c 14 kB
machine.c 10.6 kB
mips-defs.h 2.1 kB
op_helper.c 102.3 kB
translate.c 474.9 kB
translate_init.c 24.7 kB

Latest revisions

# Date Author Comment
bc3e45e1 10/31/2012 11:20 pm Aurelien Jarno

target-mips: fix TLBR wrt SEGMask

Like r4k_map_address(), r4k_helper_tlbp() should use SEGMask to mask the
address.

Signed-off-by: Aurelien Jarno <>
286d52eb 10/31/2012 11:20 pm Aurelien Jarno

target-mips: don't flush extra TLB on permissions upgrade

If the guest uses a TLBWI instruction for upgrading permissions, we
don't need to flush the extra TLBs. This improve boot time performance
by about 10%.

Signed-off-by: Aurelien Jarno <>
2d2826b9 10/31/2012 11:20 pm Aurelien Jarno

target-mips: don't use local temps for store conditional

Store conditional operations only need local temps in user mode. Fix
the code to use temp local only in user mode, this spares two memory
stores in system mode.

At the same time remove a wrong a wrong copied & pasted comment,...
acf12465 10/31/2012 11:20 pm Aurelien Jarno

target-mips: implement movn/movz using movcond

Avoid the branches in movn/movz implementation and replace them with
movcond. Also update a wrong command.

Reviewed-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
51127181 10/31/2012 11:20 pm Aurelien Jarno

target-mips: optimize ddiv/ddivu/div/divu with movcond

The result of a division by 0, or a division of INT_MIN by -1 in the
signed case, is unpredictable. Just replace 0 by 1 in that case so that
it doesn't trigger a floating point exception on the host....
e0d002f1 10/31/2012 11:20 pm Aurelien Jarno

target-mips: use deposit instead of hardcoded version

Use the deposit op instead of and hardcoded bit field insertion. It
allows the host to emit the corresponding instruction if available.

At the same time remove the (lsb > msb) test. The MIPS64R2 instruction...
2910c6cb 10/31/2012 11:20 pm Aurelien Jarno

target-mips: cleanup load/store operations

Load/store operations use macros for historical reasons. Now that there
is no point in keeping them, replace them by direct calls to qemu_ld/st.

Reviewed-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
3cee3050 10/31/2012 11:20 pm Aurelien Jarno

target-mips: optimize load operations

Only allocate t1 when needed.

Reviewed-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
18bba4dc 10/31/2012 11:20 pm Aurelien Jarno

target-mips: simplify load/store microMIPS helpers

load/store microMIPS helpers are reinventing the wheel. Call do_lw,
do_ll, do_sw and do_sl instead of using a macro calling the cpu_*
load/store functions.

Reviewed-by: Richard Henderson <>...
fc40787a 10/31/2012 11:20 pm Aurelien Jarno

target-mips: implement unaligned loads using TCG

Load/store from helpers should be avoided as they are quite
inefficient. Rewrite unaligned loads instructions using TCG and
aligned loads. The number of actual loads operations to implement
an unaligned load instruction is reduced from up to 8 to 1....

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