root / hw / xics.c @ 2b8b3bb9
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1 | b5cec4c5 | David Gibson | /*
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2 | b5cec4c5 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | b5cec4c5 | David Gibson | *
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4 | b5cec4c5 | David Gibson | * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
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5 | b5cec4c5 | David Gibson | *
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6 | b5cec4c5 | David Gibson | * Copyright (c) 2010,2011 David Gibson, IBM Corporation.
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7 | b5cec4c5 | David Gibson | *
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8 | b5cec4c5 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | b5cec4c5 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | b5cec4c5 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | b5cec4c5 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | b5cec4c5 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | b5cec4c5 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | b5cec4c5 | David Gibson | *
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15 | b5cec4c5 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | b5cec4c5 | David Gibson | * all copies or substantial portions of the Software.
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17 | b5cec4c5 | David Gibson | *
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18 | b5cec4c5 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | b5cec4c5 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | b5cec4c5 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | b5cec4c5 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | b5cec4c5 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | b5cec4c5 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | b5cec4c5 | David Gibson | * THE SOFTWARE.
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25 | b5cec4c5 | David Gibson | *
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26 | b5cec4c5 | David Gibson | */
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27 | b5cec4c5 | David Gibson | |
28 | b5cec4c5 | David Gibson | #include "hw.h" |
29 | b5cec4c5 | David Gibson | #include "hw/spapr.h" |
30 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
31 | b5cec4c5 | David Gibson | |
32 | b5cec4c5 | David Gibson | #include <pthread.h> |
33 | b5cec4c5 | David Gibson | |
34 | b5cec4c5 | David Gibson | /*
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35 | b5cec4c5 | David Gibson | * ICP: Presentation layer
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36 | b5cec4c5 | David Gibson | */
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37 | b5cec4c5 | David Gibson | |
38 | b5cec4c5 | David Gibson | struct icp_server_state {
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39 | b5cec4c5 | David Gibson | uint32_t xirr; |
40 | b5cec4c5 | David Gibson | uint8_t pending_priority; |
41 | b5cec4c5 | David Gibson | uint8_t mfrr; |
42 | b5cec4c5 | David Gibson | qemu_irq output; |
43 | b5cec4c5 | David Gibson | }; |
44 | b5cec4c5 | David Gibson | |
45 | b5cec4c5 | David Gibson | #define XISR_MASK 0x00ffffff |
46 | b5cec4c5 | David Gibson | #define CPPR_MASK 0xff000000 |
47 | b5cec4c5 | David Gibson | |
48 | b5cec4c5 | David Gibson | #define XISR(ss) (((ss)->xirr) & XISR_MASK)
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49 | b5cec4c5 | David Gibson | #define CPPR(ss) (((ss)->xirr) >> 24) |
50 | b5cec4c5 | David Gibson | |
51 | b5cec4c5 | David Gibson | struct ics_state;
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52 | b5cec4c5 | David Gibson | |
53 | b5cec4c5 | David Gibson | struct icp_state {
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54 | b5cec4c5 | David Gibson | long nr_servers;
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55 | b5cec4c5 | David Gibson | struct icp_server_state *ss;
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56 | b5cec4c5 | David Gibson | struct ics_state *ics;
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57 | b5cec4c5 | David Gibson | }; |
58 | b5cec4c5 | David Gibson | |
59 | b5cec4c5 | David Gibson | static void ics_reject(struct ics_state *ics, int nr); |
60 | b5cec4c5 | David Gibson | static void ics_resend(struct ics_state *ics); |
61 | b5cec4c5 | David Gibson | static void ics_eoi(struct ics_state *ics, int nr); |
62 | b5cec4c5 | David Gibson | |
63 | b5cec4c5 | David Gibson | static void icp_check_ipi(struct icp_state *icp, int server) |
64 | b5cec4c5 | David Gibson | { |
65 | b5cec4c5 | David Gibson | struct icp_server_state *ss = icp->ss + server;
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66 | b5cec4c5 | David Gibson | |
67 | b5cec4c5 | David Gibson | if (XISR(ss) && (ss->pending_priority <= ss->mfrr)) {
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68 | b5cec4c5 | David Gibson | return;
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69 | b5cec4c5 | David Gibson | } |
70 | b5cec4c5 | David Gibson | |
71 | b5cec4c5 | David Gibson | if (XISR(ss)) {
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72 | b5cec4c5 | David Gibson | ics_reject(icp->ics, XISR(ss)); |
73 | b5cec4c5 | David Gibson | } |
74 | b5cec4c5 | David Gibson | |
75 | b5cec4c5 | David Gibson | ss->xirr = (ss->xirr & ~XISR_MASK) | XICS_IPI; |
76 | b5cec4c5 | David Gibson | ss->pending_priority = ss->mfrr; |
77 | b5cec4c5 | David Gibson | qemu_irq_raise(ss->output); |
78 | b5cec4c5 | David Gibson | } |
79 | b5cec4c5 | David Gibson | |
80 | b5cec4c5 | David Gibson | static void icp_resend(struct icp_state *icp, int server) |
81 | b5cec4c5 | David Gibson | { |
82 | b5cec4c5 | David Gibson | struct icp_server_state *ss = icp->ss + server;
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83 | b5cec4c5 | David Gibson | |
84 | b5cec4c5 | David Gibson | if (ss->mfrr < CPPR(ss)) {
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85 | b5cec4c5 | David Gibson | icp_check_ipi(icp, server); |
86 | b5cec4c5 | David Gibson | } |
87 | b5cec4c5 | David Gibson | ics_resend(icp->ics); |
88 | b5cec4c5 | David Gibson | } |
89 | b5cec4c5 | David Gibson | |
90 | b5cec4c5 | David Gibson | static void icp_set_cppr(struct icp_state *icp, int server, uint8_t cppr) |
91 | b5cec4c5 | David Gibson | { |
92 | b5cec4c5 | David Gibson | struct icp_server_state *ss = icp->ss + server;
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93 | b5cec4c5 | David Gibson | uint8_t old_cppr; |
94 | b5cec4c5 | David Gibson | uint32_t old_xisr; |
95 | b5cec4c5 | David Gibson | |
96 | b5cec4c5 | David Gibson | old_cppr = CPPR(ss); |
97 | b5cec4c5 | David Gibson | ss->xirr = (ss->xirr & ~CPPR_MASK) | (cppr << 24);
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98 | b5cec4c5 | David Gibson | |
99 | b5cec4c5 | David Gibson | if (cppr < old_cppr) {
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100 | b5cec4c5 | David Gibson | if (XISR(ss) && (cppr <= ss->pending_priority)) {
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101 | b5cec4c5 | David Gibson | old_xisr = XISR(ss); |
102 | b5cec4c5 | David Gibson | ss->xirr &= ~XISR_MASK; /* Clear XISR */
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103 | b5cec4c5 | David Gibson | qemu_irq_lower(ss->output); |
104 | b5cec4c5 | David Gibson | ics_reject(icp->ics, old_xisr); |
105 | b5cec4c5 | David Gibson | } |
106 | b5cec4c5 | David Gibson | } else {
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107 | b5cec4c5 | David Gibson | if (!XISR(ss)) {
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108 | b5cec4c5 | David Gibson | icp_resend(icp, server); |
109 | b5cec4c5 | David Gibson | } |
110 | b5cec4c5 | David Gibson | } |
111 | b5cec4c5 | David Gibson | } |
112 | b5cec4c5 | David Gibson | |
113 | b5cec4c5 | David Gibson | static void icp_set_mfrr(struct icp_state *icp, int nr, uint8_t mfrr) |
114 | b5cec4c5 | David Gibson | { |
115 | b5cec4c5 | David Gibson | struct icp_server_state *ss = icp->ss + nr;
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116 | b5cec4c5 | David Gibson | |
117 | b5cec4c5 | David Gibson | ss->mfrr = mfrr; |
118 | b5cec4c5 | David Gibson | if (mfrr < CPPR(ss)) {
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119 | b5cec4c5 | David Gibson | icp_check_ipi(icp, nr); |
120 | b5cec4c5 | David Gibson | } |
121 | b5cec4c5 | David Gibson | } |
122 | b5cec4c5 | David Gibson | |
123 | b5cec4c5 | David Gibson | static uint32_t icp_accept(struct icp_server_state *ss) |
124 | b5cec4c5 | David Gibson | { |
125 | b5cec4c5 | David Gibson | uint32_t xirr; |
126 | b5cec4c5 | David Gibson | |
127 | b5cec4c5 | David Gibson | qemu_irq_lower(ss->output); |
128 | b5cec4c5 | David Gibson | xirr = ss->xirr; |
129 | b5cec4c5 | David Gibson | ss->xirr = ss->pending_priority << 24;
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130 | b5cec4c5 | David Gibson | return xirr;
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131 | b5cec4c5 | David Gibson | } |
132 | b5cec4c5 | David Gibson | |
133 | b5cec4c5 | David Gibson | static void icp_eoi(struct icp_state *icp, int server, uint32_t xirr) |
134 | b5cec4c5 | David Gibson | { |
135 | b5cec4c5 | David Gibson | struct icp_server_state *ss = icp->ss + server;
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136 | b5cec4c5 | David Gibson | |
137 | b5cec4c5 | David Gibson | ics_eoi(icp->ics, xirr & XISR_MASK); |
138 | b5cec4c5 | David Gibson | /* Send EOI -> ICS */
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139 | b5cec4c5 | David Gibson | ss->xirr = (ss->xirr & ~CPPR_MASK) | (xirr & CPPR_MASK); |
140 | b5cec4c5 | David Gibson | if (!XISR(ss)) {
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141 | b5cec4c5 | David Gibson | icp_resend(icp, server); |
142 | b5cec4c5 | David Gibson | } |
143 | b5cec4c5 | David Gibson | } |
144 | b5cec4c5 | David Gibson | |
145 | b5cec4c5 | David Gibson | static void icp_irq(struct icp_state *icp, int server, int nr, uint8_t priority) |
146 | b5cec4c5 | David Gibson | { |
147 | b5cec4c5 | David Gibson | struct icp_server_state *ss = icp->ss + server;
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148 | b5cec4c5 | David Gibson | |
149 | b5cec4c5 | David Gibson | if ((priority >= CPPR(ss))
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150 | b5cec4c5 | David Gibson | || (XISR(ss) && (ss->pending_priority <= priority))) { |
151 | b5cec4c5 | David Gibson | ics_reject(icp->ics, nr); |
152 | b5cec4c5 | David Gibson | } else {
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153 | b5cec4c5 | David Gibson | if (XISR(ss)) {
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154 | b5cec4c5 | David Gibson | ics_reject(icp->ics, XISR(ss)); |
155 | b5cec4c5 | David Gibson | } |
156 | b5cec4c5 | David Gibson | ss->xirr = (ss->xirr & ~XISR_MASK) | (nr & XISR_MASK); |
157 | b5cec4c5 | David Gibson | ss->pending_priority = priority; |
158 | b5cec4c5 | David Gibson | qemu_irq_raise(ss->output); |
159 | b5cec4c5 | David Gibson | } |
160 | b5cec4c5 | David Gibson | } |
161 | b5cec4c5 | David Gibson | |
162 | b5cec4c5 | David Gibson | /*
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163 | b5cec4c5 | David Gibson | * ICS: Source layer
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164 | b5cec4c5 | David Gibson | */
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165 | b5cec4c5 | David Gibson | |
166 | b5cec4c5 | David Gibson | struct ics_irq_state {
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167 | b5cec4c5 | David Gibson | int server;
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168 | b5cec4c5 | David Gibson | uint8_t priority; |
169 | b5cec4c5 | David Gibson | uint8_t saved_priority; |
170 | b5cec4c5 | David Gibson | /* int pending:1; */
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171 | b5cec4c5 | David Gibson | /* int presented:1; */
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172 | b5cec4c5 | David Gibson | int rejected:1; |
173 | b5cec4c5 | David Gibson | int masked_pending:1; |
174 | b5cec4c5 | David Gibson | }; |
175 | b5cec4c5 | David Gibson | |
176 | b5cec4c5 | David Gibson | struct ics_state {
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177 | b5cec4c5 | David Gibson | int nr_irqs;
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178 | b5cec4c5 | David Gibson | int offset;
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179 | b5cec4c5 | David Gibson | qemu_irq *qirqs; |
180 | b5cec4c5 | David Gibson | struct ics_irq_state *irqs;
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181 | b5cec4c5 | David Gibson | struct icp_state *icp;
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182 | b5cec4c5 | David Gibson | }; |
183 | b5cec4c5 | David Gibson | |
184 | b5cec4c5 | David Gibson | static int ics_valid_irq(struct ics_state *ics, uint32_t nr) |
185 | b5cec4c5 | David Gibson | { |
186 | b5cec4c5 | David Gibson | return (nr >= ics->offset)
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187 | b5cec4c5 | David Gibson | && (nr < (ics->offset + ics->nr_irqs)); |
188 | b5cec4c5 | David Gibson | } |
189 | b5cec4c5 | David Gibson | |
190 | b5cec4c5 | David Gibson | static void ics_set_irq_msi(void *opaque, int nr, int val) |
191 | b5cec4c5 | David Gibson | { |
192 | b5cec4c5 | David Gibson | struct ics_state *ics = (struct ics_state *)opaque; |
193 | b5cec4c5 | David Gibson | struct ics_irq_state *irq = ics->irqs + nr;
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194 | b5cec4c5 | David Gibson | |
195 | b5cec4c5 | David Gibson | if (val) {
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196 | b5cec4c5 | David Gibson | if (irq->priority == 0xff) { |
197 | b5cec4c5 | David Gibson | irq->masked_pending = 1;
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198 | b5cec4c5 | David Gibson | /* masked pending */ ;
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199 | b5cec4c5 | David Gibson | } else {
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200 | b5cec4c5 | David Gibson | icp_irq(ics->icp, irq->server, nr + ics->offset, irq->priority); |
201 | b5cec4c5 | David Gibson | } |
202 | b5cec4c5 | David Gibson | } |
203 | b5cec4c5 | David Gibson | } |
204 | b5cec4c5 | David Gibson | |
205 | b5cec4c5 | David Gibson | static void ics_reject_msi(struct ics_state *ics, int nr) |
206 | b5cec4c5 | David Gibson | { |
207 | b5cec4c5 | David Gibson | struct ics_irq_state *irq = ics->irqs + nr - ics->offset;
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208 | b5cec4c5 | David Gibson | |
209 | b5cec4c5 | David Gibson | irq->rejected = 1;
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210 | b5cec4c5 | David Gibson | } |
211 | b5cec4c5 | David Gibson | |
212 | b5cec4c5 | David Gibson | static void ics_resend_msi(struct ics_state *ics) |
213 | b5cec4c5 | David Gibson | { |
214 | b5cec4c5 | David Gibson | int i;
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215 | b5cec4c5 | David Gibson | |
216 | b5cec4c5 | David Gibson | for (i = 0; i < ics->nr_irqs; i++) { |
217 | b5cec4c5 | David Gibson | struct ics_irq_state *irq = ics->irqs + i;
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218 | b5cec4c5 | David Gibson | |
219 | b5cec4c5 | David Gibson | /* FIXME: filter by server#? */
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220 | b5cec4c5 | David Gibson | if (irq->rejected) {
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221 | b5cec4c5 | David Gibson | irq->rejected = 0;
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222 | b5cec4c5 | David Gibson | if (irq->priority != 0xff) { |
223 | b5cec4c5 | David Gibson | icp_irq(ics->icp, irq->server, i + ics->offset, irq->priority); |
224 | b5cec4c5 | David Gibson | } |
225 | b5cec4c5 | David Gibson | } |
226 | b5cec4c5 | David Gibson | } |
227 | b5cec4c5 | David Gibson | } |
228 | b5cec4c5 | David Gibson | |
229 | b5cec4c5 | David Gibson | static void ics_write_xive_msi(struct ics_state *ics, int nr, int server, |
230 | b5cec4c5 | David Gibson | uint8_t priority) |
231 | b5cec4c5 | David Gibson | { |
232 | b5cec4c5 | David Gibson | struct ics_irq_state *irq = ics->irqs + nr;
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233 | b5cec4c5 | David Gibson | |
234 | b5cec4c5 | David Gibson | irq->server = server; |
235 | b5cec4c5 | David Gibson | irq->priority = priority; |
236 | b5cec4c5 | David Gibson | |
237 | b5cec4c5 | David Gibson | if (!irq->masked_pending || (priority == 0xff)) { |
238 | b5cec4c5 | David Gibson | return;
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239 | b5cec4c5 | David Gibson | } |
240 | b5cec4c5 | David Gibson | |
241 | b5cec4c5 | David Gibson | irq->masked_pending = 0;
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242 | b5cec4c5 | David Gibson | icp_irq(ics->icp, server, nr + ics->offset, priority); |
243 | b5cec4c5 | David Gibson | } |
244 | b5cec4c5 | David Gibson | |
245 | b5cec4c5 | David Gibson | static void ics_reject(struct ics_state *ics, int nr) |
246 | b5cec4c5 | David Gibson | { |
247 | b5cec4c5 | David Gibson | ics_reject_msi(ics, nr); |
248 | b5cec4c5 | David Gibson | } |
249 | b5cec4c5 | David Gibson | |
250 | b5cec4c5 | David Gibson | static void ics_resend(struct ics_state *ics) |
251 | b5cec4c5 | David Gibson | { |
252 | b5cec4c5 | David Gibson | ics_resend_msi(ics); |
253 | b5cec4c5 | David Gibson | } |
254 | b5cec4c5 | David Gibson | |
255 | b5cec4c5 | David Gibson | static void ics_eoi(struct ics_state *ics, int nr) |
256 | b5cec4c5 | David Gibson | { |
257 | b5cec4c5 | David Gibson | } |
258 | b5cec4c5 | David Gibson | |
259 | b5cec4c5 | David Gibson | /*
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260 | b5cec4c5 | David Gibson | * Exported functions
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261 | b5cec4c5 | David Gibson | */
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262 | b5cec4c5 | David Gibson | |
263 | b5cec4c5 | David Gibson | qemu_irq xics_find_qirq(struct icp_state *icp, int irq) |
264 | b5cec4c5 | David Gibson | { |
265 | b5cec4c5 | David Gibson | if ((irq < icp->ics->offset)
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266 | b5cec4c5 | David Gibson | || (irq >= (icp->ics->offset + icp->ics->nr_irqs))) { |
267 | b5cec4c5 | David Gibson | return NULL; |
268 | b5cec4c5 | David Gibson | } |
269 | b5cec4c5 | David Gibson | |
270 | b5cec4c5 | David Gibson | return icp->ics->qirqs[irq - icp->ics->offset];
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271 | b5cec4c5 | David Gibson | } |
272 | b5cec4c5 | David Gibson | |
273 | b5cec4c5 | David Gibson | static target_ulong h_cppr(CPUState *env, sPAPREnvironment *spapr,
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274 | b5cec4c5 | David Gibson | target_ulong opcode, target_ulong *args) |
275 | b5cec4c5 | David Gibson | { |
276 | b5cec4c5 | David Gibson | target_ulong cppr = args[0];
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277 | b5cec4c5 | David Gibson | |
278 | b5cec4c5 | David Gibson | icp_set_cppr(spapr->icp, env->cpu_index, cppr); |
279 | b5cec4c5 | David Gibson | return H_SUCCESS;
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280 | b5cec4c5 | David Gibson | } |
281 | b5cec4c5 | David Gibson | |
282 | b5cec4c5 | David Gibson | static target_ulong h_ipi(CPUState *env, sPAPREnvironment *spapr,
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283 | b5cec4c5 | David Gibson | target_ulong opcode, target_ulong *args) |
284 | b5cec4c5 | David Gibson | { |
285 | b5cec4c5 | David Gibson | target_ulong server = args[0];
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286 | b5cec4c5 | David Gibson | target_ulong mfrr = args[1];
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287 | b5cec4c5 | David Gibson | |
288 | b5cec4c5 | David Gibson | if (server >= spapr->icp->nr_servers) {
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289 | b5cec4c5 | David Gibson | return H_PARAMETER;
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290 | b5cec4c5 | David Gibson | } |
291 | b5cec4c5 | David Gibson | |
292 | b5cec4c5 | David Gibson | icp_set_mfrr(spapr->icp, server, mfrr); |
293 | b5cec4c5 | David Gibson | return H_SUCCESS;
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294 | b5cec4c5 | David Gibson | |
295 | b5cec4c5 | David Gibson | } |
296 | b5cec4c5 | David Gibson | |
297 | b5cec4c5 | David Gibson | static target_ulong h_xirr(CPUState *env, sPAPREnvironment *spapr,
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298 | b5cec4c5 | David Gibson | target_ulong opcode, target_ulong *args) |
299 | b5cec4c5 | David Gibson | { |
300 | b5cec4c5 | David Gibson | uint32_t xirr = icp_accept(spapr->icp->ss + env->cpu_index); |
301 | b5cec4c5 | David Gibson | |
302 | b5cec4c5 | David Gibson | args[0] = xirr;
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303 | b5cec4c5 | David Gibson | return H_SUCCESS;
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304 | b5cec4c5 | David Gibson | } |
305 | b5cec4c5 | David Gibson | |
306 | b5cec4c5 | David Gibson | static target_ulong h_eoi(CPUState *env, sPAPREnvironment *spapr,
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307 | b5cec4c5 | David Gibson | target_ulong opcode, target_ulong *args) |
308 | b5cec4c5 | David Gibson | { |
309 | b5cec4c5 | David Gibson | target_ulong xirr = args[0];
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310 | b5cec4c5 | David Gibson | |
311 | b5cec4c5 | David Gibson | icp_eoi(spapr->icp, env->cpu_index, xirr); |
312 | b5cec4c5 | David Gibson | return H_SUCCESS;
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313 | b5cec4c5 | David Gibson | } |
314 | b5cec4c5 | David Gibson | |
315 | b5cec4c5 | David Gibson | static void rtas_set_xive(sPAPREnvironment *spapr, uint32_t token, |
316 | b5cec4c5 | David Gibson | uint32_t nargs, target_ulong args, |
317 | b5cec4c5 | David Gibson | uint32_t nret, target_ulong rets) |
318 | b5cec4c5 | David Gibson | { |
319 | b5cec4c5 | David Gibson | struct ics_state *ics = spapr->icp->ics;
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320 | b5cec4c5 | David Gibson | uint32_t nr, server, priority; |
321 | b5cec4c5 | David Gibson | |
322 | b5cec4c5 | David Gibson | if ((nargs != 3) || (nret != 1)) { |
323 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
324 | b5cec4c5 | David Gibson | return;
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325 | b5cec4c5 | David Gibson | } |
326 | b5cec4c5 | David Gibson | |
327 | b5cec4c5 | David Gibson | nr = rtas_ld(args, 0);
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328 | b5cec4c5 | David Gibson | server = rtas_ld(args, 1);
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329 | b5cec4c5 | David Gibson | priority = rtas_ld(args, 2);
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330 | b5cec4c5 | David Gibson | |
331 | b5cec4c5 | David Gibson | if (!ics_valid_irq(ics, nr) || (server >= ics->icp->nr_servers)
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332 | b5cec4c5 | David Gibson | || (priority > 0xff)) {
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333 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
334 | b5cec4c5 | David Gibson | return;
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335 | b5cec4c5 | David Gibson | } |
336 | b5cec4c5 | David Gibson | |
337 | b5cec4c5 | David Gibson | ics_write_xive_msi(ics, nr - ics->offset, server, priority); |
338 | b5cec4c5 | David Gibson | |
339 | b5cec4c5 | David Gibson | rtas_st(rets, 0, 0); /* Success */ |
340 | b5cec4c5 | David Gibson | } |
341 | b5cec4c5 | David Gibson | |
342 | b5cec4c5 | David Gibson | static void rtas_get_xive(sPAPREnvironment *spapr, uint32_t token, |
343 | b5cec4c5 | David Gibson | uint32_t nargs, target_ulong args, |
344 | b5cec4c5 | David Gibson | uint32_t nret, target_ulong rets) |
345 | b5cec4c5 | David Gibson | { |
346 | b5cec4c5 | David Gibson | struct ics_state *ics = spapr->icp->ics;
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347 | b5cec4c5 | David Gibson | uint32_t nr; |
348 | b5cec4c5 | David Gibson | |
349 | b5cec4c5 | David Gibson | if ((nargs != 1) || (nret != 3)) { |
350 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
351 | b5cec4c5 | David Gibson | return;
|
352 | b5cec4c5 | David Gibson | } |
353 | b5cec4c5 | David Gibson | |
354 | b5cec4c5 | David Gibson | nr = rtas_ld(args, 0);
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355 | b5cec4c5 | David Gibson | |
356 | b5cec4c5 | David Gibson | if (!ics_valid_irq(ics, nr)) {
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357 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
358 | b5cec4c5 | David Gibson | return;
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359 | b5cec4c5 | David Gibson | } |
360 | b5cec4c5 | David Gibson | |
361 | b5cec4c5 | David Gibson | rtas_st(rets, 0, 0); /* Success */ |
362 | b5cec4c5 | David Gibson | rtas_st(rets, 1, ics->irqs[nr - ics->offset].server);
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363 | b5cec4c5 | David Gibson | rtas_st(rets, 2, ics->irqs[nr - ics->offset].priority);
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364 | b5cec4c5 | David Gibson | } |
365 | b5cec4c5 | David Gibson | |
366 | b5cec4c5 | David Gibson | static void rtas_int_off(sPAPREnvironment *spapr, uint32_t token, |
367 | b5cec4c5 | David Gibson | uint32_t nargs, target_ulong args, |
368 | b5cec4c5 | David Gibson | uint32_t nret, target_ulong rets) |
369 | b5cec4c5 | David Gibson | { |
370 | b5cec4c5 | David Gibson | struct ics_state *ics = spapr->icp->ics;
|
371 | b5cec4c5 | David Gibson | uint32_t nr; |
372 | b5cec4c5 | David Gibson | |
373 | b5cec4c5 | David Gibson | if ((nargs != 1) || (nret != 1)) { |
374 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
375 | b5cec4c5 | David Gibson | return;
|
376 | b5cec4c5 | David Gibson | } |
377 | b5cec4c5 | David Gibson | |
378 | b5cec4c5 | David Gibson | nr = rtas_ld(args, 0);
|
379 | b5cec4c5 | David Gibson | |
380 | b5cec4c5 | David Gibson | if (!ics_valid_irq(ics, nr)) {
|
381 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
382 | b5cec4c5 | David Gibson | return;
|
383 | b5cec4c5 | David Gibson | } |
384 | b5cec4c5 | David Gibson | |
385 | b5cec4c5 | David Gibson | /* This is a NOP for now, since the described PAPR semantics don't
|
386 | b5cec4c5 | David Gibson | * seem to gel with what Linux does */
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387 | b5cec4c5 | David Gibson | #if 0
|
388 | b5cec4c5 | David Gibson | struct ics_irq_state *irq = xics->irqs + (nr - xics->offset);
|
389 | b5cec4c5 | David Gibson | |
390 | b5cec4c5 | David Gibson | irq->saved_priority = irq->priority;
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391 | b5cec4c5 | David Gibson | ics_write_xive_msi(xics, nr - xics->offset, irq->server, 0xff);
|
392 | b5cec4c5 | David Gibson | #endif
|
393 | b5cec4c5 | David Gibson | |
394 | b5cec4c5 | David Gibson | rtas_st(rets, 0, 0); /* Success */ |
395 | b5cec4c5 | David Gibson | } |
396 | b5cec4c5 | David Gibson | |
397 | b5cec4c5 | David Gibson | static void rtas_int_on(sPAPREnvironment *spapr, uint32_t token, |
398 | b5cec4c5 | David Gibson | uint32_t nargs, target_ulong args, |
399 | b5cec4c5 | David Gibson | uint32_t nret, target_ulong rets) |
400 | b5cec4c5 | David Gibson | { |
401 | b5cec4c5 | David Gibson | struct ics_state *ics = spapr->icp->ics;
|
402 | b5cec4c5 | David Gibson | uint32_t nr; |
403 | b5cec4c5 | David Gibson | |
404 | b5cec4c5 | David Gibson | if ((nargs != 1) || (nret != 1)) { |
405 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
406 | b5cec4c5 | David Gibson | return;
|
407 | b5cec4c5 | David Gibson | } |
408 | b5cec4c5 | David Gibson | |
409 | b5cec4c5 | David Gibson | nr = rtas_ld(args, 0);
|
410 | b5cec4c5 | David Gibson | |
411 | b5cec4c5 | David Gibson | if (!ics_valid_irq(ics, nr)) {
|
412 | b5cec4c5 | David Gibson | rtas_st(rets, 0, -3); |
413 | b5cec4c5 | David Gibson | return;
|
414 | b5cec4c5 | David Gibson | } |
415 | b5cec4c5 | David Gibson | |
416 | b5cec4c5 | David Gibson | /* This is a NOP for now, since the described PAPR semantics don't
|
417 | b5cec4c5 | David Gibson | * seem to gel with what Linux does */
|
418 | b5cec4c5 | David Gibson | #if 0
|
419 | b5cec4c5 | David Gibson | struct ics_irq_state *irq = xics->irqs + (nr - xics->offset);
|
420 | b5cec4c5 | David Gibson | |
421 | b5cec4c5 | David Gibson | ics_write_xive_msi(xics, nr - xics->offset,
|
422 | b5cec4c5 | David Gibson | irq->server, irq->saved_priority);
|
423 | b5cec4c5 | David Gibson | #endif
|
424 | b5cec4c5 | David Gibson | |
425 | b5cec4c5 | David Gibson | rtas_st(rets, 0, 0); /* Success */ |
426 | b5cec4c5 | David Gibson | } |
427 | b5cec4c5 | David Gibson | |
428 | c7a5c0c9 | David Gibson | struct icp_state *xics_system_init(int nr_irqs) |
429 | b5cec4c5 | David Gibson | { |
430 | c7a5c0c9 | David Gibson | CPUState *env; |
431 | c7a5c0c9 | David Gibson | int max_server_num;
|
432 | b5cec4c5 | David Gibson | int i;
|
433 | b5cec4c5 | David Gibson | struct icp_state *icp;
|
434 | b5cec4c5 | David Gibson | struct ics_state *ics;
|
435 | b5cec4c5 | David Gibson | |
436 | c7a5c0c9 | David Gibson | max_server_num = -1;
|
437 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
438 | c7a5c0c9 | David Gibson | if (env->cpu_index > max_server_num) {
|
439 | c7a5c0c9 | David Gibson | max_server_num = env->cpu_index; |
440 | c7a5c0c9 | David Gibson | } |
441 | c7a5c0c9 | David Gibson | } |
442 | c7a5c0c9 | David Gibson | |
443 | b5cec4c5 | David Gibson | icp = qemu_mallocz(sizeof(*icp));
|
444 | c7a5c0c9 | David Gibson | icp->nr_servers = max_server_num + 1;
|
445 | c7a5c0c9 | David Gibson | icp->ss = qemu_mallocz(icp->nr_servers*sizeof(struct icp_server_state)); |
446 | c7a5c0c9 | David Gibson | |
447 | c7a5c0c9 | David Gibson | for (i = 0; i < icp->nr_servers; i++) { |
448 | c7a5c0c9 | David Gibson | icp->ss[i].mfrr = 0xff;
|
449 | c7a5c0c9 | David Gibson | } |
450 | b5cec4c5 | David Gibson | |
451 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
452 | c7a5c0c9 | David Gibson | struct icp_server_state *ss = &icp->ss[env->cpu_index];
|
453 | b5cec4c5 | David Gibson | |
454 | c7a5c0c9 | David Gibson | switch (PPC_INPUT(env)) {
|
455 | b5cec4c5 | David Gibson | case PPC_FLAGS_INPUT_POWER7:
|
456 | c7a5c0c9 | David Gibson | ss->output = env->irq_inputs[POWER7_INPUT_INT]; |
457 | b5cec4c5 | David Gibson | break;
|
458 | b5cec4c5 | David Gibson | |
459 | b5cec4c5 | David Gibson | case PPC_FLAGS_INPUT_970:
|
460 | c7a5c0c9 | David Gibson | ss->output = env->irq_inputs[PPC970_INPUT_INT]; |
461 | b5cec4c5 | David Gibson | break;
|
462 | b5cec4c5 | David Gibson | |
463 | b5cec4c5 | David Gibson | default:
|
464 | b5cec4c5 | David Gibson | hw_error("XICS interrupt model does not support this CPU bus "
|
465 | b5cec4c5 | David Gibson | "model\n");
|
466 | b5cec4c5 | David Gibson | exit(1);
|
467 | b5cec4c5 | David Gibson | } |
468 | b5cec4c5 | David Gibson | } |
469 | b5cec4c5 | David Gibson | |
470 | b5cec4c5 | David Gibson | ics = qemu_mallocz(sizeof(*ics));
|
471 | b5cec4c5 | David Gibson | ics->nr_irqs = nr_irqs; |
472 | b5cec4c5 | David Gibson | ics->offset = 16;
|
473 | b5cec4c5 | David Gibson | ics->irqs = qemu_mallocz(nr_irqs * sizeof(struct ics_irq_state)); |
474 | b5cec4c5 | David Gibson | |
475 | b5cec4c5 | David Gibson | icp->ics = ics; |
476 | b5cec4c5 | David Gibson | ics->icp = icp; |
477 | b5cec4c5 | David Gibson | |
478 | b5cec4c5 | David Gibson | for (i = 0; i < nr_irqs; i++) { |
479 | b5cec4c5 | David Gibson | ics->irqs[i].priority = 0xff;
|
480 | b5cec4c5 | David Gibson | ics->irqs[i].saved_priority = 0xff;
|
481 | b5cec4c5 | David Gibson | } |
482 | b5cec4c5 | David Gibson | |
483 | b5cec4c5 | David Gibson | ics->qirqs = qemu_allocate_irqs(ics_set_irq_msi, ics, nr_irqs); |
484 | b5cec4c5 | David Gibson | |
485 | b5cec4c5 | David Gibson | spapr_register_hypercall(H_CPPR, h_cppr); |
486 | b5cec4c5 | David Gibson | spapr_register_hypercall(H_IPI, h_ipi); |
487 | b5cec4c5 | David Gibson | spapr_register_hypercall(H_XIRR, h_xirr); |
488 | b5cec4c5 | David Gibson | spapr_register_hypercall(H_EOI, h_eoi); |
489 | b5cec4c5 | David Gibson | |
490 | b5cec4c5 | David Gibson | spapr_rtas_register("ibm,set-xive", rtas_set_xive);
|
491 | b5cec4c5 | David Gibson | spapr_rtas_register("ibm,get-xive", rtas_get_xive);
|
492 | b5cec4c5 | David Gibson | spapr_rtas_register("ibm,int-off", rtas_int_off);
|
493 | b5cec4c5 | David Gibson | spapr_rtas_register("ibm,int-on", rtas_int_on);
|
494 | b5cec4c5 | David Gibson | |
495 | b5cec4c5 | David Gibson | return icp;
|
496 | b5cec4c5 | David Gibson | } |