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qemu: clean up target page usage in msix
Since cpu_register_phys_memory does not require size to be a multiple oftarget page size, simply make msix page size 0x1000. Do this in msix,reverting part of 5e520a7d500ec2569d22d80f9ef4272a34cb3c80, as we nolonger have to pass target page around....
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
Compile msix only once
Get page size in device init.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Make CPURead/WriteFunc structure 'const'
qemu: msix nit: clear msix_entries_nr on error
I don't think it's critical to do this, but it'sbest to keep uninit and error recovery consistent.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
qemu/msi: clean used vectors state on load
Clean up msix vector usage state on load. Since guest might have controlover it through the device, the device will have to load this state fromfile.
qemu/msi: missing braces
MSIX present bit is tested incorrectly, and only happens to work becausethe bit we are testing is 0x1. Add braces to fix this.
Reported-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Michael S. Tsirkin <mst@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
fix segfault in msix_save
This fixes segfault reported by Kevin Wolf,and simplifies the code in msix_save.
Reported-by: Kevin Wolf <kwolf@redhat.com>Signed-off-by: Michael S. Tsirkin <mst@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Fix Sparse warning
qemu/pci: MSI-X support functions
Add functions implementing MSI-X support. First user will be virtio-pci.Note that platform must set a flag to declare MSI supported: thisis a safety measure to avoid breaking platforms which should supportMSI-X but currently lack this in the interrupt controller emulation....