History | View | Annotate | Download (39.2 kB)
Merge remote-tracking branch 'qemu-kvm/uq/master' into stable-1.5
target-i386: Move hyperv_* static globals to X86CPU
- since hyperv_* helper functions are used only in target-i386/kvm.c move them there as static helpers
Requested-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Igor Mammedov <imammedo@redhat.com>...
kvm: migrate vPMU state
Reviewed-by: Gleb Natapov <gnatapov@redhat.com>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target-i386: remove tabs from target-i386/cpu.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Initialize IA32_FEATURE_CONTROL MSR in reset and migration
The recent KVM patch adds IA32_FEATURE_CONTROL support. QEMU needsto clear this MSR when reset vCPU and keep the value of it whenmigration. This patch add this feature.
Signed-off-by: Arthur Chunqi Li <yzt356@gmail.com>...
cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
Where no extra implementation is needed, fall back to CPUClass::set_pc().
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Change do_smm_enter() argument to X86CPU
Prepares for log_cpu_state_mask() changing argument to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user
The functions cpu_clone_regs() and cpu_set_tls() are not purely CPUrelated -- they are specific to the TLS ABI for a a particular OS.Move them into the linux-user/ tree where they belong....
target-i386/helper: remove DF macro
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>Reviewed-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-i386/helper: remove EIP macro
target-i386/helper: remove EDI macro
target-i386/helper: remove ESI macro
target-i386/helper: remove ESP macro
target-i386/helper: remove EBP macro
target-i386/helper: remove EDX macro
target-i386/helper: remove ECX macro
target-i386/helper: remove EBX macro
target-i386/helper: remove EAX macro
target-i386: Introduce generic CPUID feature compat function
Introduce x86_cpu_compat_set_features(), that can be used to set/unsetfeature bits on specific CPU models for machine-type compatibility.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Replace cpuid_*features fields with a feature word array
This replaces the feature-bit fields on both X86CPU and x86_def_tstructs with an array.
With this, we will be able to simplify code that simply does the sameoperation on all feature words (e.g. kvm_check_features_against_host(),...
target-i386: Group together level, xlevel, xlevel2 fields
Consolidate level, xlevel, xlevel2 fields in x86_def_t and CPUX86State.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Attach ICC bus to CPU on its creation
X86CPU should have parent bus so it could provide bus for child APIC.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Replace MSI_SPACE_SIZE with APIC_SPACE_SIZE
Put APIC_SPACE_SIZE in a public header so that it can bereused elsewhere later.
target-i386: kvm: save/restore steal time MSR
Read and write steal time MSR, so that reporting is functional acrossmigration.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Gleb Natapov <gleb@redhat.com>
target-i386: Split out CPU creation and features parsing
Move CPU creation and features parsing into a separate cpu_x86_create()function, so that board would be able to set board-specific CPUproperties before CPU is realized.
Keep cpu_x86_init() for compatibility with the code that uses cpu_init()...
hw: move headers to include/
Many of these should be cleaned up with proper qdev-/QOM-ification.Right now there are many catch-all headers in include/hw/ARCH dependingon cpu.h, and this makes it necessary to compile these files per-target.However, fixing this does not belong in these patches....
extract/unify the constant 0xfee00000 as APIC_DEFAULT_ADDRESS
A common dependency of the constant's current users:- hw/apic_common.c- hw/i386/kvmvapic.c- target-i386/cpu.cis "target-i386/cpu.h".
Signed-off-by: Laszlo Ersek <lersek@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>...
strip some whitespace
Signed-off-by: Laszlo Ersek <lersek@redhat.com>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Message-id: 1363821803-3380-2-git-send-email-lersek@redhat.comSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together.Explicitly zero them on reset since they were located beforebreakpoints.
Pass PowerPCCPU to kvmppc_handle_halt().
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one stepcloser to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU...
target-i386: Update VMStateDescription to X86CPU
Expose vmstate_cpu as vmstate_x86_cpu and hook it up to CPUClass::vmsd.Adapt opaques and VMState fields to X86CPU. Drop cpu_{save,load}().
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Implement ADX extension
Signed-off-by: Richard Henderson <rth@twiddle.net>
target-i386: Add CC_OP_CLR
Special case xor with self. We need not even store the knownzero into cc_src.
target-i386: Implement BLSR, BLSMSK, BLSI
Do all of group 17 at one time for ease.
target-i386: Use CC_SRC2 for ADC and SBB
Add another slot in ENV and store two of the three inputs. This lets usdo less work when carry-out is not needed, and avoids the unpredictableCC_OP after translating these insns.
target-i386: compute eflags outside rcl/rcr helper
Always compute EFLAGS first since it is needed wheneverthe shift is non-zero, i.e. most of the time. This makes it possibleto remove some writes of CC_OP_EFLAGS to cpu_cc_op and more importantlyremoves cases where s->cc_op becomes CC_OP_DYNAMIC. Also, we can...
target-i386: Name the cc_op enumeration
target-i386: Move cpu_x86_init()
Consolidate CPU functions in cpu.c.Allows to make cpu_x86_register() static.
No functional changes.
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Pass X86CPU to cpu_x86_set_a20()
Prepares for cpu_interrupt() changing argument to CPUState.
While touching it, rename to x86_cpu_...() now that it takes an X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
target-i386: Introduce x86_cpu_apic_id_from_index() function
This function will be used by both the CPU initialization code and thefw_cfg table initialization code.
Later this function will be updated to generate APIC IDs according tothe CPU topology....
pc: Generate APIC IDs according to CPU topology
This keeps compatibility on machine-types pc-1.2 and older, and prints awarning in case the requested configuration won't get the correcttopology.
I couldn't think of a better way to warn about broken topology when in...
target-i386: Replace uint32_t vendor fields by vendor string in x86_def_t
Vendor property setter takes string as vendor value but cpudefsuse uint32_t vendor123 fields to define vendor value. It makes itdifficult to unify and use property setter for values from cpudefs....
target-i386: Remove vendor_override field from CPUX86State
Commit 8935499831312 makes cpuid return to guest host's vendor valueinstead of built-in one by default if kvm_enabled() == true and allowsto override this behavior if 'vendor' is specified on -cpu command line....
pc: Reverse pc_init_pci() compatibility logic
Currently, the pc-1.4 machine init function enables PV EOI and thencalls the pc-1.2 machine init function. The problem with this approachis that now we can't enable any additional compatibility code inside the...
target-i386: Use switch in check_hw_breakpoints()
Replace an if statement using magic numbers for breakpoint type with amore explicit switch statement. This is to aid readability.
Change the return type and force_dr6_update argument type to bool.
While at it, fix Coding Style issues (missing braces)....
target-i386: Introduce hw_{local,global}_breakpoint_enabled()
hw_breakpoint_enabled() returned a bit field indicating whether a localbreakpoint and/or global breakpoint was enabled. Avoid this number magicby using explicit boolean helper functions hw_local_breakpoint_enabled()...
target-i386: Define DR7 bit field constants
Implicit use of dr7 bit field is a little hard to understand,so define constants for them and use them consistently.
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386/cpu: Introduce FeatureWord typedefs
This introduces a FeatureWord enum, FeatureWordInfo struct (withgeneration information about a feature word), and a FeatureWordArraytypedef, and changes add_flagname_to_bitmaps() code andcpu_x86_parse_featurestr() to use the new typedefs instead of separate...
target-i386: check/enforce: Fix CPUID leaf numbers on error messages
The -cpu check/enforce warnings are printing incorrect information about themissing flags. There are no feature flags on CPUID leaves 0 and 0x80000000, butthere were references to 0 and 0x80000000 in the table at...
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
fpu: move public header file to include/fpu
exec: move include files to include/exec/
target-i386: Enabling IA32_TSC_ADJUST for QEMU KVM guest VMs
CPUID.7.0.EBX1=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
Basic design is to emulate the MSR by allowing reads and writes to thehypervisor vcpu specific locations to store the value of the emulated MSRs....
target-i386: Use define for cpuid vendor string size
Signed-off-by: Igor Mammedov <imammedo@redhat.com>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386/cpu: Name new CPUID bits
Update QEMU's knowledge of CPUID bit names. This allows toenable/disable those new features on QEMU's command line whenusing KVM and prepares future feature enablement in QEMU.
This adds F16C, RDRAND, LWP, TBM, TopoExt, PerfCtr_Core, PerfCtr_NB,...
target-i386: Pass X86CPU to cpu_x86_inject_mce()
Needed for changing run_on_cpu() argument to CPUState.
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>[AF: Updated new target-openrisc function accordingly]...
target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
Simplifies the call in apic_sipi() again and needed for moving haltedfield to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Igor Mammedov <imammedo@redhat.com>
qemu: enable PV EOI for qemu 1.3
Enable KVM PV EOI by default. You can still disable it with-kvm_pv_eoi cpu flag. To avoid breaking cross-version migration,enable only for qemu 1.3 (or in the future, newer) machine type.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from beingx86-specific flags to being generic ones. This allows us to drop someTARGET_I386 ifdefs in various places, and means that we can (potentially)...
x86: Implement SMEP and SMAP
This patch implements Supervisor Mode Execution Prevention (SMEP) andSupervisor Mode Access Prevention (SMAP) for x86. The purpose of thepatch, obviously, is to help kernel developers debug the support forthose features....
i386: kvm: use a #define for the set of alias feature bits
Instea of using a hardcoded hex constant, define CPUID_EXT2_AMD_ALIASESas the set of CPUID[8000_0001].EDX bits that on AMD are the same as thebits of CPUID1.EDX.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>...
Drop cpu_list_id macro
Since the only user of the extended cpu_list_id() formatwas the x86 ?model/?dump/?cpuid output, we can drop itcompletely.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>...
target-i386: Add missing CPUID_* constants
Those constants will be used by new CPU model definitions.
kvm: get/set PV EOI MSR
Support get/set of new PV EOI MSR, for migration.Add an optional section for MSR value - send itout in case MSR was changed from the default value (0).
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu
apic: Defer interrupt updates to VCPU thread
KVM performs TPR raising asynchronously to QEMU, specifically outsideQEMU's global lock. When an interrupt is injected into the APIC and TPRis checked to decide if this can be delivered, a stale TPR value may be...
kvm: expose tsc deadline timer feature to guest
This patch exposes tsc deadline timer feature to guest if1). in-kernel irqchip is used, and2). kvm has emulated tsc deadline timer, and3). user authorize the feature exposing via cpu or +/ tsc-deadline...
x86: split off SVM helpers
Move SVM helpers to svm_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
x86: avoid AREG0 for exceptions
Add an explicit CPUX86State parameter instead of relying on AREG0.
Merge raise_exception_env() to raise_exception(), likewise withraise_exception_err_env() and raise_exception_err().
Introduce cpu_svm_check_intercept_param() and cpu_vmexit()...
x86: split off exception handlers
Move exception handlers from op_helper.c to excp_helper.c.
x86: split off condition code helpers
Move condition code helpers to cc_helper.c.
Move the shared inline functions lshift(), cpu_load_eflags() andcpu_cc_compute_all() to cpu.h.
target-i386: move tcg initialization into x86_cpu_initfn()
In order to make cpu object not depended on external ad-hocinitialization routines, move tcg initialization from cpu_x86_initinside cpu object "x86_cpu_initfn()".
Signed-off-by: Igor Mammedov <imammedo@redhat.com>...
target-i386: Pass X86CPU to do_cpu_{init,sipi}()
Allows to use cpu_reset() in place of cpu_state_reset().
target-i386: Let cpu_x86_init() return X86CPU
Turn cpu_init macro into a static inline function returning CPUX86Statefor backwards compatibility.
Expose CPUID leaf 7 only for -cpu host
Changes v2 -> v3; - Check for kvm_enabled() before setting cpuid_7_0_ebx_features
Changes v1 -> v2: - Use kvm_arch_get_supported_cpuid() instead of host_cpuid() on cpu_x86_fill_host().
We should use GET_SUPPORTED_CPUID for all bits on "-cpu host"...
target-i386: Pass X86CPU to cpu_x86_register()
Avoids an x86_env_get_cpu() call there, to work with QOM properties.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Igor Mammedov <imammedo@redhat.com>
target-i386: QOM'ify CPU
Embed CPUX86State as first member of X86CPU.Distinguish between "x86_64-cpu" and "i386-cpu".Drop cpu_x86_close() in favor of calling object_delete() directly.
For now let CPUClass::reset() call cpu_state_reset().
Rename CPUState -> CPUArchState
Scripted conversion: for file in .[hc] hw/.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done...
target-i386: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUX86State/g" target-i386/*.[hc] sed -i "s/#define CPUX86State/#define CPUState/" target-i386/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
target-i386: Mask NX bit from cpu_get_phys_page_debug result
This was a long pending bug, now revealed by the assert inphys_page_find that stumbled over the large page index returned bycpu_get_phys_page_debug for NX-marked pages: We need to mask out NX and...
target-i386: Add infrastructure for reporting TPR MMIO accesses
This will allow the APIC core to file a TPR access report. Depending onthe accelerator and kernel irqchip mode, it will either be deliveredright away or queued for later reporting.
In TCG mode, we can restart the triggering instruction and can therefore...
kvm: x86: Avoid runtime allocation of xsave buffer
Keep a per-VCPU xsave buffer for kvm_put/get_xsave instead ofcontinuously allocating and freeing it on state sync.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
i386: wire up MSR_IA32_MISC_ENABLE
It's needed for its default value - bit 0 specifies that "rep movs" isgood enough for memcpy, and Linux may use a slower memcpu if it is not set,depending on cpu family/model.
Signed-off-by: Avi Kivity <avi@redhat.com>...
kvm: support TSC deadline MSR with subsection
KVM add emulation of lapic tsc deadline timer for guest.This patch is co-operation work at qemu side.
Use subsections to save/restore the field (mtosatti).
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>...
Revert "kvm: support TSC deadline MSR"
This reverts commit bfc2455ddbb41148494a084d15777e6bed7533c3.New patch with subsections will follow.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
kvm: support TSC deadline MSR
Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
target-i386: Remove data type CCTable
Remove also two assert statements which were the last remaining users.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
qemu-x86: Add tsc_freq option to -cpu
To let the user configure the desired tsc frequency for theguest if running in KVM.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This isneeded by later patches.
x86: use caller supplied CPUState for interrupt related stuff
Several x86 specific functions are called from cpu-exec.c with theassumption that global env register is valid. This will be changedlater, so make the functions use caller supplied CPUState parameter....
kvm: x86: Save/restore FPU OP, IP and DP
These FPU states are properly maintained by KVM but not yet by TCG. Sofar we unconditionally set them to 0 in the guest which may causestate corruptions, though not with modern guests.
To avoid breaking backward migration, use a conditional subsection that...
kvm: Add CPUID support for VIA CPU
When KVM is running on VIA CPU with host cpu's model, thefeautures of VIA CPU will be passed into kvm guest by callingthe CPUID instruction for Centaur.
Signed-off-by: BrillyWu<brillywu@viatech.com.cn>Signed-off-by: KaryJin<karyjin@viatech.com.cn>...
target-i386: remove old code handling float64
Now that target-i386 uses softfloat, floatx80 is always available andthere is no need anymore to have code handling both float64 and floax80.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
irq: Privatize CPU_INTERRUPT_NMI.
This interrupt name is used by i386, CRIS, and MicroBlaze.Copy the name into each target.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-i386: Privatize some i386-specific interrupt names.
SMI, VIRQ, INIT, SIPI, and MCE are all only used by the i386 port.
x86: Properly reset PAT MSR
Conforming to the Intel spec, set the power-on value of PAT also onreset, but save it across INIT.