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Revision 352367e8

ID352367e8bb53bd4e16abaecbcb9fc0bcadf5881b

Added by Sebastian Macke over 10 years ago

target-openrisc: Speed up move instruction

The OpenRISC architecture does not have its own move register
instruction. Instead it uses either "l.addi rd, r0, x" or
"l.ori rd, rs, 0" or "l.or rd, rx, r0"

The l.ori instruction is automatically optimized but not the l.addi instruction.
This patch optimizes for this special case.

Signed-off-by: Sebastian Macke <>
Reviewed-by: Jia Liu <>
Signed-off-by: Jia Liu <>

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