root / hw / spapr.c @ 37952117
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 8d90ad90 | David Gibson | #include "net.h" |
31 | 6e270446 | Ben Herrenschmidt | #include "blockdev.h" |
32 | e97c3636 | David Gibson | #include "cpus.h" |
33 | e97c3636 | David Gibson | #include "kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
43 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
44 | 9fdf0c29 | David Gibson | |
45 | f61b4bed | Alexander Graf | #include "kvm.h" |
46 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
47 | 3384f95c | David Gibson | #include "pci.h" |
48 | f61b4bed | Alexander Graf | |
49 | 890c2b77 | Avi Kivity | #include "exec-memory.h" |
50 | 890c2b77 | Avi Kivity | |
51 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
52 | 9fdf0c29 | David Gibson | |
53 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF memory layout:
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54 | 4d8d5467 | Benjamin Herrenschmidt | *
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55 | 4d8d5467 | Benjamin Herrenschmidt | * SLOF raw image loaded at 0, copies its romfs right below the flat
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56 | 4d8d5467 | Benjamin Herrenschmidt | * device-tree, then position SLOF itself 31M below that
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57 | 4d8d5467 | Benjamin Herrenschmidt | *
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58 | 4d8d5467 | Benjamin Herrenschmidt | * So we set FW_OVERHEAD to 40MB which should account for all of that
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59 | 4d8d5467 | Benjamin Herrenschmidt | * and more
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60 | 4d8d5467 | Benjamin Herrenschmidt | *
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61 | 4d8d5467 | Benjamin Herrenschmidt | * We load our kernel at 4M, leaving space for SLOF initial image
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62 | 4d8d5467 | Benjamin Herrenschmidt | */
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63 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
64 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
65 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
66 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
67 | 4d8d5467 | Benjamin Herrenschmidt | #define FW_OVERHEAD 0x2800000 |
68 | 4d8d5467 | Benjamin Herrenschmidt | #define KERNEL_LOAD_ADDR FW_MAX_SIZE
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69 | a9f8ad8f | David Gibson | |
70 | 4d8d5467 | Benjamin Herrenschmidt | #define MIN_RMA_SLOF 128UL |
71 | 9fdf0c29 | David Gibson | |
72 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
73 | 9fdf0c29 | David Gibson | |
74 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
75 | 4d8d5467 | Benjamin Herrenschmidt | #define XICS_IRQS 1024 |
76 | 9fdf0c29 | David Gibson | |
77 | 3384f95c | David Gibson | #define SPAPR_PCI_BUID 0x800000020000001ULL |
78 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_ADDR (0x10000000000ULL + 0xA0000000) |
79 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_SIZE 0x20000000 |
80 | 3384f95c | David Gibson | #define SPAPR_PCI_IO_WIN_ADDR (0x10000000000ULL + 0x80000000) |
81 | 3384f95c | David Gibson | |
82 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
83 | 0c103f8e | David Gibson | |
84 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
85 | 9fdf0c29 | David Gibson | |
86 | d07fee7e | David Gibson | qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num, |
87 | d07fee7e | David Gibson | enum xics_irq_type type)
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88 | e6c866d4 | David Gibson | { |
89 | e6c866d4 | David Gibson | uint32_t irq; |
90 | e6c866d4 | David Gibson | qemu_irq qirq; |
91 | e6c866d4 | David Gibson | |
92 | e6c866d4 | David Gibson | if (hint) {
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93 | e6c866d4 | David Gibson | irq = hint; |
94 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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95 | e6c866d4 | David Gibson | } else {
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96 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
97 | e6c866d4 | David Gibson | } |
98 | e6c866d4 | David Gibson | |
99 | d07fee7e | David Gibson | qirq = xics_assign_irq(spapr->icp, irq, type); |
100 | e6c866d4 | David Gibson | if (!qirq) {
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101 | e6c866d4 | David Gibson | return NULL; |
102 | e6c866d4 | David Gibson | } |
103 | e6c866d4 | David Gibson | |
104 | e6c866d4 | David Gibson | if (irq_num) {
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105 | e6c866d4 | David Gibson | *irq_num = irq; |
106 | e6c866d4 | David Gibson | } |
107 | e6c866d4 | David Gibson | |
108 | e6c866d4 | David Gibson | return qirq;
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109 | e6c866d4 | David Gibson | } |
110 | e6c866d4 | David Gibson | |
111 | 6e806cc3 | Bharata B Rao | static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr) |
112 | 6e806cc3 | Bharata B Rao | { |
113 | 6e806cc3 | Bharata B Rao | int ret = 0, offset; |
114 | e2684c0b | Andreas Färber | CPUPPCState *env; |
115 | 6e806cc3 | Bharata B Rao | char cpu_model[32]; |
116 | 6e806cc3 | Bharata B Rao | int smt = kvmppc_smt_threads();
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117 | 6e806cc3 | Bharata B Rao | |
118 | 6e806cc3 | Bharata B Rao | assert(spapr->cpu_model); |
119 | 6e806cc3 | Bharata B Rao | |
120 | 6e806cc3 | Bharata B Rao | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
121 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x5),
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122 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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123 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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124 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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125 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->numa_node), |
126 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->cpu_index)}; |
127 | 6e806cc3 | Bharata B Rao | |
128 | 6e806cc3 | Bharata B Rao | if ((env->cpu_index % smt) != 0) { |
129 | 6e806cc3 | Bharata B Rao | continue;
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130 | 6e806cc3 | Bharata B Rao | } |
131 | 6e806cc3 | Bharata B Rao | |
132 | 6e806cc3 | Bharata B Rao | snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, |
133 | 6e806cc3 | Bharata B Rao | env->cpu_index); |
134 | 6e806cc3 | Bharata B Rao | |
135 | 6e806cc3 | Bharata B Rao | offset = fdt_path_offset(fdt, cpu_model); |
136 | 6e806cc3 | Bharata B Rao | if (offset < 0) { |
137 | 6e806cc3 | Bharata B Rao | return offset;
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138 | 6e806cc3 | Bharata B Rao | } |
139 | 6e806cc3 | Bharata B Rao | |
140 | 6e806cc3 | Bharata B Rao | ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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141 | 6e806cc3 | Bharata B Rao | sizeof(associativity));
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142 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
143 | 6e806cc3 | Bharata B Rao | return ret;
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144 | 6e806cc3 | Bharata B Rao | } |
145 | 6e806cc3 | Bharata B Rao | } |
146 | 6e806cc3 | Bharata B Rao | return ret;
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147 | 6e806cc3 | Bharata B Rao | } |
148 | 6e806cc3 | Bharata B Rao | |
149 | 5af9873d | Benjamin Herrenschmidt | |
150 | 5af9873d | Benjamin Herrenschmidt | static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
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151 | 5af9873d | Benjamin Herrenschmidt | size_t maxsize) |
152 | 5af9873d | Benjamin Herrenschmidt | { |
153 | 5af9873d | Benjamin Herrenschmidt | size_t maxcells = maxsize / sizeof(uint32_t);
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154 | 5af9873d | Benjamin Herrenschmidt | int i, j, count;
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155 | 5af9873d | Benjamin Herrenschmidt | uint32_t *p = prop; |
156 | 5af9873d | Benjamin Herrenschmidt | |
157 | 5af9873d | Benjamin Herrenschmidt | for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) { |
158 | 5af9873d | Benjamin Herrenschmidt | struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
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159 | 5af9873d | Benjamin Herrenschmidt | |
160 | 5af9873d | Benjamin Herrenschmidt | if (!sps->page_shift) {
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161 | 5af9873d | Benjamin Herrenschmidt | break;
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162 | 5af9873d | Benjamin Herrenschmidt | } |
163 | 5af9873d | Benjamin Herrenschmidt | for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) { |
164 | 5af9873d | Benjamin Herrenschmidt | if (sps->enc[count].page_shift == 0) { |
165 | 5af9873d | Benjamin Herrenschmidt | break;
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166 | 5af9873d | Benjamin Herrenschmidt | } |
167 | 5af9873d | Benjamin Herrenschmidt | } |
168 | 5af9873d | Benjamin Herrenschmidt | if ((p - prop) >= (maxcells - 3 - count * 2)) { |
169 | 5af9873d | Benjamin Herrenschmidt | break;
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170 | 5af9873d | Benjamin Herrenschmidt | } |
171 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->page_shift); |
172 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->slb_enc); |
173 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(count); |
174 | 5af9873d | Benjamin Herrenschmidt | for (j = 0; j < count; j++) { |
175 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].page_shift); |
176 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].pte_enc); |
177 | 5af9873d | Benjamin Herrenschmidt | } |
178 | 5af9873d | Benjamin Herrenschmidt | } |
179 | 5af9873d | Benjamin Herrenschmidt | |
180 | 5af9873d | Benjamin Herrenschmidt | return (p - prop) * sizeof(uint32_t); |
181 | 5af9873d | Benjamin Herrenschmidt | } |
182 | 5af9873d | Benjamin Herrenschmidt | |
183 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
184 | 354ac20a | David Gibson | target_phys_addr_t rma_size, |
185 | a3467baa | David Gibson | target_phys_addr_t initrd_base, |
186 | a3467baa | David Gibson | target_phys_addr_t initrd_size, |
187 | 4d8d5467 | Benjamin Herrenschmidt | target_phys_addr_t kernel_size, |
188 | a3467baa | David Gibson | const char *boot_device, |
189 | a3467baa | David Gibson | const char *kernel_cmdline, |
190 | a3467baa | David Gibson | long hash_shift)
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191 | 9fdf0c29 | David Gibson | { |
192 | 9fdf0c29 | David Gibson | void *fdt;
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193 | e2684c0b | Andreas Färber | CPUPPCState *env; |
194 | 6e806cc3 | Bharata B Rao | uint64_t mem_reg_property[2];
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195 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
196 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
197 | f43e3525 | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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198 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
199 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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200 | c73e3771 | Benjamin Herrenschmidt | char qemu_hypertas_prop[] = "hcall-memop1"; |
201 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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202 | 9fdf0c29 | David Gibson | int i;
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203 | 9fdf0c29 | David Gibson | char *modelname;
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204 | e97c3636 | David Gibson | int smt = kvmppc_smt_threads();
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205 | 6e806cc3 | Bharata B Rao | unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; |
206 | 6e806cc3 | Bharata B Rao | uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; |
207 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0), |
208 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0), cpu_to_be32(0x0), |
209 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0)};
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210 | 6e806cc3 | Bharata B Rao | char mem_name[32]; |
211 | 6e806cc3 | Bharata B Rao | target_phys_addr_t node0_size, mem_start; |
212 | 9fdf0c29 | David Gibson | |
213 | 9fdf0c29 | David Gibson | #define _FDT(exp) \
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214 | 9fdf0c29 | David Gibson | do { \
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215 | 9fdf0c29 | David Gibson | int ret = (exp); \
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216 | 9fdf0c29 | David Gibson | if (ret < 0) { \ |
217 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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218 | 9fdf0c29 | David Gibson | #exp, fdt_strerror(ret)); \
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219 | 9fdf0c29 | David Gibson | exit(1); \
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220 | 9fdf0c29 | David Gibson | } \ |
221 | 9fdf0c29 | David Gibson | } while (0) |
222 | 9fdf0c29 | David Gibson | |
223 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
224 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
225 | 9fdf0c29 | David Gibson | |
226 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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227 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size))); |
228 | 4d8d5467 | Benjamin Herrenschmidt | } |
229 | 4d8d5467 | Benjamin Herrenschmidt | if (initrd_size) {
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230 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size))); |
231 | 4d8d5467 | Benjamin Herrenschmidt | } |
232 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
233 | 9fdf0c29 | David Gibson | |
234 | 9fdf0c29 | David Gibson | /* Root node */
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235 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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236 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
237 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
238 | 9fdf0c29 | David Gibson | |
239 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
240 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
241 | 9fdf0c29 | David Gibson | |
242 | 9fdf0c29 | David Gibson | /* /chosen */
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243 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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244 | 9fdf0c29 | David Gibson | |
245 | 6e806cc3 | Bharata B Rao | /* Set Form1_affinity */
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246 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5)))); |
247 | 6e806cc3 | Bharata B Rao | |
248 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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249 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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250 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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251 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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252 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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253 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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254 | 4d8d5467 | Benjamin Herrenschmidt | uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
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255 | 4d8d5467 | Benjamin Herrenschmidt | cpu_to_be64(kernel_size) }; |
256 | 9fdf0c29 | David Gibson | |
257 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop)))); |
258 | 4d8d5467 | Benjamin Herrenschmidt | } |
259 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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260 | 3384f95c | David Gibson | |
261 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
262 | 9fdf0c29 | David Gibson | |
263 | 354ac20a | David Gibson | /* memory node(s) */
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264 | 6e806cc3 | Bharata B Rao | node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size; |
265 | 6e806cc3 | Bharata B Rao | if (rma_size > node0_size) {
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266 | 6e806cc3 | Bharata B Rao | rma_size = node0_size; |
267 | 6e806cc3 | Bharata B Rao | } |
268 | 9fdf0c29 | David Gibson | |
269 | 6e806cc3 | Bharata B Rao | /* RMA */
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270 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = 0; |
271 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(rma_size);
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272 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, "memory@0")));
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273 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
274 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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275 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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276 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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277 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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278 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
279 | 9fdf0c29 | David Gibson | |
280 | 6e806cc3 | Bharata B Rao | /* RAM: Node 0 */
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281 | 6e806cc3 | Bharata B Rao | if (node0_size > rma_size) {
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282 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(rma_size);
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283 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node0_size - rma_size);
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284 | 354ac20a | David Gibson | |
285 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, rma_size);
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286 | 354ac20a | David Gibson | _FDT((fdt_begin_node(fdt, mem_name))); |
287 | 354ac20a | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
288 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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289 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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290 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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291 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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292 | 354ac20a | David Gibson | _FDT((fdt_end_node(fdt))); |
293 | 354ac20a | David Gibson | } |
294 | 354ac20a | David Gibson | |
295 | 6e806cc3 | Bharata B Rao | /* RAM: Node 1 and beyond */
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296 | 6e806cc3 | Bharata B Rao | mem_start = node0_size; |
297 | 6e806cc3 | Bharata B Rao | for (i = 1; i < nb_numa_nodes; i++) { |
298 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(mem_start);
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299 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node_mem[i]);
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300 | 6e806cc3 | Bharata B Rao | associativity[3] = associativity[4] = cpu_to_be32(i); |
301 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
|
302 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, mem_name))); |
303 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
304 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
|
305 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
|
306 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
|
307 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
|
308 | 6e806cc3 | Bharata B Rao | _FDT((fdt_end_node(fdt))); |
309 | 6e806cc3 | Bharata B Rao | mem_start += node_mem[i]; |
310 | 6e806cc3 | Bharata B Rao | } |
311 | 6e806cc3 | Bharata B Rao | |
312 | 9fdf0c29 | David Gibson | /* cpus */
|
313 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
|
314 | 9fdf0c29 | David Gibson | |
315 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
316 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
317 | 9fdf0c29 | David Gibson | |
318 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
319 | 9fdf0c29 | David Gibson | |
320 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
321 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
322 | 9fdf0c29 | David Gibson | } |
323 | 9fdf0c29 | David Gibson | |
324 | 6e806cc3 | Bharata B Rao | /* This is needed during FDT finalization */
|
325 | 6e806cc3 | Bharata B Rao | spapr->cpu_model = g_strdup(modelname); |
326 | 6e806cc3 | Bharata B Rao | |
327 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
328 | c7a5c0c9 | David Gibson | int index = env->cpu_index;
|
329 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
330 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
|
331 | 9fdf0c29 | David Gibson | char *nodename;
|
332 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
333 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
334 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
335 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
336 | 5af9873d | Benjamin Herrenschmidt | uint32_t page_sizes_prop[64];
|
337 | 5af9873d | Benjamin Herrenschmidt | size_t page_sizes_prop_size; |
338 | 9fdf0c29 | David Gibson | |
339 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
340 | e97c3636 | David Gibson | continue;
|
341 | e97c3636 | David Gibson | } |
342 | e97c3636 | David Gibson | |
343 | c7a5c0c9 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, index) < 0) { |
344 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
|
345 | 9fdf0c29 | David Gibson | exit(1);
|
346 | 9fdf0c29 | David Gibson | } |
347 | 9fdf0c29 | David Gibson | |
348 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
349 | 9fdf0c29 | David Gibson | |
350 | 9fdf0c29 | David Gibson | free(nodename); |
351 | 9fdf0c29 | David Gibson | |
352 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
|
353 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
354 | 9fdf0c29 | David Gibson | |
355 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
356 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
|
357 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
358 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
|
359 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
360 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
361 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
362 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
363 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,pft-size",
|
364 | f43e3525 | David Gibson | pft_size_prop, sizeof(pft_size_prop))));
|
365 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
366 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
367 | e97c3636 | David Gibson | |
368 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
|
369 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
370 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
371 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
|
372 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
|
373 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
374 | e97c3636 | David Gibson | } |
375 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
376 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
|
377 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
378 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
|
379 | 9fdf0c29 | David Gibson | |
380 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
381 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
382 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
|
383 | 9fdf0c29 | David Gibson | } |
384 | 9fdf0c29 | David Gibson | |
385 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
|
386 | 6659394f | David Gibson | * 0 / no property == no vector extensions
|
387 | 6659394f | David Gibson | * 1 == VMX / Altivec available
|
388 | 6659394f | David Gibson | * 2 == VSX available */
|
389 | a7342588 | David Gibson | if (env->insns_flags & PPC_ALTIVEC) {
|
390 | a7342588 | David Gibson | uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; |
391 | a7342588 | David Gibson | |
392 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
393 | 6659394f | David Gibson | } |
394 | 6659394f | David Gibson | |
395 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
|
396 | 6659394f | David Gibson | * 0 / no property == no DFP
|
397 | 6659394f | David Gibson | * 1 == DFP available */
|
398 | a7342588 | David Gibson | if (env->insns_flags2 & PPC2_DFP) {
|
399 | a7342588 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); |
400 | 6659394f | David Gibson | } |
401 | 6659394f | David Gibson | |
402 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop, |
403 | 5af9873d | Benjamin Herrenschmidt | sizeof(page_sizes_prop));
|
404 | 5af9873d | Benjamin Herrenschmidt | if (page_sizes_prop_size) {
|
405 | 5af9873d | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
|
406 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop, page_sizes_prop_size))); |
407 | 5af9873d | Benjamin Herrenschmidt | } |
408 | 5af9873d | Benjamin Herrenschmidt | |
409 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
410 | 9fdf0c29 | David Gibson | } |
411 | 9fdf0c29 | David Gibson | |
412 | 7267c094 | Anthony Liguori | g_free(modelname); |
413 | 9fdf0c29 | David Gibson | |
414 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
415 | 9fdf0c29 | David Gibson | |
416 | f43e3525 | David Gibson | /* RTAS */
|
417 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
|
418 | f43e3525 | David Gibson | |
419 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
420 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
|
421 | c73e3771 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
|
422 | c73e3771 | Benjamin Herrenschmidt | sizeof(qemu_hypertas_prop))));
|
423 | f43e3525 | David Gibson | |
424 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
425 | 6e806cc3 | Bharata B Rao | refpoints, sizeof(refpoints))));
|
426 | 6e806cc3 | Bharata B Rao | |
427 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
428 | f43e3525 | David Gibson | |
429 | b5cec4c5 | David Gibson | /* interrupt controller */
|
430 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
431 | b5cec4c5 | David Gibson | |
432 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
|
433 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
|
434 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
435 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
436 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
437 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
438 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
|
439 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
440 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
441 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
442 | b5cec4c5 | David Gibson | |
443 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
444 | b5cec4c5 | David Gibson | |
445 | 4040ab72 | David Gibson | /* vdevice */
|
446 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
|
447 | 4040ab72 | David Gibson | |
448 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
449 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
450 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
451 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
452 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
453 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
454 | 4040ab72 | David Gibson | |
455 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
456 | 4040ab72 | David Gibson | |
457 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
|
458 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
459 | 9fdf0c29 | David Gibson | |
460 | a3467baa | David Gibson | return fdt;
|
461 | a3467baa | David Gibson | } |
462 | a3467baa | David Gibson | |
463 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
464 | a3467baa | David Gibson | target_phys_addr_t fdt_addr, |
465 | a3467baa | David Gibson | target_phys_addr_t rtas_addr, |
466 | a3467baa | David Gibson | target_phys_addr_t rtas_size) |
467 | a3467baa | David Gibson | { |
468 | a3467baa | David Gibson | int ret;
|
469 | a3467baa | David Gibson | void *fdt;
|
470 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
471 | a3467baa | David Gibson | |
472 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
473 | a3467baa | David Gibson | |
474 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
475 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
476 | 4040ab72 | David Gibson | |
477 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
478 | 4040ab72 | David Gibson | if (ret < 0) { |
479 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
480 | 4040ab72 | David Gibson | exit(1);
|
481 | 4040ab72 | David Gibson | } |
482 | 4040ab72 | David Gibson | |
483 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
484 | 3384f95c | David Gibson | ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt); |
485 | 3384f95c | David Gibson | } |
486 | 3384f95c | David Gibson | |
487 | 3384f95c | David Gibson | if (ret < 0) { |
488 | 3384f95c | David Gibson | fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
489 | 3384f95c | David Gibson | exit(1);
|
490 | 3384f95c | David Gibson | } |
491 | 3384f95c | David Gibson | |
492 | 39ac8455 | David Gibson | /* RTAS */
|
493 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
494 | 39ac8455 | David Gibson | if (ret < 0) { |
495 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
496 | 39ac8455 | David Gibson | } |
497 | 39ac8455 | David Gibson | |
498 | 6e806cc3 | Bharata B Rao | /* Advertise NUMA via ibm,associativity */
|
499 | 6e806cc3 | Bharata B Rao | if (nb_numa_nodes > 1) { |
500 | 6e806cc3 | Bharata B Rao | ret = spapr_set_associativity(fdt, spapr); |
501 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
502 | 6e806cc3 | Bharata B Rao | fprintf(stderr, "Couldn't set up NUMA device tree properties\n");
|
503 | 6e806cc3 | Bharata B Rao | } |
504 | 6e806cc3 | Bharata B Rao | } |
505 | 6e806cc3 | Bharata B Rao | |
506 | 68f3a94c | David Gibson | spapr_populate_chosen_stdout(fdt, spapr->vio_bus); |
507 | 68f3a94c | David Gibson | |
508 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
509 | 4040ab72 | David Gibson | |
510 | 4d8d5467 | Benjamin Herrenschmidt | if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
511 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
512 | 4d8d5467 | Benjamin Herrenschmidt | fdt_totalsize(fdt), FDT_MAX_SIZE); |
513 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
514 | 4d8d5467 | Benjamin Herrenschmidt | } |
515 | 4d8d5467 | Benjamin Herrenschmidt | |
516 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
517 | 9fdf0c29 | David Gibson | |
518 | 7267c094 | Anthony Liguori | g_free(fdt); |
519 | 9fdf0c29 | David Gibson | } |
520 | 9fdf0c29 | David Gibson | |
521 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
522 | 9fdf0c29 | David Gibson | { |
523 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
524 | 9fdf0c29 | David Gibson | } |
525 | 9fdf0c29 | David Gibson | |
526 | e2684c0b | Andreas Färber | static void emulate_spapr_hypercall(CPUPPCState *env) |
527 | 9fdf0c29 | David Gibson | { |
528 | 9fdf0c29 | David Gibson | env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
529 | 9fdf0c29 | David Gibson | } |
530 | 9fdf0c29 | David Gibson | |
531 | a3467baa | David Gibson | static void spapr_reset(void *opaque) |
532 | a3467baa | David Gibson | { |
533 | a3467baa | David Gibson | sPAPREnvironment *spapr = (sPAPREnvironment *)opaque; |
534 | a3467baa | David Gibson | |
535 | a3467baa | David Gibson | fprintf(stderr, "sPAPR reset\n");
|
536 | a3467baa | David Gibson | |
537 | a3467baa | David Gibson | /* flush out the hash table */
|
538 | a3467baa | David Gibson | memset(spapr->htab, 0, spapr->htab_size);
|
539 | a3467baa | David Gibson | |
540 | a3467baa | David Gibson | /* Load the fdt */
|
541 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
542 | a3467baa | David Gibson | spapr->rtas_size); |
543 | a3467baa | David Gibson | |
544 | a3467baa | David Gibson | /* Set up the entry state */
|
545 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
546 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
547 | a3467baa | David Gibson | first_cpu->halted = 0;
|
548 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
549 | a3467baa | David Gibson | |
550 | a3467baa | David Gibson | } |
551 | a3467baa | David Gibson | |
552 | 1bba0dc9 | Andreas Färber | static void spapr_cpu_reset(void *opaque) |
553 | 1bba0dc9 | Andreas Färber | { |
554 | 5b2038e0 | Andreas Färber | PowerPCCPU *cpu = opaque; |
555 | 1bba0dc9 | Andreas Färber | |
556 | 5b2038e0 | Andreas Färber | cpu_reset(CPU(cpu)); |
557 | 1bba0dc9 | Andreas Färber | } |
558 | 1bba0dc9 | Andreas Färber | |
559 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
560 | 9fdf0c29 | David Gibson | static void ppc_spapr_init(ram_addr_t ram_size, |
561 | 9fdf0c29 | David Gibson | const char *boot_device, |
562 | 9fdf0c29 | David Gibson | const char *kernel_filename, |
563 | 9fdf0c29 | David Gibson | const char *kernel_cmdline, |
564 | 9fdf0c29 | David Gibson | const char *initrd_filename, |
565 | 9fdf0c29 | David Gibson | const char *cpu_model) |
566 | 9fdf0c29 | David Gibson | { |
567 | 05769733 | Andreas Färber | PowerPCCPU *cpu; |
568 | e2684c0b | Andreas Färber | CPUPPCState *env; |
569 | 9fdf0c29 | David Gibson | int i;
|
570 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
571 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
572 | 354ac20a | David Gibson | target_phys_addr_t rma_alloc_size, rma_size; |
573 | 4d8d5467 | Benjamin Herrenschmidt | uint32_t initrd_base = 0;
|
574 | 4d8d5467 | Benjamin Herrenschmidt | long kernel_size = 0, initrd_size = 0; |
575 | 4d8d5467 | Benjamin Herrenschmidt | long load_limit, rtas_limit, fw_size;
|
576 | f43e3525 | David Gibson | long pteg_shift = 17; |
577 | 39ac8455 | David Gibson | char *filename;
|
578 | 9fdf0c29 | David Gibson | |
579 | d43b45e2 | David Gibson | spapr = g_malloc0(sizeof(*spapr));
|
580 | d43b45e2 | David Gibson | QLIST_INIT(&spapr->phbs); |
581 | d43b45e2 | David Gibson | |
582 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
583 | 9fdf0c29 | David Gibson | |
584 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
585 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
586 | 354ac20a | David Gibson | |
587 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
588 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
589 | 354ac20a | David Gibson | exit(1);
|
590 | 354ac20a | David Gibson | } |
591 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
592 | 354ac20a | David Gibson | rma_size = rma_alloc_size; |
593 | 354ac20a | David Gibson | } else {
|
594 | 354ac20a | David Gibson | rma_size = ram_size; |
595 | 354ac20a | David Gibson | } |
596 | 354ac20a | David Gibson | |
597 | 4d8d5467 | Benjamin Herrenschmidt | /* We place the device tree and RTAS just below either the top of the RMA,
|
598 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
599 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
600 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit = MIN(rma_size, 0x80000000);
|
601 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE; |
602 | 4d8d5467 | Benjamin Herrenschmidt | spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE; |
603 | 4d8d5467 | Benjamin Herrenschmidt | load_limit = spapr->fdt_addr - FW_OVERHEAD; |
604 | 9fdf0c29 | David Gibson | |
605 | 9fdf0c29 | David Gibson | /* init CPUs */
|
606 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
607 | 6b7a2cf6 | David Gibson | cpu_model = kvm_enabled() ? "host" : "POWER7"; |
608 | 9fdf0c29 | David Gibson | } |
609 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
610 | 05769733 | Andreas Färber | cpu = cpu_ppc_init(cpu_model); |
611 | 05769733 | Andreas Färber | if (cpu == NULL) { |
612 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
613 | 9fdf0c29 | David Gibson | exit(1);
|
614 | 9fdf0c29 | David Gibson | } |
615 | 05769733 | Andreas Färber | env = &cpu->env; |
616 | 05769733 | Andreas Färber | |
617 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
618 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
619 | 5b2038e0 | Andreas Färber | qemu_register_reset(spapr_cpu_reset, cpu); |
620 | 9fdf0c29 | David Gibson | |
621 | 9fdf0c29 | David Gibson | env->hreset_vector = 0x60;
|
622 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
623 | c7a5c0c9 | David Gibson | env->gpr[3] = env->cpu_index;
|
624 | 9fdf0c29 | David Gibson | } |
625 | 9fdf0c29 | David Gibson | |
626 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
627 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
628 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
629 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
630 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
631 | 354ac20a | David Gibson | |
632 | c5705a77 | Avi Kivity | memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
|
633 | c5705a77 | Avi Kivity | vmstate_register_ram_global(ram); |
634 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
635 | 354ac20a | David Gibson | } |
636 | 9fdf0c29 | David Gibson | |
637 | f43e3525 | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
638 | f43e3525 | David Gibson | * later we should probably make it scale to the size of guest
|
639 | f43e3525 | David Gibson | * RAM */
|
640 | a3467baa | David Gibson | spapr->htab_size = 1ULL << (pteg_shift + 7); |
641 | f61b4bed | Alexander Graf | spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size); |
642 | f43e3525 | David Gibson | |
643 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
644 | a3467baa | David Gibson | env->external_htab = spapr->htab; |
645 | c7a5c0c9 | David Gibson | env->htab_base = -1;
|
646 | a3467baa | David Gibson | env->htab_mask = spapr->htab_size - 1;
|
647 | f61b4bed | Alexander Graf | |
648 | f61b4bed | Alexander Graf | /* Tell KVM that we're in PAPR mode */
|
649 | f61b4bed | Alexander Graf | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
650 | f61b4bed | Alexander Graf | ((pteg_shift + 7) - 18); |
651 | f61b4bed | Alexander Graf | env->spr[SPR_HIOR] = 0;
|
652 | f61b4bed | Alexander Graf | |
653 | f61b4bed | Alexander Graf | if (kvm_enabled()) {
|
654 | f61b4bed | Alexander Graf | kvmppc_set_papr(env); |
655 | f61b4bed | Alexander Graf | } |
656 | f43e3525 | David Gibson | } |
657 | f43e3525 | David Gibson | |
658 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
659 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
660 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit - spapr->rtas_addr); |
661 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
662 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
663 | 39ac8455 | David Gibson | exit(1);
|
664 | 39ac8455 | David Gibson | } |
665 | 4d8d5467 | Benjamin Herrenschmidt | if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
666 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
667 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_size, RTAS_MAX_SIZE); |
668 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
669 | 4d8d5467 | Benjamin Herrenschmidt | } |
670 | 7267c094 | Anthony Liguori | g_free(filename); |
671 | 39ac8455 | David Gibson | |
672 | 4d8d5467 | Benjamin Herrenschmidt | |
673 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
674 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
675 | e6c866d4 | David Gibson | spapr->next_irq = 16;
|
676 | b5cec4c5 | David Gibson | |
677 | ad0ebb91 | David Gibson | /* Set up IOMMU */
|
678 | ad0ebb91 | David Gibson | spapr_iommu_init(); |
679 | ad0ebb91 | David Gibson | |
680 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
681 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
682 | 4040ab72 | David Gibson | |
683 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
684 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
685 | d601fac4 | David Gibson | spapr_vty_create(spapr->vio_bus, serial_hds[i]); |
686 | 4040ab72 | David Gibson | } |
687 | 4040ab72 | David Gibson | } |
688 | 9fdf0c29 | David Gibson | |
689 | 3384f95c | David Gibson | /* Set up PCI */
|
690 | 3384f95c | David Gibson | spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
|
691 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_ADDR, |
692 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_SIZE, |
693 | 3384f95c | David Gibson | SPAPR_PCI_IO_WIN_ADDR); |
694 | 3384f95c | David Gibson | |
695 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
696 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
697 | 8d90ad90 | David Gibson | |
698 | 8d90ad90 | David Gibson | if (!nd->model) {
|
699 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
700 | 8d90ad90 | David Gibson | } |
701 | 8d90ad90 | David Gibson | |
702 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
703 | d601fac4 | David Gibson | spapr_vlan_create(spapr->vio_bus, nd); |
704 | 8d90ad90 | David Gibson | } else {
|
705 | 3384f95c | David Gibson | pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
706 | 8d90ad90 | David Gibson | } |
707 | 8d90ad90 | David Gibson | } |
708 | 8d90ad90 | David Gibson | |
709 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
710 | d601fac4 | David Gibson | spapr_vscsi_create(spapr->vio_bus); |
711 | 6e270446 | Ben Herrenschmidt | } |
712 | 6e270446 | Ben Herrenschmidt | |
713 | 4d8d5467 | Benjamin Herrenschmidt | if (rma_size < (MIN_RMA_SLOF << 20)) { |
714 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
715 | 4d8d5467 | Benjamin Herrenschmidt | "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
716 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
717 | 4d8d5467 | Benjamin Herrenschmidt | } |
718 | 4d8d5467 | Benjamin Herrenschmidt | |
719 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "sPAPR memory map:\n");
|
720 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "RTAS : 0x%08lx..%08lx\n",
|
721 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)spapr->rtas_addr, |
722 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)(spapr->rtas_addr + spapr->rtas_size - 1)); |
723 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "FDT : 0x%08lx..%08lx\n",
|
724 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)spapr->fdt_addr, |
725 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)(spapr->fdt_addr + FDT_MAX_SIZE - 1)); |
726 | 4d8d5467 | Benjamin Herrenschmidt | |
727 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
728 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
729 | 9fdf0c29 | David Gibson | |
730 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
731 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
732 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
733 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
734 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
735 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - KERNEL_LOAD_ADDR); |
736 | 9fdf0c29 | David Gibson | } |
737 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
738 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
739 | 9fdf0c29 | David Gibson | kernel_filename); |
740 | 9fdf0c29 | David Gibson | exit(1);
|
741 | 9fdf0c29 | David Gibson | } |
742 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Kernel : 0x%08x..%08lx\n",
|
743 | 4d8d5467 | Benjamin Herrenschmidt | KERNEL_LOAD_ADDR, KERNEL_LOAD_ADDR + kernel_size - 1);
|
744 | 9fdf0c29 | David Gibson | |
745 | 9fdf0c29 | David Gibson | /* load initrd */
|
746 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
747 | 4d8d5467 | Benjamin Herrenschmidt | /* Try to locate the initrd in the gap between the kernel
|
748 | 4d8d5467 | Benjamin Herrenschmidt | * and the firmware. Add a bit of space just in case
|
749 | 4d8d5467 | Benjamin Herrenschmidt | */
|
750 | 4d8d5467 | Benjamin Herrenschmidt | initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff; |
751 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
752 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - initrd_base); |
753 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
754 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
755 | 9fdf0c29 | David Gibson | initrd_filename); |
756 | 9fdf0c29 | David Gibson | exit(1);
|
757 | 9fdf0c29 | David Gibson | } |
758 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Ramdisk : 0x%08lx..%08lx\n",
|
759 | 4d8d5467 | Benjamin Herrenschmidt | (long)initrd_base, (long)(initrd_base + initrd_size - 1)); |
760 | 9fdf0c29 | David Gibson | } else {
|
761 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
762 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
763 | 9fdf0c29 | David Gibson | } |
764 | 4d8d5467 | Benjamin Herrenschmidt | } |
765 | a3467baa | David Gibson | |
766 | 4d8d5467 | Benjamin Herrenschmidt | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
767 | 4d8d5467 | Benjamin Herrenschmidt | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
768 | 4d8d5467 | Benjamin Herrenschmidt | if (fw_size < 0) { |
769 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
770 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
771 | 4d8d5467 | Benjamin Herrenschmidt | } |
772 | 4d8d5467 | Benjamin Herrenschmidt | g_free(filename); |
773 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Firmware load : 0x%08x..%08lx\n",
|
774 | 4d8d5467 | Benjamin Herrenschmidt | 0, fw_size);
|
775 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Firmware runtime : 0x%08lx..%08lx\n",
|
776 | 4d8d5467 | Benjamin Herrenschmidt | load_limit, (unsigned long)spapr->fdt_addr); |
777 | 4d8d5467 | Benjamin Herrenschmidt | |
778 | 4d8d5467 | Benjamin Herrenschmidt | spapr->entry_point = 0x100;
|
779 | 4d8d5467 | Benjamin Herrenschmidt | |
780 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF will startup the secondary CPUs using RTAS */
|
781 | 4d8d5467 | Benjamin Herrenschmidt | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
782 | 4d8d5467 | Benjamin Herrenschmidt | env->halted = 1;
|
783 | 9fdf0c29 | David Gibson | } |
784 | 9fdf0c29 | David Gibson | |
785 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
786 | 354ac20a | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size, |
787 | a3467baa | David Gibson | initrd_base, initrd_size, |
788 | 4d8d5467 | Benjamin Herrenschmidt | kernel_size, |
789 | a3467baa | David Gibson | boot_device, kernel_cmdline, |
790 | a3467baa | David Gibson | pteg_shift + 7);
|
791 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
792 | 9fdf0c29 | David Gibson | |
793 | a3467baa | David Gibson | qemu_register_reset(spapr_reset, spapr); |
794 | 9fdf0c29 | David Gibson | } |
795 | 9fdf0c29 | David Gibson | |
796 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
797 | 9fdf0c29 | David Gibson | .name = "pseries",
|
798 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
|
799 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
800 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
801 | 9fdf0c29 | David Gibson | .no_parallel = 1,
|
802 | 6e270446 | Ben Herrenschmidt | .use_scsi = 1,
|
803 | 9fdf0c29 | David Gibson | }; |
804 | 9fdf0c29 | David Gibson | |
805 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
806 | 9fdf0c29 | David Gibson | { |
807 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
808 | 9fdf0c29 | David Gibson | } |
809 | 9fdf0c29 | David Gibson | |
810 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |