root / hw / pci.h @ 3c18685f
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1 | 87ecb68b | pbrook | #ifndef QEMU_PCI_H
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2 | 87ecb68b | pbrook | #define QEMU_PCI_H
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3 | 87ecb68b | pbrook | |
4 | 376253ec | aliguori | #include "qemu-common.h" |
5 | 163c8a59 | Luiz Capitulino | #include "qobject.h" |
6 | 376253ec | aliguori | |
7 | 6b1b92d3 | Paul Brook | #include "qdev.h" |
8 | 6b1b92d3 | Paul Brook | |
9 | 87ecb68b | pbrook | /* PCI includes legacy ISA access. */
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10 | 87ecb68b | pbrook | #include "isa.h" |
11 | 87ecb68b | pbrook | |
12 | 87ecb68b | pbrook | /* PCI bus */
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13 | 87ecb68b | pbrook | |
14 | 3ae80618 | aliguori | #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) |
15 | 3ae80618 | aliguori | #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
16 | 3ae80618 | aliguori | #define PCI_FUNC(devfn) ((devfn) & 0x07) |
17 | 3ae80618 | aliguori | |
18 | a770dc7e | aliguori | /* Class, Vendor and Device IDs from Linux's pci_ids.h */
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19 | a770dc7e | aliguori | #include "pci_ids.h" |
20 | 173a543b | blueswir1 | |
21 | a770dc7e | aliguori | /* QEMU-specific Vendor and Device ID definitions */
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22 | 6f338c34 | aliguori | |
23 | a770dc7e | aliguori | /* IBM (0x1014) */
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24 | a770dc7e | aliguori | #define PCI_DEVICE_ID_IBM_440GX 0x027f |
25 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff |
26 | deb54399 | aliguori | |
27 | a770dc7e | aliguori | /* Hitachi (0x1054) */
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28 | deb54399 | aliguori | #define PCI_VENDOR_ID_HITACHI 0x1054 |
29 | a770dc7e | aliguori | #define PCI_DEVICE_ID_HITACHI_SH7751R 0x350e |
30 | deb54399 | aliguori | |
31 | a770dc7e | aliguori | /* Apple (0x106b) */
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32 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_343S1201 0x0010 |
33 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e |
34 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f |
35 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022 |
36 | a770dc7e | aliguori | #define PCI_DEVICE_ID_APPLE_IPID_USB 0x003f |
37 | deb54399 | aliguori | |
38 | a770dc7e | aliguori | /* Realtek (0x10ec) */
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39 | a770dc7e | aliguori | #define PCI_DEVICE_ID_REALTEK_8029 0x8029 |
40 | deb54399 | aliguori | |
41 | a770dc7e | aliguori | /* Xilinx (0x10ee) */
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42 | a770dc7e | aliguori | #define PCI_DEVICE_ID_XILINX_XC2VP30 0x0300 |
43 | deb54399 | aliguori | |
44 | a770dc7e | aliguori | /* Marvell (0x11ab) */
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45 | a770dc7e | aliguori | #define PCI_DEVICE_ID_MARVELL_GT6412X 0x4620 |
46 | deb54399 | aliguori | |
47 | a770dc7e | aliguori | /* QEMU/Bochs VGA (0x1234) */
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48 | 4ebcf884 | blueswir1 | #define PCI_VENDOR_ID_QEMU 0x1234 |
49 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_QEMU_VGA 0x1111 |
50 | 4ebcf884 | blueswir1 | |
51 | a770dc7e | aliguori | /* VMWare (0x15ad) */
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52 | deb54399 | aliguori | #define PCI_VENDOR_ID_VMWARE 0x15ad |
53 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 |
54 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 |
55 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_NET 0x0720 |
56 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SCSI 0x0730 |
57 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_IDE 0x1729 |
58 | deb54399 | aliguori | |
59 | cef3017c | aliguori | /* Intel (0x8086) */
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60 | a770dc7e | aliguori | #define PCI_DEVICE_ID_INTEL_82551IT 0x1209 |
61 | d6fd1e66 | Stefan Weil | #define PCI_DEVICE_ID_INTEL_82557 0x1229 |
62 | 74c62ba8 | aurel32 | |
63 | deb54399 | aliguori | /* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */
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64 | d350d97d | aliguori | #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 |
65 | d350d97d | aliguori | #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 |
66 | d350d97d | aliguori | #define PCI_SUBDEVICE_ID_QEMU 0x1100 |
67 | d350d97d | aliguori | |
68 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_NET 0x1000 |
69 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BLOCK 0x1001 |
70 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002 |
71 | 14d50bef | aliguori | #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003 |
72 | d350d97d | aliguori | |
73 | 4f8589e1 | Isaku Yamahata | #define FMT_PCIBUS PRIx64
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74 | 6e355d90 | Isaku Yamahata | |
75 | 87ecb68b | pbrook | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
76 | 87ecb68b | pbrook | uint32_t address, uint32_t data, int len);
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77 | 87ecb68b | pbrook | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
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78 | 87ecb68b | pbrook | uint32_t address, int len);
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79 | 87ecb68b | pbrook | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
80 | 6e355d90 | Isaku Yamahata | pcibus_t addr, pcibus_t size, int type);
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81 | 5851e08c | aliguori | typedef int PCIUnregisterFunc(PCIDevice *pci_dev); |
82 | 87ecb68b | pbrook | |
83 | 87ecb68b | pbrook | typedef struct PCIIORegion { |
84 | 6e355d90 | Isaku Yamahata | pcibus_t addr; /* current PCI mapping address. -1 means not mapped */
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85 | 6e355d90 | Isaku Yamahata | #define PCI_BAR_UNMAPPED (~(pcibus_t)0) |
86 | 6e355d90 | Isaku Yamahata | pcibus_t size; |
87 | a0c7a97e | Isaku Yamahata | pcibus_t filtered_size; |
88 | 87ecb68b | pbrook | uint8_t type; |
89 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func; |
90 | 87ecb68b | pbrook | } PCIIORegion; |
91 | 87ecb68b | pbrook | |
92 | 87ecb68b | pbrook | #define PCI_ROM_SLOT 6 |
93 | 87ecb68b | pbrook | #define PCI_NUM_REGIONS 7 |
94 | 87ecb68b | pbrook | |
95 | fb58a897 | Isaku Yamahata | #include "pci_regs.h" |
96 | fb58a897 | Isaku Yamahata | |
97 | fb58a897 | Isaku Yamahata | /* PCI HEADER_TYPE */
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98 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80 |
99 | 8098ed41 | aurel32 | |
100 | 8098ed41 | aurel32 | #define PCI_STATUS_RESERVED_MASK_LO (PCI_STATUS_RESERVED1 | \
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101 | 8098ed41 | aurel32 | PCI_STATUS_INT_STATUS | PCI_STATUS_CAPABILITIES | \ |
102 | 8098ed41 | aurel32 | PCI_STATUS_66MHZ | PCI_STATUS_RESERVED2 | PCI_STATUS_FAST_BACK) |
103 | 8098ed41 | aurel32 | |
104 | 8098ed41 | aurel32 | #define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8) |
105 | 8098ed41 | aurel32 | |
106 | 475dc65f | aurel32 | /* Bits in the PCI Command Register (PCI 2.3 spec) */
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107 | 475dc65f | aurel32 | #define PCI_COMMAND_RESERVED 0xf800 |
108 | 475dc65f | aurel32 | |
109 | 475dc65f | aurel32 | #define PCI_COMMAND_RESERVED_MASK_HI (PCI_COMMAND_RESERVED >> 8) |
110 | 475dc65f | aurel32 | |
111 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config header */
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112 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_HEADER_SIZE 0x40 |
113 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config space */
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114 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_SPACE_SIZE 0x100 |
115 | a9f49946 | Isaku Yamahata | /* Size of the standart PCIe config space: 4KB */
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116 | a9f49946 | Isaku Yamahata | #define PCIE_CONFIG_SPACE_SIZE 0x1000 |
117 | b7ee1603 | Michael S. Tsirkin | |
118 | e369cad7 | Isaku Yamahata | #define PCI_NUM_PINS 4 /* A-D */ |
119 | e369cad7 | Isaku Yamahata | |
120 | 02eb84d0 | Michael S. Tsirkin | /* Bits in cap_present field. */
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121 | 02eb84d0 | Michael S. Tsirkin | enum {
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122 | 02eb84d0 | Michael S. Tsirkin | QEMU_PCI_CAP_MSIX = 0x1,
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123 | a9f49946 | Isaku Yamahata | QEMU_PCI_CAP_EXPRESS = 0x2,
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124 | 02eb84d0 | Michael S. Tsirkin | }; |
125 | 02eb84d0 | Michael S. Tsirkin | |
126 | 87ecb68b | pbrook | struct PCIDevice {
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127 | 6b1b92d3 | Paul Brook | DeviceState qdev; |
128 | 87ecb68b | pbrook | /* PCI config space */
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129 | a9f49946 | Isaku Yamahata | uint8_t *config; |
130 | b7ee1603 | Michael S. Tsirkin | |
131 | bd4b65ee | Michael S. Tsirkin | /* Used to enable config checks on load. Note that writeable bits are
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132 | bd4b65ee | Michael S. Tsirkin | * never checked even if set in cmask. */
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133 | a9f49946 | Isaku Yamahata | uint8_t *cmask; |
134 | bd4b65ee | Michael S. Tsirkin | |
135 | b7ee1603 | Michael S. Tsirkin | /* Used to implement R/W bytes */
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136 | a9f49946 | Isaku Yamahata | uint8_t *wmask; |
137 | 87ecb68b | pbrook | |
138 | 6f4cbd39 | Michael S. Tsirkin | /* Used to allocate config space for capabilities. */
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139 | a9f49946 | Isaku Yamahata | uint8_t *used; |
140 | 6f4cbd39 | Michael S. Tsirkin | |
141 | 87ecb68b | pbrook | /* the following fields are read only */
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142 | 87ecb68b | pbrook | PCIBus *bus; |
143 | 54586bd1 | Gerd Hoffmann | uint32_t devfn; |
144 | 87ecb68b | pbrook | char name[64]; |
145 | 87ecb68b | pbrook | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
146 | 87ecb68b | pbrook | |
147 | 87ecb68b | pbrook | /* do not access the following fields */
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148 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read; |
149 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write; |
150 | 87ecb68b | pbrook | |
151 | 87ecb68b | pbrook | /* IRQ objects for the INTA-INTD pins. */
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152 | 87ecb68b | pbrook | qemu_irq *irq; |
153 | 87ecb68b | pbrook | |
154 | 87ecb68b | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
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155 | d036bb21 | Michael S. Tsirkin | uint8_t irq_state; |
156 | 02eb84d0 | Michael S. Tsirkin | |
157 | 02eb84d0 | Michael S. Tsirkin | /* Capability bits */
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158 | 02eb84d0 | Michael S. Tsirkin | uint32_t cap_present; |
159 | 02eb84d0 | Michael S. Tsirkin | |
160 | 02eb84d0 | Michael S. Tsirkin | /* Offset of MSI-X capability in config space */
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161 | 02eb84d0 | Michael S. Tsirkin | uint8_t msix_cap; |
162 | 02eb84d0 | Michael S. Tsirkin | |
163 | 02eb84d0 | Michael S. Tsirkin | /* MSI-X entries */
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164 | 02eb84d0 | Michael S. Tsirkin | int msix_entries_nr;
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165 | 02eb84d0 | Michael S. Tsirkin | |
166 | 02eb84d0 | Michael S. Tsirkin | /* Space to store MSIX table */
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167 | 02eb84d0 | Michael S. Tsirkin | uint8_t *msix_table_page; |
168 | 02eb84d0 | Michael S. Tsirkin | /* MMIO index used to map MSIX table and pending bit entries. */
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169 | 02eb84d0 | Michael S. Tsirkin | int msix_mmio_index;
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170 | 02eb84d0 | Michael S. Tsirkin | /* Reference-count for entries actually in use by driver. */
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171 | 02eb84d0 | Michael S. Tsirkin | unsigned *msix_entry_used;
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172 | 02eb84d0 | Michael S. Tsirkin | /* Region including the MSI-X table */
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173 | 02eb84d0 | Michael S. Tsirkin | uint32_t msix_bar_size; |
174 | f16c4abf | Juan Quintela | /* Version id needed for VMState */
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175 | f16c4abf | Juan Quintela | int32_t version_id; |
176 | c2039bd0 | Anthony Liguori | |
177 | c2039bd0 | Anthony Liguori | /* Location of option rom */
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178 | 8c52c8f3 | Gerd Hoffmann | char *romfile;
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179 | c2039bd0 | Anthony Liguori | ram_addr_t rom_offset; |
180 | 88169ddf | Gerd Hoffmann | uint32_t rom_bar; |
181 | 87ecb68b | pbrook | }; |
182 | 87ecb68b | pbrook | |
183 | 87ecb68b | pbrook | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
184 | 87ecb68b | pbrook | int instance_size, int devfn, |
185 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read, |
186 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write); |
187 | 87ecb68b | pbrook | |
188 | 28c2c264 | Avi Kivity | void pci_register_bar(PCIDevice *pci_dev, int region_num, |
189 | 6e355d90 | Isaku Yamahata | pcibus_t size, int type,
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190 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func); |
191 | 87ecb68b | pbrook | |
192 | 6f4cbd39 | Michael S. Tsirkin | int pci_add_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
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193 | 1db5a3aa | Michael S. Tsirkin | int pci_add_capability_at_offset(PCIDevice *pci_dev, uint8_t cap_id,
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194 | 1db5a3aa | Michael S. Tsirkin | uint8_t cap_offset, uint8_t cap_size); |
195 | 6f4cbd39 | Michael S. Tsirkin | |
196 | 6f4cbd39 | Michael S. Tsirkin | void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
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197 | 6f4cbd39 | Michael S. Tsirkin | |
198 | 6f4cbd39 | Michael S. Tsirkin | void pci_reserve_capability(PCIDevice *pci_dev, uint8_t offset, uint8_t size);
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199 | 6f4cbd39 | Michael S. Tsirkin | |
200 | 6f4cbd39 | Michael S. Tsirkin | uint8_t pci_find_capability(PCIDevice *pci_dev, uint8_t cap_id); |
201 | 6f4cbd39 | Michael S. Tsirkin | |
202 | 6f4cbd39 | Michael S. Tsirkin | |
203 | 87ecb68b | pbrook | uint32_t pci_default_read_config(PCIDevice *d, |
204 | 87ecb68b | pbrook | uint32_t address, int len);
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205 | 87ecb68b | pbrook | void pci_default_write_config(PCIDevice *d,
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206 | 87ecb68b | pbrook | uint32_t address, uint32_t val, int len);
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207 | 87ecb68b | pbrook | void pci_device_save(PCIDevice *s, QEMUFile *f);
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208 | 87ecb68b | pbrook | int pci_device_load(PCIDevice *s, QEMUFile *f);
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209 | 87ecb68b | pbrook | |
210 | 5d4e84c8 | Juan Quintela | typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level); |
211 | 87ecb68b | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
212 | 87c30546 | Isaku Yamahata | typedef int (*pci_hotplug_fn)(DeviceState *qdev, PCIDevice *pci_dev, int state); |
213 | 21eea4b3 | Gerd Hoffmann | void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
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214 | 21eea4b3 | Gerd Hoffmann | const char *name, int devfn_min); |
215 | 21eea4b3 | Gerd Hoffmann | PCIBus *pci_bus_new(DeviceState *parent, const char *name, int devfn_min); |
216 | 21eea4b3 | Gerd Hoffmann | void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
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217 | 21eea4b3 | Gerd Hoffmann | void *irq_opaque, int nirq); |
218 | 87c30546 | Isaku Yamahata | void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *dev);
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219 | 02e2da45 | Paul Brook | PCIBus *pci_register_bus(DeviceState *parent, const char *name, |
220 | 02e2da45 | Paul Brook | pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
221 | 5d4e84c8 | Juan Quintela | void *irq_opaque, int devfn_min, int nirq); |
222 | 87ecb68b | pbrook | |
223 | 2e01c8cf | Blue Swirl | void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base);
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224 | 2e01c8cf | Blue Swirl | |
225 | 5607c388 | Markus Armbruster | PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, |
226 | 5607c388 | Markus Armbruster | const char *default_devaddr); |
227 | 07caea31 | Markus Armbruster | PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char *default_model, |
228 | 07caea31 | Markus Armbruster | const char *default_devaddr); |
229 | 87ecb68b | pbrook | int pci_bus_num(PCIBus *s);
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230 | e822a52a | Isaku Yamahata | void pci_for_each_device(PCIBus *bus, int bus_num, void (*fn)(PCIBus *bus, PCIDevice *d)); |
231 | c469e1dd | Isaku Yamahata | PCIBus *pci_find_root_bus(int domain);
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232 | e822a52a | Isaku Yamahata | PCIBus *pci_find_bus(PCIBus *bus, int bus_num);
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233 | e822a52a | Isaku Yamahata | PCIDevice *pci_find_device(PCIBus *bus, int bus_num, int slot, int function); |
234 | 49bd1458 | Markus Armbruster | PCIBus *pci_get_bus_devfn(int *devfnp, const char *devaddr); |
235 | 87ecb68b | pbrook | |
236 | e9283f8b | Jan Kiszka | int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp, |
237 | e9283f8b | Jan Kiszka | unsigned *slotp);
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238 | 880345c4 | aliguori | |
239 | 163c8a59 | Luiz Capitulino | void do_pci_info_print(Monitor *mon, const QObject *data); |
240 | 163c8a59 | Luiz Capitulino | void do_pci_info(Monitor *mon, QObject **ret_data);
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241 | 480b9f24 | blueswir1 | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
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242 | 87ecb68b | pbrook | pci_map_irq_fn map_irq, const char *name); |
243 | d6318738 | Michael S. Tsirkin | PCIDevice *pci_bridge_get_device(PCIBus *bus); |
244 | 87ecb68b | pbrook | |
245 | deb54399 | aliguori | static inline void |
246 | 64d50b8b | Michael S. Tsirkin | pci_set_byte(uint8_t *config, uint8_t val) |
247 | 64d50b8b | Michael S. Tsirkin | { |
248 | 64d50b8b | Michael S. Tsirkin | *config = val; |
249 | 64d50b8b | Michael S. Tsirkin | } |
250 | 64d50b8b | Michael S. Tsirkin | |
251 | 64d50b8b | Michael S. Tsirkin | static inline uint8_t |
252 | cb95c2e4 | Stefan Weil | pci_get_byte(const uint8_t *config)
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253 | 64d50b8b | Michael S. Tsirkin | { |
254 | 64d50b8b | Michael S. Tsirkin | return *config;
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255 | 64d50b8b | Michael S. Tsirkin | } |
256 | 64d50b8b | Michael S. Tsirkin | |
257 | 64d50b8b | Michael S. Tsirkin | static inline void |
258 | 14e12559 | Michael S. Tsirkin | pci_set_word(uint8_t *config, uint16_t val) |
259 | 14e12559 | Michael S. Tsirkin | { |
260 | 14e12559 | Michael S. Tsirkin | cpu_to_le16wu((uint16_t *)config, val); |
261 | 14e12559 | Michael S. Tsirkin | } |
262 | 14e12559 | Michael S. Tsirkin | |
263 | 14e12559 | Michael S. Tsirkin | static inline uint16_t |
264 | cb95c2e4 | Stefan Weil | pci_get_word(const uint8_t *config)
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265 | 14e12559 | Michael S. Tsirkin | { |
266 | cb95c2e4 | Stefan Weil | return le16_to_cpupu((const uint16_t *)config); |
267 | 14e12559 | Michael S. Tsirkin | } |
268 | 14e12559 | Michael S. Tsirkin | |
269 | 14e12559 | Michael S. Tsirkin | static inline void |
270 | 14e12559 | Michael S. Tsirkin | pci_set_long(uint8_t *config, uint32_t val) |
271 | 14e12559 | Michael S. Tsirkin | { |
272 | 14e12559 | Michael S. Tsirkin | cpu_to_le32wu((uint32_t *)config, val); |
273 | 14e12559 | Michael S. Tsirkin | } |
274 | 14e12559 | Michael S. Tsirkin | |
275 | 14e12559 | Michael S. Tsirkin | static inline uint32_t |
276 | cb95c2e4 | Stefan Weil | pci_get_long(const uint8_t *config)
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277 | 14e12559 | Michael S. Tsirkin | { |
278 | cb95c2e4 | Stefan Weil | return le32_to_cpupu((const uint32_t *)config); |
279 | 14e12559 | Michael S. Tsirkin | } |
280 | 14e12559 | Michael S. Tsirkin | |
281 | 14e12559 | Michael S. Tsirkin | static inline void |
282 | fb5ce7d2 | Isaku Yamahata | pci_set_quad(uint8_t *config, uint64_t val) |
283 | fb5ce7d2 | Isaku Yamahata | { |
284 | fb5ce7d2 | Isaku Yamahata | cpu_to_le64w((uint64_t *)config, val); |
285 | fb5ce7d2 | Isaku Yamahata | } |
286 | fb5ce7d2 | Isaku Yamahata | |
287 | fb5ce7d2 | Isaku Yamahata | static inline uint64_t |
288 | cb95c2e4 | Stefan Weil | pci_get_quad(const uint8_t *config)
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289 | fb5ce7d2 | Isaku Yamahata | { |
290 | cb95c2e4 | Stefan Weil | return le64_to_cpup((const uint64_t *)config); |
291 | fb5ce7d2 | Isaku Yamahata | } |
292 | fb5ce7d2 | Isaku Yamahata | |
293 | fb5ce7d2 | Isaku Yamahata | static inline void |
294 | deb54399 | aliguori | pci_config_set_vendor_id(uint8_t *pci_config, uint16_t val) |
295 | deb54399 | aliguori | { |
296 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_VENDOR_ID], val); |
297 | deb54399 | aliguori | } |
298 | deb54399 | aliguori | |
299 | deb54399 | aliguori | static inline void |
300 | deb54399 | aliguori | pci_config_set_device_id(uint8_t *pci_config, uint16_t val) |
301 | deb54399 | aliguori | { |
302 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_DEVICE_ID], val); |
303 | deb54399 | aliguori | } |
304 | deb54399 | aliguori | |
305 | 173a543b | blueswir1 | static inline void |
306 | cf602c7b | Izik Eidus | pci_config_set_revision(uint8_t *pci_config, uint8_t val) |
307 | cf602c7b | Izik Eidus | { |
308 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_REVISION_ID], val); |
309 | cf602c7b | Izik Eidus | } |
310 | cf602c7b | Izik Eidus | |
311 | cf602c7b | Izik Eidus | static inline void |
312 | 173a543b | blueswir1 | pci_config_set_class(uint8_t *pci_config, uint16_t val) |
313 | 173a543b | blueswir1 | { |
314 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_CLASS_DEVICE], val); |
315 | 173a543b | blueswir1 | } |
316 | 173a543b | blueswir1 | |
317 | cf602c7b | Izik Eidus | static inline void |
318 | cf602c7b | Izik Eidus | pci_config_set_prog_interface(uint8_t *pci_config, uint8_t val) |
319 | cf602c7b | Izik Eidus | { |
320 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_CLASS_PROG], val); |
321 | cf602c7b | Izik Eidus | } |
322 | cf602c7b | Izik Eidus | |
323 | cf602c7b | Izik Eidus | static inline void |
324 | cf602c7b | Izik Eidus | pci_config_set_interrupt_pin(uint8_t *pci_config, uint8_t val) |
325 | cf602c7b | Izik Eidus | { |
326 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_INTERRUPT_PIN], val); |
327 | cf602c7b | Izik Eidus | } |
328 | cf602c7b | Izik Eidus | |
329 | 81a322d4 | Gerd Hoffmann | typedef int (*pci_qdev_initfn)(PCIDevice *dev); |
330 | 0aab0d3a | Gerd Hoffmann | typedef struct { |
331 | 0aab0d3a | Gerd Hoffmann | DeviceInfo qdev; |
332 | 0aab0d3a | Gerd Hoffmann | pci_qdev_initfn init; |
333 | e3936fa5 | Gerd Hoffmann | PCIUnregisterFunc *exit; |
334 | 0aab0d3a | Gerd Hoffmann | PCIConfigReadFunc *config_read; |
335 | 0aab0d3a | Gerd Hoffmann | PCIConfigWriteFunc *config_write; |
336 | a9f49946 | Isaku Yamahata | |
337 | fb231628 | Isaku Yamahata | /* pci config header type */
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338 | 3c217c14 | Isaku Yamahata | uint8_t header_type; |
339 | fb231628 | Isaku Yamahata | |
340 | a9f49946 | Isaku Yamahata | /* pcie stuff */
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341 | 3c217c14 | Isaku Yamahata | int is_express; /* is this device pci express? */ |
342 | 8c52c8f3 | Gerd Hoffmann | |
343 | 8c52c8f3 | Gerd Hoffmann | /* rom bar */
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344 | 8c52c8f3 | Gerd Hoffmann | const char *romfile; |
345 | 0aab0d3a | Gerd Hoffmann | } PCIDeviceInfo; |
346 | 0aab0d3a | Gerd Hoffmann | |
347 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register(PCIDeviceInfo *info);
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348 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register_many(PCIDeviceInfo *info);
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349 | 6b1b92d3 | Paul Brook | |
350 | 499cf102 | Markus Armbruster | PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); |
351 | 6b1b92d3 | Paul Brook | PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); |
352 | 6b1b92d3 | Paul Brook | |
353 | 3c18685f | Isaku Yamahata | static inline int pci_is_express(const PCIDevice *d) |
354 | a9f49946 | Isaku Yamahata | { |
355 | a9f49946 | Isaku Yamahata | return d->cap_present & QEMU_PCI_CAP_EXPRESS;
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356 | a9f49946 | Isaku Yamahata | } |
357 | a9f49946 | Isaku Yamahata | |
358 | 3c18685f | Isaku Yamahata | static inline uint32_t pci_config_size(const PCIDevice *d) |
359 | a9f49946 | Isaku Yamahata | { |
360 | a9f49946 | Isaku Yamahata | return pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE;
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361 | a9f49946 | Isaku Yamahata | } |
362 | a9f49946 | Isaku Yamahata | |
363 | f49db805 | Isaku Yamahata | /* These are not pci specific. Should move into a separate header.
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364 | f49db805 | Isaku Yamahata | * Only pci.c uses them, so keep them here for now.
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365 | f49db805 | Isaku Yamahata | */
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366 | f49db805 | Isaku Yamahata | |
367 | f49db805 | Isaku Yamahata | /* Get last byte of a range from offset + length.
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368 | f49db805 | Isaku Yamahata | * Undefined for ranges that wrap around 0. */
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369 | f49db805 | Isaku Yamahata | static inline uint64_t range_get_last(uint64_t offset, uint64_t len) |
370 | f49db805 | Isaku Yamahata | { |
371 | f49db805 | Isaku Yamahata | return offset + len - 1; |
372 | f49db805 | Isaku Yamahata | } |
373 | f49db805 | Isaku Yamahata | |
374 | f49db805 | Isaku Yamahata | /* Check whether a given range covers a given byte. */
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375 | f49db805 | Isaku Yamahata | static inline int range_covers_byte(uint64_t offset, uint64_t len, |
376 | f49db805 | Isaku Yamahata | uint64_t byte) |
377 | f49db805 | Isaku Yamahata | { |
378 | f49db805 | Isaku Yamahata | return offset <= byte && byte <= range_get_last(offset, len);
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379 | f49db805 | Isaku Yamahata | } |
380 | f49db805 | Isaku Yamahata | |
381 | f49db805 | Isaku Yamahata | /* Check whether 2 given ranges overlap.
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382 | f49db805 | Isaku Yamahata | * Undefined if ranges that wrap around 0. */
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383 | f49db805 | Isaku Yamahata | static inline int ranges_overlap(uint64_t first1, uint64_t len1, |
384 | f49db805 | Isaku Yamahata | uint64_t first2, uint64_t len2) |
385 | f49db805 | Isaku Yamahata | { |
386 | f49db805 | Isaku Yamahata | uint64_t last1 = range_get_last(first1, len1); |
387 | f49db805 | Isaku Yamahata | uint64_t last2 = range_get_last(first2, len2); |
388 | f49db805 | Isaku Yamahata | |
389 | f49db805 | Isaku Yamahata | return !(last2 < first1 || last1 < first2);
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390 | f49db805 | Isaku Yamahata | } |
391 | f49db805 | Isaku Yamahata | |
392 | 87ecb68b | pbrook | #endif |