root / tcg / tcg-op.h @ 3d575329
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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/* legacy dyngen operations */
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#include "gen-op.h" |
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGArg arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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static inline void tcg_gen_op2(int opc, TCGArg arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op3(int opc, TCGArg arg1, TCGArg arg2, TCGArg arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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*gen_opparam_ptr++ = arg2; |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGArg arg1, TCGArg arg2, TCGArg arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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*gen_opparam_ptr++ = arg2; |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGArg arg1, TCGArg arg2, |
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TCGArg arg3, TCGArg arg4, |
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TCGArg arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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*gen_opparam_ptr++ = arg2; |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGArg arg1, TCGArg arg2, |
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TCGArg arg3, TCGArg arg4, |
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TCGArg arg5, TCGArg arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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*gen_opparam_ptr++ = arg2; |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{ |
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tcg_gen_op1(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_mov_i32(int ret, int arg) |
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{ |
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(int ret, int32_t arg) |
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{ |
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tcg_gen_op2(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGArg arg) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGArg arg1, TCGArg arg2) |
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{ |
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TCGArg args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGArg ret, |
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TCGArg arg1, TCGArg arg2) |
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{ |
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TCGArg args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16s_i32(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_st8_i32(int arg1, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st16_i32(int arg1, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st_i32(int arg1, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_add_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_addi_i32(int ret, int arg1, int32_t arg2) |
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{ |
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tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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static inline void tcg_gen_sub_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_subi_i32(int ret, int arg1, int32_t arg2) |
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{ |
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tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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static inline void tcg_gen_and_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_andi_i32(int ret, int arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_movi_i32(ret, 0);
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} else if (arg2 == 0xffffffff) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_or_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_ori_i32(int ret, int arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0xffffffff) { |
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tcg_gen_movi_i32(ret, 0);
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} else if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_xor_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_xori_i32(int ret, int arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_shl_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_shli_i32(int ret, int arg1, int32_t arg2) |
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{ |
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tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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static inline void tcg_gen_shr_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_shri_i32(int ret, int arg1, int32_t arg2) |
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{ |
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tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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static inline void tcg_gen_sar_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_sari_i32(int ret, int arg1, int32_t arg2) |
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{ |
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tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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static inline void tcg_gen_brcond_i32(int cond, TCGArg arg1, TCGArg arg2, |
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int label_index)
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{ |
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tcg_gen_op4(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
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} |
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static inline void tcg_gen_mul_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
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} |
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#ifdef TCG_TARGET_HAS_div_i32
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static inline void tcg_gen_div_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_rem_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_divu_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_remu_i32(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
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} |
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#else
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static inline void tcg_gen_div_i32(int ret, int arg1, int arg2) |
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{ |
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int t0;
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t0 = tcg_temp_new(TCG_TYPE_I32); |
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tcg_gen_sari_i32(t0, arg1, 31);
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tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
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} |
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static inline void tcg_gen_rem_i32(int ret, int arg1, int arg2) |
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{ |
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int t0;
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t0 = tcg_temp_new(TCG_TYPE_I32); |
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tcg_gen_sari_i32(t0, arg1, 31);
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tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
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} |
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static inline void tcg_gen_divu_i32(int ret, int arg1, int arg2) |
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{ |
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int t0;
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t0 = tcg_temp_new(TCG_TYPE_I32); |
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tcg_gen_movi_i32(t0, 0);
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tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
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} |
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static inline void tcg_gen_remu_i32(int ret, int arg1, int arg2) |
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{ |
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int t0;
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t0 = tcg_temp_new(TCG_TYPE_I32); |
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tcg_gen_movi_i32(t0, 0);
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tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
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} |
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#endif
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#if TCG_TARGET_REG_BITS == 32 |
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static inline void tcg_gen_mov_i64(int ret, int arg) |
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{ |
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tcg_gen_mov_i32(ret, arg); |
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tcg_gen_mov_i32(ret + 1, arg + 1); |
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} |
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static inline void tcg_gen_movi_i64(int ret, int64_t arg) |
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{ |
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tcg_gen_movi_i32(ret, arg); |
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tcg_gen_movi_i32(ret + 1, arg >> 32); |
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} |
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static inline void tcg_gen_ld8u_i64(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_ld8u_i32(ret, arg2, offset); |
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tcg_gen_movi_i32(ret + 1, 0); |
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} |
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static inline void tcg_gen_ld8s_i64(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_ld8s_i32(ret, arg2, offset); |
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tcg_gen_sari_i32(ret + 1, ret, 31); |
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} |
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static inline void tcg_gen_ld16u_i64(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_ld16u_i32(ret, arg2, offset); |
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tcg_gen_movi_i32(ret + 1, 0); |
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} |
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static inline void tcg_gen_ld16s_i64(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_ld16s_i32(ret, arg2, offset); |
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tcg_gen_sari_i32(ret + 1, ret, 31); |
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} |
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static inline void tcg_gen_ld32u_i64(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_ld_i32(ret, arg2, offset); |
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tcg_gen_movi_i32(ret + 1, 0); |
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} |
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static inline void tcg_gen_ld32s_i64(int ret, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_ld_i32(ret, arg2, offset); |
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tcg_gen_sari_i32(ret + 1, ret, 31); |
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} |
395 |
|
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static inline void tcg_gen_ld_i64(int ret, int arg2, tcg_target_long offset) |
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{ |
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/* since arg2 and ret have different types, they cannot be the
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same temporary */
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#ifdef TCG_TARGET_WORDS_BIGENDIAN
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tcg_gen_ld_i32(ret + 1, arg2, offset);
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tcg_gen_ld_i32(ret, arg2, offset + 4);
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#else
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tcg_gen_ld_i32(ret, arg2, offset); |
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tcg_gen_ld_i32(ret + 1, arg2, offset + 4); |
406 |
#endif
|
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} |
408 |
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static inline void tcg_gen_st8_i64(int arg1, int arg2, tcg_target_long offset) |
410 |
{ |
411 |
tcg_gen_st8_i32(arg1, arg2, offset); |
412 |
} |
413 |
|
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static inline void tcg_gen_st16_i64(int arg1, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_st16_i32(arg1, arg2, offset); |
417 |
} |
418 |
|
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static inline void tcg_gen_st32_i64(int arg1, int arg2, tcg_target_long offset) |
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{ |
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tcg_gen_st_i32(arg1, arg2, offset); |
422 |
} |
423 |
|
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static inline void tcg_gen_st_i64(int arg1, int arg2, tcg_target_long offset) |
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{ |
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#ifdef TCG_TARGET_WORDS_BIGENDIAN
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tcg_gen_st_i32(arg1 + 1, arg2, offset);
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tcg_gen_st_i32(arg1, arg2, offset + 4);
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#else
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tcg_gen_st_i32(arg1, arg2, offset); |
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tcg_gen_st_i32(arg1 + 1, arg2, offset + 4); |
432 |
#endif
|
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} |
434 |
|
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static inline void tcg_gen_add_i64(int ret, int arg1, int arg2) |
436 |
{ |
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tcg_gen_op6(INDEX_op_add2_i32, ret, ret + 1,
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arg1, arg1 + 1, arg2, arg2 + 1); |
439 |
} |
440 |
|
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static inline void tcg_gen_addi_i64(int ret, int arg1, int64_t arg2) |
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{ |
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tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
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} |
445 |
|
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static inline void tcg_gen_sub_i64(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_op6(INDEX_op_sub2_i32, ret, ret + 1,
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arg1, arg1 + 1, arg2, arg2 + 1); |
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} |
451 |
|
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static inline void tcg_gen_subi_i64(int ret, int arg1, int64_t arg2) |
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{ |
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tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
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} |
456 |
|
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static inline void tcg_gen_and_i64(int ret, int arg1, int arg2) |
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{ |
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tcg_gen_and_i32(ret, arg1, arg2); |
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tcg_gen_and_i32(ret + 1, arg1 + 1, arg2 + 1); |
461 |
} |
462 |
|
463 |
static inline void tcg_gen_andi_i64(int ret, int arg1, int64_t arg2) |
464 |
{ |
465 |
tcg_gen_andi_i32(ret, arg1, arg2); |
466 |
tcg_gen_andi_i32(ret + 1, arg1 + 1, arg2 >> 32); |
467 |
} |
468 |
|
469 |
static inline void tcg_gen_or_i64(int ret, int arg1, int arg2) |
470 |
{ |
471 |
tcg_gen_or_i32(ret, arg1, arg2); |
472 |
tcg_gen_or_i32(ret + 1, arg1 + 1, arg2 + 1); |
473 |
} |
474 |
|
475 |
static inline void tcg_gen_ori_i64(int ret, int arg1, int64_t arg2) |
476 |
{ |
477 |
tcg_gen_ori_i32(ret, arg1, arg2); |
478 |
tcg_gen_ori_i32(ret + 1, arg1 + 1, arg2 >> 32); |
479 |
} |
480 |
|
481 |
static inline void tcg_gen_xor_i64(int ret, int arg1, int arg2) |
482 |
{ |
483 |
tcg_gen_xor_i32(ret, arg1, arg2); |
484 |
tcg_gen_xor_i32(ret + 1, arg1 + 1, arg2 + 1); |
485 |
} |
486 |
|
487 |
static inline void tcg_gen_xori_i64(int ret, int arg1, int64_t arg2) |
488 |
{ |
489 |
tcg_gen_xori_i32(ret, arg1, arg2); |
490 |
tcg_gen_xori_i32(ret + 1, arg1 + 1, arg2 >> 32); |
491 |
} |
492 |
|
493 |
/* XXX: use generic code when basic block handling is OK or CPU
|
494 |
specific code (x86) */
|
495 |
static inline void tcg_gen_shl_i64(int ret, int arg1, int64_t arg2) |
496 |
{ |
497 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
498 |
} |
499 |
|
500 |
static inline void tcg_gen_shli_i64(int ret, int arg1, int64_t arg2) |
501 |
{ |
502 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
503 |
} |
504 |
|
505 |
static inline void tcg_gen_shr_i64(int ret, int arg1, int64_t arg2) |
506 |
{ |
507 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
508 |
} |
509 |
|
510 |
static inline void tcg_gen_shri_i64(int ret, int arg1, int64_t arg2) |
511 |
{ |
512 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
513 |
} |
514 |
|
515 |
static inline void tcg_gen_sar_i64(int ret, int arg1, int64_t arg2) |
516 |
{ |
517 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
518 |
} |
519 |
|
520 |
static inline void tcg_gen_sari_i64(int ret, int arg1, int64_t arg2) |
521 |
{ |
522 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
523 |
} |
524 |
|
525 |
static inline void tcg_gen_brcond_i64(int cond, TCGArg arg1, TCGArg arg2, |
526 |
int label_index)
|
527 |
{ |
528 |
tcg_gen_op6(INDEX_op_brcond2_i32, |
529 |
arg1, arg1 + 1, arg2, arg2 + 1, cond, label_index); |
530 |
} |
531 |
|
532 |
static inline void tcg_gen_mul_i64(int ret, int arg1, int arg2) |
533 |
{ |
534 |
int t0, t1;
|
535 |
|
536 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
537 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
538 |
|
539 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, t0 + 1, arg1, arg2);
|
540 |
|
541 |
tcg_gen_mul_i32(t1, arg1, arg2 + 1);
|
542 |
tcg_gen_add_i32(t0 + 1, t0 + 1, t1); |
543 |
tcg_gen_mul_i32(t1, arg1 + 1, arg2);
|
544 |
tcg_gen_add_i32(t0 + 1, t0 + 1, t1); |
545 |
|
546 |
tcg_gen_mov_i64(ret, t0); |
547 |
} |
548 |
|
549 |
static inline void tcg_gen_div_i64(int ret, int arg1, int64_t arg2) |
550 |
{ |
551 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
552 |
} |
553 |
|
554 |
static inline void tcg_gen_rem_i64(int ret, int arg1, int64_t arg2) |
555 |
{ |
556 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
557 |
} |
558 |
|
559 |
static inline void tcg_gen_divu_i64(int ret, int arg1, int64_t arg2) |
560 |
{ |
561 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
562 |
} |
563 |
|
564 |
static inline void tcg_gen_remu_i64(int ret, int arg1, int64_t arg2) |
565 |
{ |
566 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
567 |
} |
568 |
|
569 |
#else
|
570 |
|
571 |
static inline void tcg_gen_mov_i64(int ret, int arg) |
572 |
{ |
573 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
574 |
} |
575 |
|
576 |
static inline void tcg_gen_movi_i64(int ret, int64_t arg) |
577 |
{ |
578 |
tcg_gen_op2(INDEX_op_movi_i64, ret, arg); |
579 |
} |
580 |
|
581 |
static inline void tcg_gen_ld8u_i64(int ret, int arg2, tcg_target_long offset) |
582 |
{ |
583 |
tcg_gen_op3(INDEX_op_ld8u_i64, ret, arg2, offset); |
584 |
} |
585 |
|
586 |
static inline void tcg_gen_ld8s_i64(int ret, int arg2, tcg_target_long offset) |
587 |
{ |
588 |
tcg_gen_op3(INDEX_op_ld8s_i64, ret, arg2, offset); |
589 |
} |
590 |
|
591 |
static inline void tcg_gen_ld16u_i64(int ret, int arg2, tcg_target_long offset) |
592 |
{ |
593 |
tcg_gen_op3(INDEX_op_ld16u_i64, ret, arg2, offset); |
594 |
} |
595 |
|
596 |
static inline void tcg_gen_ld16s_i64(int ret, int arg2, tcg_target_long offset) |
597 |
{ |
598 |
tcg_gen_op3(INDEX_op_ld16s_i64, ret, arg2, offset); |
599 |
} |
600 |
|
601 |
static inline void tcg_gen_ld32u_i64(int ret, int arg2, tcg_target_long offset) |
602 |
{ |
603 |
tcg_gen_op3(INDEX_op_ld32u_i64, ret, arg2, offset); |
604 |
} |
605 |
|
606 |
static inline void tcg_gen_ld32s_i64(int ret, int arg2, tcg_target_long offset) |
607 |
{ |
608 |
tcg_gen_op3(INDEX_op_ld32s_i64, ret, arg2, offset); |
609 |
} |
610 |
|
611 |
static inline void tcg_gen_ld_i64(int ret, int arg2, tcg_target_long offset) |
612 |
{ |
613 |
tcg_gen_op3(INDEX_op_ld_i64, ret, arg2, offset); |
614 |
} |
615 |
|
616 |
static inline void tcg_gen_st8_i64(int arg1, int arg2, tcg_target_long offset) |
617 |
{ |
618 |
tcg_gen_op3(INDEX_op_st8_i64, arg1, arg2, offset); |
619 |
} |
620 |
|
621 |
static inline void tcg_gen_st16_i64(int arg1, int arg2, tcg_target_long offset) |
622 |
{ |
623 |
tcg_gen_op3(INDEX_op_st16_i64, arg1, arg2, offset); |
624 |
} |
625 |
|
626 |
static inline void tcg_gen_st32_i64(int arg1, int arg2, tcg_target_long offset) |
627 |
{ |
628 |
tcg_gen_op3(INDEX_op_st32_i64, arg1, arg2, offset); |
629 |
} |
630 |
|
631 |
static inline void tcg_gen_st_i64(int arg1, int arg2, tcg_target_long offset) |
632 |
{ |
633 |
tcg_gen_op3(INDEX_op_st_i64, arg1, arg2, offset); |
634 |
} |
635 |
|
636 |
static inline void tcg_gen_add_i64(int ret, int arg1, int arg2) |
637 |
{ |
638 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
639 |
} |
640 |
|
641 |
static inline void tcg_gen_addi_i64(int ret, int arg1, int64_t arg2) |
642 |
{ |
643 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
644 |
} |
645 |
|
646 |
static inline void tcg_gen_sub_i64(int ret, int arg1, int arg2) |
647 |
{ |
648 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
649 |
} |
650 |
|
651 |
static inline void tcg_gen_subi_i64(int ret, int arg1, int64_t arg2) |
652 |
{ |
653 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
654 |
} |
655 |
|
656 |
static inline void tcg_gen_and_i64(int ret, int arg1, int arg2) |
657 |
{ |
658 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
659 |
} |
660 |
|
661 |
static inline void tcg_gen_andi_i64(int ret, int arg1, int64_t arg2) |
662 |
{ |
663 |
tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); |
664 |
} |
665 |
|
666 |
static inline void tcg_gen_or_i64(int ret, int arg1, int arg2) |
667 |
{ |
668 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
669 |
} |
670 |
|
671 |
static inline void tcg_gen_ori_i64(int ret, int arg1, int64_t arg2) |
672 |
{ |
673 |
tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); |
674 |
} |
675 |
|
676 |
static inline void tcg_gen_xor_i64(int ret, int arg1, int arg2) |
677 |
{ |
678 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
679 |
} |
680 |
|
681 |
static inline void tcg_gen_xori_i64(int ret, int arg1, int64_t arg2) |
682 |
{ |
683 |
tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); |
684 |
} |
685 |
|
686 |
static inline void tcg_gen_shl_i64(int ret, int arg1, int arg2) |
687 |
{ |
688 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
689 |
} |
690 |
|
691 |
static inline void tcg_gen_shli_i64(int ret, int arg1, int64_t arg2) |
692 |
{ |
693 |
tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); |
694 |
} |
695 |
|
696 |
static inline void tcg_gen_shr_i64(int ret, int arg1, int arg2) |
697 |
{ |
698 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
699 |
} |
700 |
|
701 |
static inline void tcg_gen_shri_i64(int ret, int arg1, int64_t arg2) |
702 |
{ |
703 |
tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); |
704 |
} |
705 |
|
706 |
static inline void tcg_gen_sar_i64(int ret, int arg1, int arg2) |
707 |
{ |
708 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
709 |
} |
710 |
|
711 |
static inline void tcg_gen_sari_i64(int ret, int arg1, int64_t arg2) |
712 |
{ |
713 |
tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); |
714 |
} |
715 |
|
716 |
static inline void tcg_gen_brcond_i64(int cond, TCGArg arg1, TCGArg arg2, |
717 |
int label_index)
|
718 |
{ |
719 |
tcg_gen_op4(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
720 |
} |
721 |
|
722 |
static inline void tcg_gen_mul_i64(int ret, int arg1, int arg2) |
723 |
{ |
724 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
725 |
} |
726 |
|
727 |
#ifdef TCG_TARGET_HAS_div_i64
|
728 |
static inline void tcg_gen_div_i64(int ret, int arg1, int arg2) |
729 |
{ |
730 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
731 |
} |
732 |
|
733 |
static inline void tcg_gen_rem_i64(int ret, int arg1, int arg2) |
734 |
{ |
735 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
736 |
} |
737 |
|
738 |
static inline void tcg_gen_divu_i64(int ret, int arg1, int arg2) |
739 |
{ |
740 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
741 |
} |
742 |
|
743 |
static inline void tcg_gen_remu_i64(int ret, int arg1, int arg2) |
744 |
{ |
745 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
746 |
} |
747 |
#else
|
748 |
static inline void tcg_gen_div_i64(int ret, int arg1, int arg2) |
749 |
{ |
750 |
int t0;
|
751 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
752 |
tcg_gen_sari_i64(t0, arg1, 63);
|
753 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
754 |
} |
755 |
|
756 |
static inline void tcg_gen_rem_i64(int ret, int arg1, int arg2) |
757 |
{ |
758 |
int t0;
|
759 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
760 |
tcg_gen_sari_i64(t0, arg1, 63);
|
761 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
762 |
} |
763 |
|
764 |
static inline void tcg_gen_divu_i64(int ret, int arg1, int arg2) |
765 |
{ |
766 |
int t0;
|
767 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
768 |
tcg_gen_movi_i64(t0, 0);
|
769 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
770 |
} |
771 |
|
772 |
static inline void tcg_gen_remu_i64(int ret, int arg1, int arg2) |
773 |
{ |
774 |
int t0;
|
775 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
776 |
tcg_gen_movi_i64(t0, 0);
|
777 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
778 |
} |
779 |
#endif
|
780 |
|
781 |
#endif
|
782 |
|
783 |
/***************************************/
|
784 |
/* optional operations */
|
785 |
|
786 |
static inline void tcg_gen_ext8s_i32(int ret, int arg) |
787 |
{ |
788 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
789 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
790 |
#else
|
791 |
tcg_gen_shli_i32(ret, arg, 24);
|
792 |
tcg_gen_sari_i32(ret, arg, 24);
|
793 |
#endif
|
794 |
} |
795 |
|
796 |
static inline void tcg_gen_ext16s_i32(int ret, int arg) |
797 |
{ |
798 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
799 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
800 |
#else
|
801 |
tcg_gen_shli_i32(ret, arg, 16);
|
802 |
tcg_gen_sari_i32(ret, arg, 16);
|
803 |
#endif
|
804 |
} |
805 |
|
806 |
/* Note: we assume the two high bytes are set to zero */
|
807 |
static inline void tcg_gen_bswap16_i32(TCGArg ret, TCGArg arg) |
808 |
{ |
809 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
810 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
811 |
#else
|
812 |
TCGArg t0, t1; |
813 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
814 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
815 |
|
816 |
tcg_gen_shri_i32(t0, arg, 8);
|
817 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
818 |
tcg_gen_shli_i32(t1, t1, 8);
|
819 |
tcg_gen_or_i32(ret, t0, t1); |
820 |
#endif
|
821 |
} |
822 |
|
823 |
static inline void tcg_gen_bswap_i32(TCGArg ret, TCGArg arg) |
824 |
{ |
825 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
826 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
827 |
#else
|
828 |
TCGArg t0, t1; |
829 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
830 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
831 |
|
832 |
tcg_gen_shli_i32(t0, arg, 24);
|
833 |
|
834 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
835 |
tcg_gen_shli_i32(t1, t1, 8);
|
836 |
tcg_gen_or_i32(t0, t0, t1); |
837 |
|
838 |
tcg_gen_shri_i32(t1, arg, 8);
|
839 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
840 |
tcg_gen_or_i32(t0, t0, t1); |
841 |
|
842 |
tcg_gen_shri_i32(t1, arg, 24);
|
843 |
tcg_gen_or_i32(ret, t0, t1); |
844 |
#endif
|
845 |
} |
846 |
|
847 |
#if TCG_TARGET_REG_BITS == 32 |
848 |
static inline void tcg_gen_ext8s_i64(int ret, int arg) |
849 |
{ |
850 |
tcg_gen_ext8s_i32(ret, arg); |
851 |
tcg_gen_sari_i32(ret + 1, ret, 31); |
852 |
} |
853 |
|
854 |
static inline void tcg_gen_ext16s_i64(int ret, int arg) |
855 |
{ |
856 |
tcg_gen_ext16s_i32(ret, arg); |
857 |
tcg_gen_sari_i32(ret + 1, ret, 31); |
858 |
} |
859 |
|
860 |
static inline void tcg_gen_ext32s_i64(int ret, int arg) |
861 |
{ |
862 |
tcg_gen_mov_i32(ret, arg); |
863 |
tcg_gen_sari_i32(ret + 1, ret, 31); |
864 |
} |
865 |
|
866 |
static inline void tcg_gen_trunc_i64_i32(int ret, int arg) |
867 |
{ |
868 |
tcg_gen_mov_i32(ret, arg); |
869 |
} |
870 |
|
871 |
static inline void tcg_gen_extu_i32_i64(int ret, int arg) |
872 |
{ |
873 |
tcg_gen_mov_i32(ret, arg); |
874 |
tcg_gen_movi_i32(ret + 1, 0); |
875 |
} |
876 |
|
877 |
static inline void tcg_gen_ext_i32_i64(int ret, int arg) |
878 |
{ |
879 |
tcg_gen_mov_i32(ret, arg); |
880 |
tcg_gen_sari_i32(ret + 1, ret, 31); |
881 |
} |
882 |
|
883 |
static inline void tcg_gen_bswap_i64(int ret, int arg) |
884 |
{ |
885 |
int t0, t1;
|
886 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
887 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
888 |
|
889 |
tcg_gen_bswap_i32(t0, arg); |
890 |
tcg_gen_bswap_i32(t1, arg + 1);
|
891 |
tcg_gen_mov_i32(ret, t1); |
892 |
tcg_gen_mov_i32(ret + 1, t0);
|
893 |
} |
894 |
#else
|
895 |
|
896 |
static inline void tcg_gen_ext8s_i64(int ret, int arg) |
897 |
{ |
898 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
899 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
900 |
#else
|
901 |
tcg_gen_shli_i64(ret, arg, 56);
|
902 |
tcg_gen_sari_i64(ret, arg, 56);
|
903 |
#endif
|
904 |
} |
905 |
|
906 |
static inline void tcg_gen_ext16s_i64(int ret, int arg) |
907 |
{ |
908 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
909 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
910 |
#else
|
911 |
tcg_gen_shli_i64(ret, arg, 48);
|
912 |
tcg_gen_sari_i64(ret, arg, 48);
|
913 |
#endif
|
914 |
} |
915 |
|
916 |
static inline void tcg_gen_ext32s_i64(int ret, int arg) |
917 |
{ |
918 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
919 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
920 |
#else
|
921 |
tcg_gen_shli_i64(ret, arg, 32);
|
922 |
tcg_gen_sari_i64(ret, arg, 32);
|
923 |
#endif
|
924 |
} |
925 |
|
926 |
/* Note: we assume the target supports move between 32 and 64 bit
|
927 |
registers */
|
928 |
static inline void tcg_gen_trunc_i64_i32(int ret, int arg) |
929 |
{ |
930 |
tcg_gen_mov_i32(ret, arg); |
931 |
} |
932 |
|
933 |
/* Note: we assume the target supports move between 32 and 64 bit
|
934 |
registers */
|
935 |
static inline void tcg_gen_extu_i32_i64(int ret, int arg) |
936 |
{ |
937 |
tcg_gen_andi_i64(ret, arg, 0xffffffff);
|
938 |
} |
939 |
|
940 |
/* Note: we assume the target supports move between 32 and 64 bit
|
941 |
registers */
|
942 |
static inline void tcg_gen_ext_i32_i64(int ret, int arg) |
943 |
{ |
944 |
tcg_gen_ext32s_i64(ret, arg); |
945 |
} |
946 |
|
947 |
static inline void tcg_gen_bswap_i64(TCGArg ret, TCGArg arg) |
948 |
{ |
949 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
950 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
951 |
#else
|
952 |
TCGArg t0, t1; |
953 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
954 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
955 |
|
956 |
tcg_gen_shli_i64(t0, arg, 56);
|
957 |
|
958 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
959 |
tcg_gen_shli_i64(t1, t1, 40);
|
960 |
tcg_gen_or_i64(t0, t0, t1); |
961 |
|
962 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
963 |
tcg_gen_shli_i64(t1, t1, 24);
|
964 |
tcg_gen_or_i64(t0, t0, t1); |
965 |
|
966 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
967 |
tcg_gen_shli_i64(t1, t1, 8);
|
968 |
tcg_gen_or_i64(t0, t0, t1); |
969 |
|
970 |
tcg_gen_shri_i64(t1, arg, 8);
|
971 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
972 |
tcg_gen_or_i64(t0, t0, t1); |
973 |
|
974 |
tcg_gen_shri_i64(t1, arg, 24);
|
975 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
976 |
tcg_gen_or_i64(t0, t0, t1); |
977 |
|
978 |
tcg_gen_shri_i64(t1, arg, 40);
|
979 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
980 |
tcg_gen_or_i64(t0, t0, t1); |
981 |
|
982 |
tcg_gen_shri_i64(t1, arg, 56);
|
983 |
tcg_gen_or_i64(ret, t0, t1); |
984 |
#endif
|
985 |
} |
986 |
|
987 |
#endif
|
988 |
|
989 |
/***************************************/
|
990 |
static inline void tcg_gen_macro_2(int ret0, int ret1, int macro_id) |
991 |
{ |
992 |
tcg_gen_op3(INDEX_op_macro_2, ret0, ret1, macro_id); |
993 |
} |
994 |
|
995 |
/***************************************/
|
996 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
997 |
type. */
|
998 |
#ifndef TARGET_LONG_BITS
|
999 |
#error must include QEMU headers
|
1000 |
#endif
|
1001 |
|
1002 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
1003 |
{ |
1004 |
tcg_gen_op1(INDEX_op_exit_tb, val); |
1005 |
} |
1006 |
|
1007 |
static inline void tcg_gen_goto_tb(int idx) |
1008 |
{ |
1009 |
tcg_gen_op1(INDEX_op_goto_tb, idx); |
1010 |
} |
1011 |
|
1012 |
#if TCG_TARGET_REG_BITS == 32 |
1013 |
static inline void tcg_gen_qemu_ld8u(int ret, int addr, int mem_index) |
1014 |
{ |
1015 |
#if TARGET_LONG_BITS == 32 |
1016 |
tcg_gen_op3(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1017 |
#else
|
1018 |
tcg_gen_op4(INDEX_op_qemu_ld8u, ret, addr, addr + 1, mem_index);
|
1019 |
tcg_gen_movi_i32(ret + 1, 0); |
1020 |
#endif
|
1021 |
} |
1022 |
|
1023 |
static inline void tcg_gen_qemu_ld8s(int ret, int addr, int mem_index) |
1024 |
{ |
1025 |
#if TARGET_LONG_BITS == 32 |
1026 |
tcg_gen_op3(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1027 |
#else
|
1028 |
tcg_gen_op4(INDEX_op_qemu_ld8s, ret, addr, addr + 1, mem_index);
|
1029 |
tcg_gen_ext8s_i32(ret + 1, ret);
|
1030 |
#endif
|
1031 |
} |
1032 |
|
1033 |
static inline void tcg_gen_qemu_ld16u(int ret, int addr, int mem_index) |
1034 |
{ |
1035 |
#if TARGET_LONG_BITS == 32 |
1036 |
tcg_gen_op3(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1037 |
#else
|
1038 |
tcg_gen_op4(INDEX_op_qemu_ld16u, ret, addr, addr + 1, mem_index);
|
1039 |
tcg_gen_movi_i32(ret + 1, 0); |
1040 |
#endif
|
1041 |
} |
1042 |
|
1043 |
static inline void tcg_gen_qemu_ld16s(int ret, int addr, int mem_index) |
1044 |
{ |
1045 |
#if TARGET_LONG_BITS == 32 |
1046 |
tcg_gen_op3(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1047 |
#else
|
1048 |
tcg_gen_op4(INDEX_op_qemu_ld16s, ret, addr, addr + 1, mem_index);
|
1049 |
tcg_gen_ext16s_i32(ret + 1, ret);
|
1050 |
#endif
|
1051 |
} |
1052 |
|
1053 |
static inline void tcg_gen_qemu_ld32u(int ret, int addr, int mem_index) |
1054 |
{ |
1055 |
#if TARGET_LONG_BITS == 32 |
1056 |
tcg_gen_op3(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1057 |
#else
|
1058 |
tcg_gen_op4(INDEX_op_qemu_ld32u, ret, addr, addr + 1, mem_index);
|
1059 |
tcg_gen_movi_i32(ret + 1, 0); |
1060 |
#endif
|
1061 |
} |
1062 |
|
1063 |
static inline void tcg_gen_qemu_ld32s(int ret, int addr, int mem_index) |
1064 |
{ |
1065 |
#if TARGET_LONG_BITS == 32 |
1066 |
tcg_gen_op3(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1067 |
#else
|
1068 |
tcg_gen_op4(INDEX_op_qemu_ld32u, ret, addr, addr + 1, mem_index);
|
1069 |
tcg_gen_sari_i32(ret + 1, ret, 31); |
1070 |
#endif
|
1071 |
} |
1072 |
|
1073 |
static inline void tcg_gen_qemu_ld64(int ret, int addr, int mem_index) |
1074 |
{ |
1075 |
#if TARGET_LONG_BITS == 32 |
1076 |
tcg_gen_op4(INDEX_op_qemu_ld64, ret, ret + 1, addr, mem_index);
|
1077 |
#else
|
1078 |
tcg_gen_op5(INDEX_op_qemu_ld64, ret, ret + 1, addr, addr + 1, mem_index); |
1079 |
#endif
|
1080 |
} |
1081 |
|
1082 |
static inline void tcg_gen_qemu_st8(int arg, int addr, int mem_index) |
1083 |
{ |
1084 |
#if TARGET_LONG_BITS == 32 |
1085 |
tcg_gen_op3(INDEX_op_qemu_st8, arg, addr, mem_index); |
1086 |
#else
|
1087 |
tcg_gen_op4(INDEX_op_qemu_st8, arg, addr, addr + 1, mem_index);
|
1088 |
#endif
|
1089 |
} |
1090 |
|
1091 |
static inline void tcg_gen_qemu_st16(int arg, int addr, int mem_index) |
1092 |
{ |
1093 |
#if TARGET_LONG_BITS == 32 |
1094 |
tcg_gen_op3(INDEX_op_qemu_st16, arg, addr, mem_index); |
1095 |
#else
|
1096 |
tcg_gen_op4(INDEX_op_qemu_st16, arg, addr, addr + 1, mem_index);
|
1097 |
#endif
|
1098 |
} |
1099 |
|
1100 |
static inline void tcg_gen_qemu_st32(int arg, int addr, int mem_index) |
1101 |
{ |
1102 |
#if TARGET_LONG_BITS == 32 |
1103 |
tcg_gen_op3(INDEX_op_qemu_st32, arg, addr, mem_index); |
1104 |
#else
|
1105 |
tcg_gen_op4(INDEX_op_qemu_st32, arg, addr, addr + 1, mem_index);
|
1106 |
#endif
|
1107 |
} |
1108 |
|
1109 |
static inline void tcg_gen_qemu_st64(int arg, int addr, int mem_index) |
1110 |
{ |
1111 |
#if TARGET_LONG_BITS == 32 |
1112 |
tcg_gen_op4(INDEX_op_qemu_st64, arg, arg + 1, addr, mem_index);
|
1113 |
#else
|
1114 |
tcg_gen_op5(INDEX_op_qemu_st64, arg, arg + 1, addr, addr + 1, mem_index); |
1115 |
#endif
|
1116 |
} |
1117 |
|
1118 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1119 |
|
1120 |
static inline void tcg_gen_qemu_ld8u(int ret, int addr, int mem_index) |
1121 |
{ |
1122 |
tcg_gen_op3(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1123 |
} |
1124 |
|
1125 |
static inline void tcg_gen_qemu_ld8s(int ret, int addr, int mem_index) |
1126 |
{ |
1127 |
tcg_gen_op3(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1128 |
} |
1129 |
|
1130 |
static inline void tcg_gen_qemu_ld16u(int ret, int addr, int mem_index) |
1131 |
{ |
1132 |
tcg_gen_op3(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1133 |
} |
1134 |
|
1135 |
static inline void tcg_gen_qemu_ld16s(int ret, int addr, int mem_index) |
1136 |
{ |
1137 |
tcg_gen_op3(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1138 |
} |
1139 |
|
1140 |
static inline void tcg_gen_qemu_ld32u(int ret, int addr, int mem_index) |
1141 |
{ |
1142 |
tcg_gen_op3(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1143 |
} |
1144 |
|
1145 |
static inline void tcg_gen_qemu_ld32s(int ret, int addr, int mem_index) |
1146 |
{ |
1147 |
tcg_gen_op3(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
1148 |
} |
1149 |
|
1150 |
static inline void tcg_gen_qemu_ld64(int ret, int addr, int mem_index) |
1151 |
{ |
1152 |
tcg_gen_op3(INDEX_op_qemu_ld64, ret, addr, mem_index); |
1153 |
} |
1154 |
|
1155 |
static inline void tcg_gen_qemu_st8(int arg, int addr, int mem_index) |
1156 |
{ |
1157 |
tcg_gen_op3(INDEX_op_qemu_st8, arg, addr, mem_index); |
1158 |
} |
1159 |
|
1160 |
static inline void tcg_gen_qemu_st16(int arg, int addr, int mem_index) |
1161 |
{ |
1162 |
tcg_gen_op3(INDEX_op_qemu_st16, arg, addr, mem_index); |
1163 |
} |
1164 |
|
1165 |
static inline void tcg_gen_qemu_st32(int arg, int addr, int mem_index) |
1166 |
{ |
1167 |
tcg_gen_op3(INDEX_op_qemu_st32, arg, addr, mem_index); |
1168 |
} |
1169 |
|
1170 |
static inline void tcg_gen_qemu_st64(int arg, int addr, int mem_index) |
1171 |
{ |
1172 |
tcg_gen_op3(INDEX_op_qemu_st64, arg, addr, mem_index); |
1173 |
} |
1174 |
|
1175 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |