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1 | 31e31b8a | bellard | /*
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2 | 93ac68bc | bellard | * qemu user main
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3 | 5fafdf24 | ths | *
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4 | 68d0f70e | bellard | * Copyright (c) 2003-2008 Fabrice Bellard
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5 | 31e31b8a | bellard | *
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6 | 31e31b8a | bellard | * This program is free software; you can redistribute it and/or modify
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7 | 31e31b8a | bellard | * it under the terms of the GNU General Public License as published by
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8 | 31e31b8a | bellard | * the Free Software Foundation; either version 2 of the License, or
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9 | 31e31b8a | bellard | * (at your option) any later version.
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10 | 31e31b8a | bellard | *
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11 | 31e31b8a | bellard | * This program is distributed in the hope that it will be useful,
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12 | 31e31b8a | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 31e31b8a | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 | 31e31b8a | bellard | * GNU General Public License for more details.
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15 | 31e31b8a | bellard | *
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16 | 31e31b8a | bellard | * You should have received a copy of the GNU General Public License
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17 | 8167ee88 | Blue Swirl | * along with this program; if not, see <http://www.gnu.org/licenses/>.
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18 | 31e31b8a | bellard | */
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19 | 31e31b8a | bellard | #include <stdlib.h> |
20 | 31e31b8a | bellard | #include <stdio.h> |
21 | 31e31b8a | bellard | #include <stdarg.h> |
22 | 04369ff2 | bellard | #include <string.h> |
23 | 31e31b8a | bellard | #include <errno.h> |
24 | 0ecfa993 | bellard | #include <unistd.h> |
25 | e441570f | balrog | #include <sys/mman.h> |
26 | edf8e2af | Mika Westerberg | #include <sys/syscall.h> |
27 | 31e31b8a | bellard | |
28 | 3ef693a0 | bellard | #include "qemu.h" |
29 | ca10f867 | aurel32 | #include "qemu-common.h" |
30 | 902b3d5c | malc | #include "cache-utils.h" |
31 | d5975363 | pbrook | /* For tb_lock */
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32 | d5975363 | pbrook | #include "exec-all.h" |
33 | 31e31b8a | bellard | |
34 | 04a6dfeb | aurel32 | |
35 | 04a6dfeb | aurel32 | #include "envlist.h" |
36 | 04a6dfeb | aurel32 | |
37 | 3ef693a0 | bellard | #define DEBUG_LOGFILE "/tmp/qemu.log" |
38 | 586314f2 | bellard | |
39 | d088d664 | aurel32 | char *exec_path;
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40 | d088d664 | aurel32 | |
41 | 1b530a6d | aurel32 | int singlestep;
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42 | 379f6698 | Paul Brook | unsigned long mmap_min_addr; |
43 | 14f24e14 | Richard Henderson | #if defined(CONFIG_USE_GUEST_BASE)
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44 | 379f6698 | Paul Brook | unsigned long guest_base; |
45 | 379f6698 | Paul Brook | int have_guest_base;
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46 | 379f6698 | Paul Brook | #endif
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47 | 1b530a6d | aurel32 | |
48 | 74cd30b8 | bellard | static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
49 | c5937220 | pbrook | const char *qemu_uname_release = CONFIG_UNAME_RELEASE; |
50 | 586314f2 | bellard | |
51 | 9de5e440 | bellard | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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52 | 9de5e440 | bellard | we allocate a bigger stack. Need a better solution, for example
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53 | 9de5e440 | bellard | by remapping the process stack directly at the right place */
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54 | 9de5e440 | bellard | unsigned long x86_stack_size = 512 * 1024; |
55 | 31e31b8a | bellard | |
56 | 31e31b8a | bellard | void gemu_log(const char *fmt, ...) |
57 | 31e31b8a | bellard | { |
58 | 31e31b8a | bellard | va_list ap; |
59 | 31e31b8a | bellard | |
60 | 31e31b8a | bellard | va_start(ap, fmt); |
61 | 31e31b8a | bellard | vfprintf(stderr, fmt, ap); |
62 | 31e31b8a | bellard | va_end(ap); |
63 | 31e31b8a | bellard | } |
64 | 31e31b8a | bellard | |
65 | 8fcd3692 | blueswir1 | #if defined(TARGET_I386)
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66 | a541f297 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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67 | 92ccca6a | bellard | { |
68 | 92ccca6a | bellard | return -1; |
69 | 92ccca6a | bellard | } |
70 | 8fcd3692 | blueswir1 | #endif
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71 | 92ccca6a | bellard | |
72 | 28ab0e2e | bellard | /* timers for rdtsc */
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73 | 28ab0e2e | bellard | |
74 | 1dce7c3c | bellard | #if 0
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75 | 28ab0e2e | bellard | |
76 | 28ab0e2e | bellard | static uint64_t emu_time;
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77 | 28ab0e2e | bellard | |
78 | 28ab0e2e | bellard | int64_t cpu_get_real_ticks(void)
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79 | 28ab0e2e | bellard | {
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80 | 28ab0e2e | bellard | return emu_time++;
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81 | 28ab0e2e | bellard | }
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82 | 28ab0e2e | bellard | |
83 | 28ab0e2e | bellard | #endif
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84 | 28ab0e2e | bellard | |
85 | 2f7bb878 | Juan Quintela | #if defined(CONFIG_USE_NPTL)
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86 | d5975363 | pbrook | /***********************************************************/
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87 | d5975363 | pbrook | /* Helper routines for implementing atomic operations. */
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88 | d5975363 | pbrook | |
89 | d5975363 | pbrook | /* To implement exclusive operations we force all cpus to syncronise.
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90 | d5975363 | pbrook | We don't require a full sync, only that no cpus are executing guest code.
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91 | d5975363 | pbrook | The alternative is to map target atomic ops onto host equivalents,
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92 | d5975363 | pbrook | which requires quite a lot of per host/target work. */
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93 | c2764719 | pbrook | static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
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94 | d5975363 | pbrook | static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
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95 | d5975363 | pbrook | static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
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96 | d5975363 | pbrook | static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
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97 | d5975363 | pbrook | static int pending_cpus; |
98 | d5975363 | pbrook | |
99 | d5975363 | pbrook | /* Make sure everything is in a consistent state for calling fork(). */
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100 | d5975363 | pbrook | void fork_start(void) |
101 | d5975363 | pbrook | { |
102 | d5975363 | pbrook | pthread_mutex_lock(&tb_lock); |
103 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
104 | d032d1b4 | Riku Voipio | mmap_fork_start(); |
105 | d5975363 | pbrook | } |
106 | d5975363 | pbrook | |
107 | d5975363 | pbrook | void fork_end(int child) |
108 | d5975363 | pbrook | { |
109 | d032d1b4 | Riku Voipio | mmap_fork_end(child); |
110 | d5975363 | pbrook | if (child) {
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111 | d5975363 | pbrook | /* Child processes created by fork() only have a single thread.
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112 | d5975363 | pbrook | Discard information about the parent threads. */
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113 | d5975363 | pbrook | first_cpu = thread_env; |
114 | d5975363 | pbrook | thread_env->next_cpu = NULL;
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115 | d5975363 | pbrook | pending_cpus = 0;
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116 | d5975363 | pbrook | pthread_mutex_init(&exclusive_lock, NULL);
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117 | c2764719 | pbrook | pthread_mutex_init(&cpu_list_mutex, NULL);
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118 | d5975363 | pbrook | pthread_cond_init(&exclusive_cond, NULL);
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119 | d5975363 | pbrook | pthread_cond_init(&exclusive_resume, NULL);
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120 | d5975363 | pbrook | pthread_mutex_init(&tb_lock, NULL);
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121 | 2b1319c8 | aurel32 | gdbserver_fork(thread_env); |
122 | d5975363 | pbrook | } else {
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123 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
124 | d5975363 | pbrook | pthread_mutex_unlock(&tb_lock); |
125 | d5975363 | pbrook | } |
126 | d5975363 | pbrook | } |
127 | d5975363 | pbrook | |
128 | d5975363 | pbrook | /* Wait for pending exclusive operations to complete. The exclusive lock
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129 | d5975363 | pbrook | must be held. */
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130 | d5975363 | pbrook | static inline void exclusive_idle(void) |
131 | d5975363 | pbrook | { |
132 | d5975363 | pbrook | while (pending_cpus) {
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133 | d5975363 | pbrook | pthread_cond_wait(&exclusive_resume, &exclusive_lock); |
134 | d5975363 | pbrook | } |
135 | d5975363 | pbrook | } |
136 | d5975363 | pbrook | |
137 | d5975363 | pbrook | /* Start an exclusive operation.
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138 | d5975363 | pbrook | Must only be called from outside cpu_arm_exec. */
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139 | d5975363 | pbrook | static inline void start_exclusive(void) |
140 | d5975363 | pbrook | { |
141 | d5975363 | pbrook | CPUState *other; |
142 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
143 | d5975363 | pbrook | exclusive_idle(); |
144 | d5975363 | pbrook | |
145 | d5975363 | pbrook | pending_cpus = 1;
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146 | d5975363 | pbrook | /* Make all other cpus stop executing. */
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147 | d5975363 | pbrook | for (other = first_cpu; other; other = other->next_cpu) {
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148 | d5975363 | pbrook | if (other->running) {
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149 | d5975363 | pbrook | pending_cpus++; |
150 | 3098dba0 | aurel32 | cpu_exit(other); |
151 | d5975363 | pbrook | } |
152 | d5975363 | pbrook | } |
153 | d5975363 | pbrook | if (pending_cpus > 1) { |
154 | d5975363 | pbrook | pthread_cond_wait(&exclusive_cond, &exclusive_lock); |
155 | d5975363 | pbrook | } |
156 | d5975363 | pbrook | } |
157 | d5975363 | pbrook | |
158 | d5975363 | pbrook | /* Finish an exclusive operation. */
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159 | d5975363 | pbrook | static inline void end_exclusive(void) |
160 | d5975363 | pbrook | { |
161 | d5975363 | pbrook | pending_cpus = 0;
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162 | d5975363 | pbrook | pthread_cond_broadcast(&exclusive_resume); |
163 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
164 | d5975363 | pbrook | } |
165 | d5975363 | pbrook | |
166 | d5975363 | pbrook | /* Wait for exclusive ops to finish, and begin cpu execution. */
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167 | d5975363 | pbrook | static inline void cpu_exec_start(CPUState *env) |
168 | d5975363 | pbrook | { |
169 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
170 | d5975363 | pbrook | exclusive_idle(); |
171 | d5975363 | pbrook | env->running = 1;
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172 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
173 | d5975363 | pbrook | } |
174 | d5975363 | pbrook | |
175 | d5975363 | pbrook | /* Mark cpu as not executing, and release pending exclusive ops. */
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176 | d5975363 | pbrook | static inline void cpu_exec_end(CPUState *env) |
177 | d5975363 | pbrook | { |
178 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
179 | d5975363 | pbrook | env->running = 0;
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180 | d5975363 | pbrook | if (pending_cpus > 1) { |
181 | d5975363 | pbrook | pending_cpus--; |
182 | d5975363 | pbrook | if (pending_cpus == 1) { |
183 | d5975363 | pbrook | pthread_cond_signal(&exclusive_cond); |
184 | d5975363 | pbrook | } |
185 | d5975363 | pbrook | } |
186 | d5975363 | pbrook | exclusive_idle(); |
187 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
188 | d5975363 | pbrook | } |
189 | c2764719 | pbrook | |
190 | c2764719 | pbrook | void cpu_list_lock(void) |
191 | c2764719 | pbrook | { |
192 | c2764719 | pbrook | pthread_mutex_lock(&cpu_list_mutex); |
193 | c2764719 | pbrook | } |
194 | c2764719 | pbrook | |
195 | c2764719 | pbrook | void cpu_list_unlock(void) |
196 | c2764719 | pbrook | { |
197 | c2764719 | pbrook | pthread_mutex_unlock(&cpu_list_mutex); |
198 | c2764719 | pbrook | } |
199 | 2f7bb878 | Juan Quintela | #else /* if !CONFIG_USE_NPTL */ |
200 | d5975363 | pbrook | /* These are no-ops because we are not threadsafe. */
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201 | d5975363 | pbrook | static inline void cpu_exec_start(CPUState *env) |
202 | d5975363 | pbrook | { |
203 | d5975363 | pbrook | } |
204 | d5975363 | pbrook | |
205 | d5975363 | pbrook | static inline void cpu_exec_end(CPUState *env) |
206 | d5975363 | pbrook | { |
207 | d5975363 | pbrook | } |
208 | d5975363 | pbrook | |
209 | d5975363 | pbrook | static inline void start_exclusive(void) |
210 | d5975363 | pbrook | { |
211 | d5975363 | pbrook | } |
212 | d5975363 | pbrook | |
213 | d5975363 | pbrook | static inline void end_exclusive(void) |
214 | d5975363 | pbrook | { |
215 | d5975363 | pbrook | } |
216 | d5975363 | pbrook | |
217 | d5975363 | pbrook | void fork_start(void) |
218 | d5975363 | pbrook | { |
219 | d5975363 | pbrook | } |
220 | d5975363 | pbrook | |
221 | d5975363 | pbrook | void fork_end(int child) |
222 | d5975363 | pbrook | { |
223 | 2b1319c8 | aurel32 | if (child) {
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224 | 2b1319c8 | aurel32 | gdbserver_fork(thread_env); |
225 | 2b1319c8 | aurel32 | } |
226 | d5975363 | pbrook | } |
227 | c2764719 | pbrook | |
228 | c2764719 | pbrook | void cpu_list_lock(void) |
229 | c2764719 | pbrook | { |
230 | c2764719 | pbrook | } |
231 | c2764719 | pbrook | |
232 | c2764719 | pbrook | void cpu_list_unlock(void) |
233 | c2764719 | pbrook | { |
234 | c2764719 | pbrook | } |
235 | d5975363 | pbrook | #endif
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236 | d5975363 | pbrook | |
237 | d5975363 | pbrook | |
238 | a541f297 | bellard | #ifdef TARGET_I386
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239 | a541f297 | bellard | /***********************************************************/
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240 | a541f297 | bellard | /* CPUX86 core interface */
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241 | a541f297 | bellard | |
242 | 02a1602e | bellard | void cpu_smm_update(CPUState *env)
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243 | 02a1602e | bellard | { |
244 | 02a1602e | bellard | } |
245 | 02a1602e | bellard | |
246 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
247 | 28ab0e2e | bellard | { |
248 | 28ab0e2e | bellard | return cpu_get_real_ticks();
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249 | 28ab0e2e | bellard | } |
250 | 28ab0e2e | bellard | |
251 | 5fafdf24 | ths | static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
252 | f4beb510 | bellard | int flags)
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253 | 6dbad63e | bellard | { |
254 | f4beb510 | bellard | unsigned int e1, e2; |
255 | 53a5960a | pbrook | uint32_t *p; |
256 | 6dbad63e | bellard | e1 = (addr << 16) | (limit & 0xffff); |
257 | 6dbad63e | bellard | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
258 | f4beb510 | bellard | e2 |= flags; |
259 | 53a5960a | pbrook | p = ptr; |
260 | d538e8f5 | malc | p[0] = tswap32(e1);
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261 | d538e8f5 | malc | p[1] = tswap32(e2);
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262 | f4beb510 | bellard | } |
263 | f4beb510 | bellard | |
264 | e441570f | balrog | static uint64_t *idt_table;
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265 | eb38c52c | blueswir1 | #ifdef TARGET_X86_64
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266 | d2fd1af7 | bellard | static void set_gate64(void *ptr, unsigned int type, unsigned int dpl, |
267 | d2fd1af7 | bellard | uint64_t addr, unsigned int sel) |
268 | f4beb510 | bellard | { |
269 | 4dbc422b | bellard | uint32_t *p, e1, e2; |
270 | f4beb510 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
271 | f4beb510 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
272 | 53a5960a | pbrook | p = ptr; |
273 | 4dbc422b | bellard | p[0] = tswap32(e1);
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274 | 4dbc422b | bellard | p[1] = tswap32(e2);
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275 | 4dbc422b | bellard | p[2] = tswap32(addr >> 32); |
276 | 4dbc422b | bellard | p[3] = 0; |
277 | 6dbad63e | bellard | } |
278 | d2fd1af7 | bellard | /* only dpl matters as we do only user space emulation */
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279 | d2fd1af7 | bellard | static void set_idt(int n, unsigned int dpl) |
280 | d2fd1af7 | bellard | { |
281 | d2fd1af7 | bellard | set_gate64(idt_table + n * 2, 0, dpl, 0, 0); |
282 | d2fd1af7 | bellard | } |
283 | d2fd1af7 | bellard | #else
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284 | d2fd1af7 | bellard | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
285 | d2fd1af7 | bellard | uint32_t addr, unsigned int sel) |
286 | d2fd1af7 | bellard | { |
287 | 4dbc422b | bellard | uint32_t *p, e1, e2; |
288 | d2fd1af7 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
289 | d2fd1af7 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
290 | d2fd1af7 | bellard | p = ptr; |
291 | 4dbc422b | bellard | p[0] = tswap32(e1);
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292 | 4dbc422b | bellard | p[1] = tswap32(e2);
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293 | d2fd1af7 | bellard | } |
294 | d2fd1af7 | bellard | |
295 | f4beb510 | bellard | /* only dpl matters as we do only user space emulation */
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296 | f4beb510 | bellard | static void set_idt(int n, unsigned int dpl) |
297 | f4beb510 | bellard | { |
298 | f4beb510 | bellard | set_gate(idt_table + n, 0, dpl, 0, 0); |
299 | f4beb510 | bellard | } |
300 | d2fd1af7 | bellard | #endif
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301 | 31e31b8a | bellard | |
302 | 89e957e7 | bellard | void cpu_loop(CPUX86State *env)
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303 | 1b6b029e | bellard | { |
304 | bc8a22cc | bellard | int trapnr;
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305 | 992f48a0 | blueswir1 | abi_ulong pc; |
306 | c227f099 | Anthony Liguori | target_siginfo_t info; |
307 | 851e67a1 | bellard | |
308 | 1b6b029e | bellard | for(;;) {
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309 | bc8a22cc | bellard | trapnr = cpu_x86_exec(env); |
310 | bc8a22cc | bellard | switch(trapnr) {
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311 | f4beb510 | bellard | case 0x80: |
312 | d2fd1af7 | bellard | /* linux syscall from int $0x80 */
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313 | 5fafdf24 | ths | env->regs[R_EAX] = do_syscall(env, |
314 | 5fafdf24 | ths | env->regs[R_EAX], |
315 | f4beb510 | bellard | env->regs[R_EBX], |
316 | f4beb510 | bellard | env->regs[R_ECX], |
317 | f4beb510 | bellard | env->regs[R_EDX], |
318 | f4beb510 | bellard | env->regs[R_ESI], |
319 | f4beb510 | bellard | env->regs[R_EDI], |
320 | f4beb510 | bellard | env->regs[R_EBP]); |
321 | f4beb510 | bellard | break;
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322 | d2fd1af7 | bellard | #ifndef TARGET_ABI32
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323 | d2fd1af7 | bellard | case EXCP_SYSCALL:
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324 | d2fd1af7 | bellard | /* linux syscall from syscall intruction */
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325 | d2fd1af7 | bellard | env->regs[R_EAX] = do_syscall(env, |
326 | d2fd1af7 | bellard | env->regs[R_EAX], |
327 | d2fd1af7 | bellard | env->regs[R_EDI], |
328 | d2fd1af7 | bellard | env->regs[R_ESI], |
329 | d2fd1af7 | bellard | env->regs[R_EDX], |
330 | d2fd1af7 | bellard | env->regs[10],
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331 | d2fd1af7 | bellard | env->regs[8],
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332 | d2fd1af7 | bellard | env->regs[9]);
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333 | d2fd1af7 | bellard | env->eip = env->exception_next_eip; |
334 | d2fd1af7 | bellard | break;
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335 | d2fd1af7 | bellard | #endif
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336 | f4beb510 | bellard | case EXCP0B_NOSEG:
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337 | f4beb510 | bellard | case EXCP0C_STACK:
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338 | f4beb510 | bellard | info.si_signo = SIGBUS; |
339 | f4beb510 | bellard | info.si_errno = 0;
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340 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
341 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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342 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
343 | f4beb510 | bellard | break;
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344 | 1b6b029e | bellard | case EXCP0D_GPF:
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345 | d2fd1af7 | bellard | /* XXX: potential problem if ABI32 */
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346 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
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347 | 851e67a1 | bellard | if (env->eflags & VM_MASK) {
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348 | 89e957e7 | bellard | handle_vm86_fault(env); |
349 | 84409ddb | j_mayer | } else
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350 | 84409ddb | j_mayer | #endif
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351 | 84409ddb | j_mayer | { |
352 | f4beb510 | bellard | info.si_signo = SIGSEGV; |
353 | f4beb510 | bellard | info.si_errno = 0;
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354 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
355 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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356 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
357 | 1b6b029e | bellard | } |
358 | 1b6b029e | bellard | break;
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359 | b689bc57 | bellard | case EXCP0E_PAGE:
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360 | b689bc57 | bellard | info.si_signo = SIGSEGV; |
361 | b689bc57 | bellard | info.si_errno = 0;
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362 | b689bc57 | bellard | if (!(env->error_code & 1)) |
363 | b689bc57 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
364 | b689bc57 | bellard | else
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365 | b689bc57 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
366 | 970a87a6 | bellard | info._sifields._sigfault._addr = env->cr[2];
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367 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
368 | b689bc57 | bellard | break;
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369 | 9de5e440 | bellard | case EXCP00_DIVZ:
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370 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
|
371 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
|
372 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
373 | 84409ddb | j_mayer | } else
|
374 | 84409ddb | j_mayer | #endif
|
375 | 84409ddb | j_mayer | { |
376 | bc8a22cc | bellard | /* division by zero */
|
377 | bc8a22cc | bellard | info.si_signo = SIGFPE; |
378 | bc8a22cc | bellard | info.si_errno = 0;
|
379 | bc8a22cc | bellard | info.si_code = TARGET_FPE_INTDIV; |
380 | bc8a22cc | bellard | info._sifields._sigfault._addr = env->eip; |
381 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
382 | bc8a22cc | bellard | } |
383 | 9de5e440 | bellard | break;
|
384 | 01df040b | aliguori | case EXCP01_DB:
|
385 | 447db213 | bellard | case EXCP03_INT3:
|
386 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
|
387 | 447db213 | bellard | if (env->eflags & VM_MASK) {
|
388 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
389 | 84409ddb | j_mayer | } else
|
390 | 84409ddb | j_mayer | #endif
|
391 | 84409ddb | j_mayer | { |
392 | 447db213 | bellard | info.si_signo = SIGTRAP; |
393 | 447db213 | bellard | info.si_errno = 0;
|
394 | 01df040b | aliguori | if (trapnr == EXCP01_DB) {
|
395 | 447db213 | bellard | info.si_code = TARGET_TRAP_BRKPT; |
396 | 447db213 | bellard | info._sifields._sigfault._addr = env->eip; |
397 | 447db213 | bellard | } else {
|
398 | 447db213 | bellard | info.si_code = TARGET_SI_KERNEL; |
399 | 447db213 | bellard | info._sifields._sigfault._addr = 0;
|
400 | 447db213 | bellard | } |
401 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
402 | 447db213 | bellard | } |
403 | 447db213 | bellard | break;
|
404 | 9de5e440 | bellard | case EXCP04_INTO:
|
405 | 9de5e440 | bellard | case EXCP05_BOUND:
|
406 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
|
407 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
|
408 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
409 | 84409ddb | j_mayer | } else
|
410 | 84409ddb | j_mayer | #endif
|
411 | 84409ddb | j_mayer | { |
412 | bc8a22cc | bellard | info.si_signo = SIGSEGV; |
413 | bc8a22cc | bellard | info.si_errno = 0;
|
414 | b689bc57 | bellard | info.si_code = TARGET_SI_KERNEL; |
415 | bc8a22cc | bellard | info._sifields._sigfault._addr = 0;
|
416 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
417 | bc8a22cc | bellard | } |
418 | 9de5e440 | bellard | break;
|
419 | 9de5e440 | bellard | case EXCP06_ILLOP:
|
420 | 9de5e440 | bellard | info.si_signo = SIGILL; |
421 | 9de5e440 | bellard | info.si_errno = 0;
|
422 | 9de5e440 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
423 | 9de5e440 | bellard | info._sifields._sigfault._addr = env->eip; |
424 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
425 | 9de5e440 | bellard | break;
|
426 | 9de5e440 | bellard | case EXCP_INTERRUPT:
|
427 | 9de5e440 | bellard | /* just indicate that signals should be handled asap */
|
428 | 9de5e440 | bellard | break;
|
429 | 1fddef4b | bellard | case EXCP_DEBUG:
|
430 | 1fddef4b | bellard | { |
431 | 1fddef4b | bellard | int sig;
|
432 | 1fddef4b | bellard | |
433 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
434 | 1fddef4b | bellard | if (sig)
|
435 | 1fddef4b | bellard | { |
436 | 1fddef4b | bellard | info.si_signo = sig; |
437 | 1fddef4b | bellard | info.si_errno = 0;
|
438 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
439 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
440 | 1fddef4b | bellard | } |
441 | 1fddef4b | bellard | } |
442 | 1fddef4b | bellard | break;
|
443 | 1b6b029e | bellard | default:
|
444 | 970a87a6 | bellard | pc = env->segs[R_CS].base + env->eip; |
445 | 5fafdf24 | ths | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
|
446 | bc8a22cc | bellard | (long)pc, trapnr);
|
447 | 1b6b029e | bellard | abort(); |
448 | 1b6b029e | bellard | } |
449 | 66fb9763 | bellard | process_pending_signals(env); |
450 | 1b6b029e | bellard | } |
451 | 1b6b029e | bellard | } |
452 | b346ff46 | bellard | #endif
|
453 | b346ff46 | bellard | |
454 | b346ff46 | bellard | #ifdef TARGET_ARM
|
455 | b346ff46 | bellard | |
456 | 992f48a0 | blueswir1 | static void arm_cache_flush(abi_ulong start, abi_ulong last) |
457 | 6f1f31c0 | bellard | { |
458 | 992f48a0 | blueswir1 | abi_ulong addr, last1; |
459 | 6f1f31c0 | bellard | |
460 | 6f1f31c0 | bellard | if (last < start)
|
461 | 6f1f31c0 | bellard | return;
|
462 | 6f1f31c0 | bellard | addr = start; |
463 | 6f1f31c0 | bellard | for(;;) {
|
464 | 6f1f31c0 | bellard | last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
|
465 | 6f1f31c0 | bellard | if (last1 > last)
|
466 | 6f1f31c0 | bellard | last1 = last; |
467 | 6f1f31c0 | bellard | tb_invalidate_page_range(addr, last1 + 1);
|
468 | 6f1f31c0 | bellard | if (last1 == last)
|
469 | 6f1f31c0 | bellard | break;
|
470 | 6f1f31c0 | bellard | addr = last1 + 1;
|
471 | 6f1f31c0 | bellard | } |
472 | 6f1f31c0 | bellard | } |
473 | 6f1f31c0 | bellard | |
474 | fbb4a2e3 | pbrook | /* Handle a jump to the kernel code page. */
|
475 | fbb4a2e3 | pbrook | static int |
476 | fbb4a2e3 | pbrook | do_kernel_trap(CPUARMState *env) |
477 | fbb4a2e3 | pbrook | { |
478 | fbb4a2e3 | pbrook | uint32_t addr; |
479 | fbb4a2e3 | pbrook | uint32_t cpsr; |
480 | fbb4a2e3 | pbrook | uint32_t val; |
481 | fbb4a2e3 | pbrook | |
482 | fbb4a2e3 | pbrook | switch (env->regs[15]) { |
483 | fbb4a2e3 | pbrook | case 0xffff0fa0: /* __kernel_memory_barrier */ |
484 | fbb4a2e3 | pbrook | /* ??? No-op. Will need to do better for SMP. */
|
485 | fbb4a2e3 | pbrook | break;
|
486 | fbb4a2e3 | pbrook | case 0xffff0fc0: /* __kernel_cmpxchg */ |
487 | d5975363 | pbrook | /* XXX: This only works between threads, not between processes.
|
488 | d5975363 | pbrook | It's probably possible to implement this with native host
|
489 | d5975363 | pbrook | operations. However things like ldrex/strex are much harder so
|
490 | d5975363 | pbrook | there's not much point trying. */
|
491 | d5975363 | pbrook | start_exclusive(); |
492 | fbb4a2e3 | pbrook | cpsr = cpsr_read(env); |
493 | fbb4a2e3 | pbrook | addr = env->regs[2];
|
494 | fbb4a2e3 | pbrook | /* FIXME: This should SEGV if the access fails. */
|
495 | fbb4a2e3 | pbrook | if (get_user_u32(val, addr))
|
496 | fbb4a2e3 | pbrook | val = ~env->regs[0];
|
497 | fbb4a2e3 | pbrook | if (val == env->regs[0]) { |
498 | fbb4a2e3 | pbrook | val = env->regs[1];
|
499 | fbb4a2e3 | pbrook | /* FIXME: Check for segfaults. */
|
500 | fbb4a2e3 | pbrook | put_user_u32(val, addr); |
501 | fbb4a2e3 | pbrook | env->regs[0] = 0; |
502 | fbb4a2e3 | pbrook | cpsr |= CPSR_C; |
503 | fbb4a2e3 | pbrook | } else {
|
504 | fbb4a2e3 | pbrook | env->regs[0] = -1; |
505 | fbb4a2e3 | pbrook | cpsr &= ~CPSR_C; |
506 | fbb4a2e3 | pbrook | } |
507 | fbb4a2e3 | pbrook | cpsr_write(env, cpsr, CPSR_C); |
508 | d5975363 | pbrook | end_exclusive(); |
509 | fbb4a2e3 | pbrook | break;
|
510 | fbb4a2e3 | pbrook | case 0xffff0fe0: /* __kernel_get_tls */ |
511 | fbb4a2e3 | pbrook | env->regs[0] = env->cp15.c13_tls2;
|
512 | fbb4a2e3 | pbrook | break;
|
513 | fbb4a2e3 | pbrook | default:
|
514 | fbb4a2e3 | pbrook | return 1; |
515 | fbb4a2e3 | pbrook | } |
516 | fbb4a2e3 | pbrook | /* Jump back to the caller. */
|
517 | fbb4a2e3 | pbrook | addr = env->regs[14];
|
518 | fbb4a2e3 | pbrook | if (addr & 1) { |
519 | fbb4a2e3 | pbrook | env->thumb = 1;
|
520 | fbb4a2e3 | pbrook | addr &= ~1;
|
521 | fbb4a2e3 | pbrook | } |
522 | fbb4a2e3 | pbrook | env->regs[15] = addr;
|
523 | fbb4a2e3 | pbrook | |
524 | fbb4a2e3 | pbrook | return 0; |
525 | fbb4a2e3 | pbrook | } |
526 | fbb4a2e3 | pbrook | |
527 | 426f5abc | Paul Brook | static int do_strex(CPUARMState *env) |
528 | 426f5abc | Paul Brook | { |
529 | 426f5abc | Paul Brook | uint32_t val; |
530 | 426f5abc | Paul Brook | int size;
|
531 | 426f5abc | Paul Brook | int rc = 1; |
532 | 426f5abc | Paul Brook | int segv = 0; |
533 | 426f5abc | Paul Brook | uint32_t addr; |
534 | 426f5abc | Paul Brook | start_exclusive(); |
535 | 426f5abc | Paul Brook | addr = env->exclusive_addr; |
536 | 426f5abc | Paul Brook | if (addr != env->exclusive_test) {
|
537 | 426f5abc | Paul Brook | goto fail;
|
538 | 426f5abc | Paul Brook | } |
539 | 426f5abc | Paul Brook | size = env->exclusive_info & 0xf;
|
540 | 426f5abc | Paul Brook | switch (size) {
|
541 | 426f5abc | Paul Brook | case 0: |
542 | 426f5abc | Paul Brook | segv = get_user_u8(val, addr); |
543 | 426f5abc | Paul Brook | break;
|
544 | 426f5abc | Paul Brook | case 1: |
545 | 426f5abc | Paul Brook | segv = get_user_u16(val, addr); |
546 | 426f5abc | Paul Brook | break;
|
547 | 426f5abc | Paul Brook | case 2: |
548 | 426f5abc | Paul Brook | case 3: |
549 | 426f5abc | Paul Brook | segv = get_user_u32(val, addr); |
550 | 426f5abc | Paul Brook | break;
|
551 | f7001a3b | Aurelien Jarno | default:
|
552 | f7001a3b | Aurelien Jarno | abort(); |
553 | 426f5abc | Paul Brook | } |
554 | 426f5abc | Paul Brook | if (segv) {
|
555 | 426f5abc | Paul Brook | env->cp15.c6_data = addr; |
556 | 426f5abc | Paul Brook | goto done;
|
557 | 426f5abc | Paul Brook | } |
558 | 426f5abc | Paul Brook | if (val != env->exclusive_val) {
|
559 | 426f5abc | Paul Brook | goto fail;
|
560 | 426f5abc | Paul Brook | } |
561 | 426f5abc | Paul Brook | if (size == 3) { |
562 | 426f5abc | Paul Brook | segv = get_user_u32(val, addr + 4);
|
563 | 426f5abc | Paul Brook | if (segv) {
|
564 | 426f5abc | Paul Brook | env->cp15.c6_data = addr + 4;
|
565 | 426f5abc | Paul Brook | goto done;
|
566 | 426f5abc | Paul Brook | } |
567 | 426f5abc | Paul Brook | if (val != env->exclusive_high) {
|
568 | 426f5abc | Paul Brook | goto fail;
|
569 | 426f5abc | Paul Brook | } |
570 | 426f5abc | Paul Brook | } |
571 | 426f5abc | Paul Brook | val = env->regs[(env->exclusive_info >> 8) & 0xf]; |
572 | 426f5abc | Paul Brook | switch (size) {
|
573 | 426f5abc | Paul Brook | case 0: |
574 | 426f5abc | Paul Brook | segv = put_user_u8(val, addr); |
575 | 426f5abc | Paul Brook | break;
|
576 | 426f5abc | Paul Brook | case 1: |
577 | 426f5abc | Paul Brook | segv = put_user_u16(val, addr); |
578 | 426f5abc | Paul Brook | break;
|
579 | 426f5abc | Paul Brook | case 2: |
580 | 426f5abc | Paul Brook | case 3: |
581 | 426f5abc | Paul Brook | segv = put_user_u32(val, addr); |
582 | 426f5abc | Paul Brook | break;
|
583 | 426f5abc | Paul Brook | } |
584 | 426f5abc | Paul Brook | if (segv) {
|
585 | 426f5abc | Paul Brook | env->cp15.c6_data = addr; |
586 | 426f5abc | Paul Brook | goto done;
|
587 | 426f5abc | Paul Brook | } |
588 | 426f5abc | Paul Brook | if (size == 3) { |
589 | 426f5abc | Paul Brook | val = env->regs[(env->exclusive_info >> 12) & 0xf]; |
590 | 426f5abc | Paul Brook | segv = put_user_u32(val, addr); |
591 | 426f5abc | Paul Brook | if (segv) {
|
592 | 426f5abc | Paul Brook | env->cp15.c6_data = addr + 4;
|
593 | 426f5abc | Paul Brook | goto done;
|
594 | 426f5abc | Paul Brook | } |
595 | 426f5abc | Paul Brook | } |
596 | 426f5abc | Paul Brook | rc = 0;
|
597 | 426f5abc | Paul Brook | fail:
|
598 | 725b8a69 | Paul Brook | env->regs[15] += 4; |
599 | 426f5abc | Paul Brook | env->regs[(env->exclusive_info >> 4) & 0xf] = rc; |
600 | 426f5abc | Paul Brook | done:
|
601 | 426f5abc | Paul Brook | end_exclusive(); |
602 | 426f5abc | Paul Brook | return segv;
|
603 | 426f5abc | Paul Brook | } |
604 | 426f5abc | Paul Brook | |
605 | b346ff46 | bellard | void cpu_loop(CPUARMState *env)
|
606 | b346ff46 | bellard | { |
607 | b346ff46 | bellard | int trapnr;
|
608 | b346ff46 | bellard | unsigned int n, insn; |
609 | c227f099 | Anthony Liguori | target_siginfo_t info; |
610 | b5ff1b31 | bellard | uint32_t addr; |
611 | 3b46e624 | ths | |
612 | b346ff46 | bellard | for(;;) {
|
613 | d5975363 | pbrook | cpu_exec_start(env); |
614 | b346ff46 | bellard | trapnr = cpu_arm_exec(env); |
615 | d5975363 | pbrook | cpu_exec_end(env); |
616 | b346ff46 | bellard | switch(trapnr) {
|
617 | b346ff46 | bellard | case EXCP_UDEF:
|
618 | c6981055 | bellard | { |
619 | c6981055 | bellard | TaskState *ts = env->opaque; |
620 | c6981055 | bellard | uint32_t opcode; |
621 | 6d9a42be | aurel32 | int rc;
|
622 | c6981055 | bellard | |
623 | c6981055 | bellard | /* we handle the FPU emulation here, as Linux */
|
624 | c6981055 | bellard | /* we get the opcode */
|
625 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
626 | 2f619698 | bellard | get_user_u32(opcode, env->regs[15]);
|
627 | 3b46e624 | ths | |
628 | 6d9a42be | aurel32 | rc = EmulateAll(opcode, &ts->fpa, env); |
629 | 6d9a42be | aurel32 | if (rc == 0) { /* illegal instruction */ |
630 | c6981055 | bellard | info.si_signo = SIGILL; |
631 | c6981055 | bellard | info.si_errno = 0;
|
632 | c6981055 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
633 | c6981055 | bellard | info._sifields._sigfault._addr = env->regs[15];
|
634 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
635 | 6d9a42be | aurel32 | } else if (rc < 0) { /* FP exception */ |
636 | 6d9a42be | aurel32 | int arm_fpe=0; |
637 | 6d9a42be | aurel32 | |
638 | 6d9a42be | aurel32 | /* translate softfloat flags to FPSR flags */
|
639 | 6d9a42be | aurel32 | if (-rc & float_flag_invalid)
|
640 | 6d9a42be | aurel32 | arm_fpe |= BIT_IOC; |
641 | 6d9a42be | aurel32 | if (-rc & float_flag_divbyzero)
|
642 | 6d9a42be | aurel32 | arm_fpe |= BIT_DZC; |
643 | 6d9a42be | aurel32 | if (-rc & float_flag_overflow)
|
644 | 6d9a42be | aurel32 | arm_fpe |= BIT_OFC; |
645 | 6d9a42be | aurel32 | if (-rc & float_flag_underflow)
|
646 | 6d9a42be | aurel32 | arm_fpe |= BIT_UFC; |
647 | 6d9a42be | aurel32 | if (-rc & float_flag_inexact)
|
648 | 6d9a42be | aurel32 | arm_fpe |= BIT_IXC; |
649 | 6d9a42be | aurel32 | |
650 | 6d9a42be | aurel32 | FPSR fpsr = ts->fpa.fpsr; |
651 | 6d9a42be | aurel32 | //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
|
652 | 6d9a42be | aurel32 | |
653 | 6d9a42be | aurel32 | if (fpsr & (arm_fpe << 16)) { /* exception enabled? */ |
654 | 6d9a42be | aurel32 | info.si_signo = SIGFPE; |
655 | 6d9a42be | aurel32 | info.si_errno = 0;
|
656 | 6d9a42be | aurel32 | |
657 | 6d9a42be | aurel32 | /* ordered by priority, least first */
|
658 | 6d9a42be | aurel32 | if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
|
659 | 6d9a42be | aurel32 | if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
|
660 | 6d9a42be | aurel32 | if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
|
661 | 6d9a42be | aurel32 | if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
|
662 | 6d9a42be | aurel32 | if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
|
663 | 6d9a42be | aurel32 | |
664 | 6d9a42be | aurel32 | info._sifields._sigfault._addr = env->regs[15];
|
665 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
666 | 6d9a42be | aurel32 | } else {
|
667 | 6d9a42be | aurel32 | env->regs[15] += 4; |
668 | 6d9a42be | aurel32 | } |
669 | 6d9a42be | aurel32 | |
670 | 6d9a42be | aurel32 | /* accumulate unenabled exceptions */
|
671 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
|
672 | 6d9a42be | aurel32 | fpsr |= BIT_IXC; |
673 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
|
674 | 6d9a42be | aurel32 | fpsr |= BIT_UFC; |
675 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
|
676 | 6d9a42be | aurel32 | fpsr |= BIT_OFC; |
677 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
|
678 | 6d9a42be | aurel32 | fpsr |= BIT_DZC; |
679 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
|
680 | 6d9a42be | aurel32 | fpsr |= BIT_IOC; |
681 | 6d9a42be | aurel32 | ts->fpa.fpsr=fpsr; |
682 | 6d9a42be | aurel32 | } else { /* everything OK */ |
683 | c6981055 | bellard | /* increment PC */
|
684 | c6981055 | bellard | env->regs[15] += 4; |
685 | c6981055 | bellard | } |
686 | c6981055 | bellard | } |
687 | b346ff46 | bellard | break;
|
688 | b346ff46 | bellard | case EXCP_SWI:
|
689 | 06c949e6 | pbrook | case EXCP_BKPT:
|
690 | b346ff46 | bellard | { |
691 | ce4defa0 | pbrook | env->eabi = 1;
|
692 | b346ff46 | bellard | /* system call */
|
693 | 06c949e6 | pbrook | if (trapnr == EXCP_BKPT) {
|
694 | 06c949e6 | pbrook | if (env->thumb) {
|
695 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
696 | 2f619698 | bellard | get_user_u16(insn, env->regs[15]);
|
697 | 06c949e6 | pbrook | n = insn & 0xff;
|
698 | 06c949e6 | pbrook | env->regs[15] += 2; |
699 | 06c949e6 | pbrook | } else {
|
700 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
701 | 2f619698 | bellard | get_user_u32(insn, env->regs[15]);
|
702 | 06c949e6 | pbrook | n = (insn & 0xf) | ((insn >> 4) & 0xff0); |
703 | 06c949e6 | pbrook | env->regs[15] += 4; |
704 | 06c949e6 | pbrook | } |
705 | 192c7bd9 | bellard | } else {
|
706 | 06c949e6 | pbrook | if (env->thumb) {
|
707 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
708 | 2f619698 | bellard | get_user_u16(insn, env->regs[15] - 2); |
709 | 06c949e6 | pbrook | n = insn & 0xff;
|
710 | 06c949e6 | pbrook | } else {
|
711 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
712 | 2f619698 | bellard | get_user_u32(insn, env->regs[15] - 4); |
713 | 06c949e6 | pbrook | n = insn & 0xffffff;
|
714 | 06c949e6 | pbrook | } |
715 | 192c7bd9 | bellard | } |
716 | 192c7bd9 | bellard | |
717 | 6f1f31c0 | bellard | if (n == ARM_NR_cacheflush) {
|
718 | 6f1f31c0 | bellard | arm_cache_flush(env->regs[0], env->regs[1]); |
719 | a4f81979 | bellard | } else if (n == ARM_NR_semihosting |
720 | a4f81979 | bellard | || n == ARM_NR_thumb_semihosting) { |
721 | a4f81979 | bellard | env->regs[0] = do_arm_semihosting (env);
|
722 | ce4defa0 | pbrook | } else if (n == 0 || n >= ARM_SYSCALL_BASE |
723 | 192c7bd9 | bellard | || (env->thumb && n == ARM_THUMB_SYSCALL)) { |
724 | b346ff46 | bellard | /* linux syscall */
|
725 | ce4defa0 | pbrook | if (env->thumb || n == 0) { |
726 | 192c7bd9 | bellard | n = env->regs[7];
|
727 | 192c7bd9 | bellard | } else {
|
728 | 192c7bd9 | bellard | n -= ARM_SYSCALL_BASE; |
729 | ce4defa0 | pbrook | env->eabi = 0;
|
730 | 192c7bd9 | bellard | } |
731 | fbb4a2e3 | pbrook | if ( n > ARM_NR_BASE) {
|
732 | fbb4a2e3 | pbrook | switch (n) {
|
733 | fbb4a2e3 | pbrook | case ARM_NR_cacheflush:
|
734 | fbb4a2e3 | pbrook | arm_cache_flush(env->regs[0], env->regs[1]); |
735 | fbb4a2e3 | pbrook | break;
|
736 | fbb4a2e3 | pbrook | case ARM_NR_set_tls:
|
737 | fbb4a2e3 | pbrook | cpu_set_tls(env, env->regs[0]);
|
738 | fbb4a2e3 | pbrook | env->regs[0] = 0; |
739 | fbb4a2e3 | pbrook | break;
|
740 | fbb4a2e3 | pbrook | default:
|
741 | fbb4a2e3 | pbrook | gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
|
742 | fbb4a2e3 | pbrook | n); |
743 | fbb4a2e3 | pbrook | env->regs[0] = -TARGET_ENOSYS;
|
744 | fbb4a2e3 | pbrook | break;
|
745 | fbb4a2e3 | pbrook | } |
746 | fbb4a2e3 | pbrook | } else {
|
747 | fbb4a2e3 | pbrook | env->regs[0] = do_syscall(env,
|
748 | fbb4a2e3 | pbrook | n, |
749 | fbb4a2e3 | pbrook | env->regs[0],
|
750 | fbb4a2e3 | pbrook | env->regs[1],
|
751 | fbb4a2e3 | pbrook | env->regs[2],
|
752 | fbb4a2e3 | pbrook | env->regs[3],
|
753 | fbb4a2e3 | pbrook | env->regs[4],
|
754 | fbb4a2e3 | pbrook | env->regs[5]);
|
755 | fbb4a2e3 | pbrook | } |
756 | b346ff46 | bellard | } else {
|
757 | b346ff46 | bellard | goto error;
|
758 | b346ff46 | bellard | } |
759 | b346ff46 | bellard | } |
760 | b346ff46 | bellard | break;
|
761 | 43fff238 | bellard | case EXCP_INTERRUPT:
|
762 | 43fff238 | bellard | /* just indicate that signals should be handled asap */
|
763 | 43fff238 | bellard | break;
|
764 | 68016c62 | bellard | case EXCP_PREFETCH_ABORT:
|
765 | eae473c1 | balrog | addr = env->cp15.c6_insn; |
766 | b5ff1b31 | bellard | goto do_segv;
|
767 | 68016c62 | bellard | case EXCP_DATA_ABORT:
|
768 | eae473c1 | balrog | addr = env->cp15.c6_data; |
769 | b5ff1b31 | bellard | goto do_segv;
|
770 | b5ff1b31 | bellard | do_segv:
|
771 | 68016c62 | bellard | { |
772 | 68016c62 | bellard | info.si_signo = SIGSEGV; |
773 | 68016c62 | bellard | info.si_errno = 0;
|
774 | 68016c62 | bellard | /* XXX: check env->error_code */
|
775 | 68016c62 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
776 | b5ff1b31 | bellard | info._sifields._sigfault._addr = addr; |
777 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
778 | 68016c62 | bellard | } |
779 | 68016c62 | bellard | break;
|
780 | 1fddef4b | bellard | case EXCP_DEBUG:
|
781 | 1fddef4b | bellard | { |
782 | 1fddef4b | bellard | int sig;
|
783 | 1fddef4b | bellard | |
784 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
785 | 1fddef4b | bellard | if (sig)
|
786 | 1fddef4b | bellard | { |
787 | 1fddef4b | bellard | info.si_signo = sig; |
788 | 1fddef4b | bellard | info.si_errno = 0;
|
789 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
790 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
791 | 1fddef4b | bellard | } |
792 | 1fddef4b | bellard | } |
793 | 1fddef4b | bellard | break;
|
794 | fbb4a2e3 | pbrook | case EXCP_KERNEL_TRAP:
|
795 | fbb4a2e3 | pbrook | if (do_kernel_trap(env))
|
796 | fbb4a2e3 | pbrook | goto error;
|
797 | fbb4a2e3 | pbrook | break;
|
798 | 426f5abc | Paul Brook | case EXCP_STREX:
|
799 | 426f5abc | Paul Brook | if (do_strex(env)) {
|
800 | 426f5abc | Paul Brook | addr = env->cp15.c6_data; |
801 | 426f5abc | Paul Brook | goto do_segv;
|
802 | 426f5abc | Paul Brook | } |
803 | e9273455 | Paul Brook | break;
|
804 | b346ff46 | bellard | default:
|
805 | b346ff46 | bellard | error:
|
806 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
807 | b346ff46 | bellard | trapnr); |
808 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
809 | b346ff46 | bellard | abort(); |
810 | b346ff46 | bellard | } |
811 | b346ff46 | bellard | process_pending_signals(env); |
812 | b346ff46 | bellard | } |
813 | b346ff46 | bellard | } |
814 | b346ff46 | bellard | |
815 | b346ff46 | bellard | #endif
|
816 | 1b6b029e | bellard | |
817 | 93ac68bc | bellard | #ifdef TARGET_SPARC
|
818 | ed23fbd9 | blueswir1 | #define SPARC64_STACK_BIAS 2047 |
819 | 93ac68bc | bellard | |
820 | 060366c5 | bellard | //#define DEBUG_WIN
|
821 | 060366c5 | bellard | |
822 | 2623cbaf | bellard | /* WARNING: dealing with register windows _is_ complicated. More info
|
823 | 2623cbaf | bellard | can be found at http://www.sics.se/~psm/sparcstack.html */
|
824 | 060366c5 | bellard | static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
825 | 060366c5 | bellard | { |
826 | 1a14026e | blueswir1 | index = (index + cwp * 16) % (16 * env->nwindows); |
827 | 060366c5 | bellard | /* wrap handling : if cwp is on the last window, then we use the
|
828 | 060366c5 | bellard | registers 'after' the end */
|
829 | 1a14026e | blueswir1 | if (index < 8 && env->cwp == env->nwindows - 1) |
830 | 1a14026e | blueswir1 | index += 16 * env->nwindows;
|
831 | 060366c5 | bellard | return index;
|
832 | 060366c5 | bellard | } |
833 | 060366c5 | bellard | |
834 | 2623cbaf | bellard | /* save the register window 'cwp1' */
|
835 | 2623cbaf | bellard | static inline void save_window_offset(CPUSPARCState *env, int cwp1) |
836 | 060366c5 | bellard | { |
837 | 2623cbaf | bellard | unsigned int i; |
838 | 992f48a0 | blueswir1 | abi_ulong sp_ptr; |
839 | 3b46e624 | ths | |
840 | 53a5960a | pbrook | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
841 | ed23fbd9 | blueswir1 | #ifdef TARGET_SPARC64
|
842 | ed23fbd9 | blueswir1 | if (sp_ptr & 3) |
843 | ed23fbd9 | blueswir1 | sp_ptr += SPARC64_STACK_BIAS; |
844 | ed23fbd9 | blueswir1 | #endif
|
845 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
846 | 2daf0284 | blueswir1 | printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n", |
847 | 2daf0284 | blueswir1 | sp_ptr, cwp1); |
848 | 060366c5 | bellard | #endif
|
849 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
850 | 2f619698 | bellard | /* FIXME - what to do if put_user() fails? */
|
851 | 2f619698 | bellard | put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
|
852 | 992f48a0 | blueswir1 | sp_ptr += sizeof(abi_ulong);
|
853 | 2623cbaf | bellard | } |
854 | 060366c5 | bellard | } |
855 | 060366c5 | bellard | |
856 | 060366c5 | bellard | static void save_window(CPUSPARCState *env) |
857 | 060366c5 | bellard | { |
858 | 5ef54116 | bellard | #ifndef TARGET_SPARC64
|
859 | 2623cbaf | bellard | unsigned int new_wim; |
860 | 1a14026e | blueswir1 | new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) & |
861 | 1a14026e | blueswir1 | ((1LL << env->nwindows) - 1); |
862 | 1a14026e | blueswir1 | save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
|
863 | 2623cbaf | bellard | env->wim = new_wim; |
864 | 5ef54116 | bellard | #else
|
865 | 1a14026e | blueswir1 | save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
|
866 | 5ef54116 | bellard | env->cansave++; |
867 | 5ef54116 | bellard | env->canrestore--; |
868 | 5ef54116 | bellard | #endif
|
869 | 060366c5 | bellard | } |
870 | 060366c5 | bellard | |
871 | 060366c5 | bellard | static void restore_window(CPUSPARCState *env) |
872 | 060366c5 | bellard | { |
873 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
874 | eda52953 | blueswir1 | unsigned int new_wim; |
875 | eda52953 | blueswir1 | #endif
|
876 | eda52953 | blueswir1 | unsigned int i, cwp1; |
877 | 992f48a0 | blueswir1 | abi_ulong sp_ptr; |
878 | 3b46e624 | ths | |
879 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
880 | 1a14026e | blueswir1 | new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) & |
881 | 1a14026e | blueswir1 | ((1LL << env->nwindows) - 1); |
882 | eda52953 | blueswir1 | #endif
|
883 | 3b46e624 | ths | |
884 | 060366c5 | bellard | /* restore the invalid window */
|
885 | 1a14026e | blueswir1 | cwp1 = cpu_cwp_inc(env, env->cwp + 1);
|
886 | 53a5960a | pbrook | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
887 | ed23fbd9 | blueswir1 | #ifdef TARGET_SPARC64
|
888 | ed23fbd9 | blueswir1 | if (sp_ptr & 3) |
889 | ed23fbd9 | blueswir1 | sp_ptr += SPARC64_STACK_BIAS; |
890 | ed23fbd9 | blueswir1 | #endif
|
891 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
892 | 2daf0284 | blueswir1 | printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n", |
893 | 2daf0284 | blueswir1 | sp_ptr, cwp1); |
894 | 060366c5 | bellard | #endif
|
895 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
896 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
897 | 2f619698 | bellard | get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
|
898 | 992f48a0 | blueswir1 | sp_ptr += sizeof(abi_ulong);
|
899 | 2623cbaf | bellard | } |
900 | 5ef54116 | bellard | #ifdef TARGET_SPARC64
|
901 | 5ef54116 | bellard | env->canrestore++; |
902 | 1a14026e | blueswir1 | if (env->cleanwin < env->nwindows - 1) |
903 | 1a14026e | blueswir1 | env->cleanwin++; |
904 | 5ef54116 | bellard | env->cansave--; |
905 | eda52953 | blueswir1 | #else
|
906 | eda52953 | blueswir1 | env->wim = new_wim; |
907 | 5ef54116 | bellard | #endif
|
908 | 060366c5 | bellard | } |
909 | 060366c5 | bellard | |
910 | 060366c5 | bellard | static void flush_windows(CPUSPARCState *env) |
911 | 060366c5 | bellard | { |
912 | 060366c5 | bellard | int offset, cwp1;
|
913 | 2623cbaf | bellard | |
914 | 2623cbaf | bellard | offset = 1;
|
915 | 060366c5 | bellard | for(;;) {
|
916 | 060366c5 | bellard | /* if restore would invoke restore_window(), then we can stop */
|
917 | 1a14026e | blueswir1 | cwp1 = cpu_cwp_inc(env, env->cwp + offset); |
918 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
919 | 060366c5 | bellard | if (env->wim & (1 << cwp1)) |
920 | 060366c5 | bellard | break;
|
921 | eda52953 | blueswir1 | #else
|
922 | eda52953 | blueswir1 | if (env->canrestore == 0) |
923 | eda52953 | blueswir1 | break;
|
924 | eda52953 | blueswir1 | env->cansave++; |
925 | eda52953 | blueswir1 | env->canrestore--; |
926 | eda52953 | blueswir1 | #endif
|
927 | 2623cbaf | bellard | save_window_offset(env, cwp1); |
928 | 060366c5 | bellard | offset++; |
929 | 060366c5 | bellard | } |
930 | 1a14026e | blueswir1 | cwp1 = cpu_cwp_inc(env, env->cwp + 1);
|
931 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
932 | eda52953 | blueswir1 | /* set wim so that restore will reload the registers */
|
933 | 2623cbaf | bellard | env->wim = 1 << cwp1;
|
934 | eda52953 | blueswir1 | #endif
|
935 | 2623cbaf | bellard | #if defined(DEBUG_WIN)
|
936 | 2623cbaf | bellard | printf("flush_windows: nb=%d\n", offset - 1); |
937 | 80a9d035 | bellard | #endif
|
938 | 2623cbaf | bellard | } |
939 | 060366c5 | bellard | |
940 | 93ac68bc | bellard | void cpu_loop (CPUSPARCState *env)
|
941 | 93ac68bc | bellard | { |
942 | 060366c5 | bellard | int trapnr, ret;
|
943 | c227f099 | Anthony Liguori | target_siginfo_t info; |
944 | 3b46e624 | ths | |
945 | 060366c5 | bellard | while (1) { |
946 | 060366c5 | bellard | trapnr = cpu_sparc_exec (env); |
947 | 3b46e624 | ths | |
948 | 060366c5 | bellard | switch (trapnr) {
|
949 | 5ef54116 | bellard | #ifndef TARGET_SPARC64
|
950 | 5fafdf24 | ths | case 0x88: |
951 | 060366c5 | bellard | case 0x90: |
952 | 5ef54116 | bellard | #else
|
953 | cb33da57 | blueswir1 | case 0x110: |
954 | 5ef54116 | bellard | case 0x16d: |
955 | 5ef54116 | bellard | #endif
|
956 | 060366c5 | bellard | ret = do_syscall (env, env->gregs[1],
|
957 | 5fafdf24 | ths | env->regwptr[0], env->regwptr[1], |
958 | 5fafdf24 | ths | env->regwptr[2], env->regwptr[3], |
959 | 060366c5 | bellard | env->regwptr[4], env->regwptr[5]); |
960 | 060366c5 | bellard | if ((unsigned int)ret >= (unsigned int)(-515)) { |
961 | 992f48a0 | blueswir1 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
962 | 27908725 | bellard | env->xcc |= PSR_CARRY; |
963 | 27908725 | bellard | #else
|
964 | 060366c5 | bellard | env->psr |= PSR_CARRY; |
965 | 27908725 | bellard | #endif
|
966 | 060366c5 | bellard | ret = -ret; |
967 | 060366c5 | bellard | } else {
|
968 | 992f48a0 | blueswir1 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
969 | 27908725 | bellard | env->xcc &= ~PSR_CARRY; |
970 | 27908725 | bellard | #else
|
971 | 060366c5 | bellard | env->psr &= ~PSR_CARRY; |
972 | 27908725 | bellard | #endif
|
973 | 060366c5 | bellard | } |
974 | 060366c5 | bellard | env->regwptr[0] = ret;
|
975 | 060366c5 | bellard | /* next instruction */
|
976 | 060366c5 | bellard | env->pc = env->npc; |
977 | 060366c5 | bellard | env->npc = env->npc + 4;
|
978 | 060366c5 | bellard | break;
|
979 | 060366c5 | bellard | case 0x83: /* flush windows */ |
980 | 992f48a0 | blueswir1 | #ifdef TARGET_ABI32
|
981 | 992f48a0 | blueswir1 | case 0x103: |
982 | 992f48a0 | blueswir1 | #endif
|
983 | 2623cbaf | bellard | flush_windows(env); |
984 | 060366c5 | bellard | /* next instruction */
|
985 | 060366c5 | bellard | env->pc = env->npc; |
986 | 060366c5 | bellard | env->npc = env->npc + 4;
|
987 | 060366c5 | bellard | break;
|
988 | 3475187d | bellard | #ifndef TARGET_SPARC64
|
989 | 060366c5 | bellard | case TT_WIN_OVF: /* window overflow */ |
990 | 060366c5 | bellard | save_window(env); |
991 | 060366c5 | bellard | break;
|
992 | 060366c5 | bellard | case TT_WIN_UNF: /* window underflow */ |
993 | 060366c5 | bellard | restore_window(env); |
994 | 060366c5 | bellard | break;
|
995 | 61ff6f58 | bellard | case TT_TFAULT:
|
996 | 61ff6f58 | bellard | case TT_DFAULT:
|
997 | 61ff6f58 | bellard | { |
998 | 61ff6f58 | bellard | info.si_signo = SIGSEGV; |
999 | 61ff6f58 | bellard | info.si_errno = 0;
|
1000 | 61ff6f58 | bellard | /* XXX: check env->error_code */
|
1001 | 61ff6f58 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1002 | 61ff6f58 | bellard | info._sifields._sigfault._addr = env->mmuregs[4];
|
1003 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1004 | 61ff6f58 | bellard | } |
1005 | 61ff6f58 | bellard | break;
|
1006 | 3475187d | bellard | #else
|
1007 | 5ef54116 | bellard | case TT_SPILL: /* window overflow */ |
1008 | 5ef54116 | bellard | save_window(env); |
1009 | 5ef54116 | bellard | break;
|
1010 | 5ef54116 | bellard | case TT_FILL: /* window underflow */ |
1011 | 5ef54116 | bellard | restore_window(env); |
1012 | 5ef54116 | bellard | break;
|
1013 | 7f84a729 | blueswir1 | case TT_TFAULT:
|
1014 | 7f84a729 | blueswir1 | case TT_DFAULT:
|
1015 | 7f84a729 | blueswir1 | { |
1016 | 7f84a729 | blueswir1 | info.si_signo = SIGSEGV; |
1017 | 7f84a729 | blueswir1 | info.si_errno = 0;
|
1018 | 7f84a729 | blueswir1 | /* XXX: check env->error_code */
|
1019 | 7f84a729 | blueswir1 | info.si_code = TARGET_SEGV_MAPERR; |
1020 | 7f84a729 | blueswir1 | if (trapnr == TT_DFAULT)
|
1021 | 7f84a729 | blueswir1 | info._sifields._sigfault._addr = env->dmmuregs[4];
|
1022 | 7f84a729 | blueswir1 | else
|
1023 | 8194f35a | Igor Kovalenko | info._sifields._sigfault._addr = cpu_tsptr(env)->tpc; |
1024 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1025 | 7f84a729 | blueswir1 | } |
1026 | 7f84a729 | blueswir1 | break;
|
1027 | 27524dc3 | bellard | #ifndef TARGET_ABI32
|
1028 | 5bfb56b2 | blueswir1 | case 0x16e: |
1029 | 5bfb56b2 | blueswir1 | flush_windows(env); |
1030 | 5bfb56b2 | blueswir1 | sparc64_get_context(env); |
1031 | 5bfb56b2 | blueswir1 | break;
|
1032 | 5bfb56b2 | blueswir1 | case 0x16f: |
1033 | 5bfb56b2 | blueswir1 | flush_windows(env); |
1034 | 5bfb56b2 | blueswir1 | sparc64_set_context(env); |
1035 | 5bfb56b2 | blueswir1 | break;
|
1036 | 3475187d | bellard | #endif
|
1037 | 27524dc3 | bellard | #endif
|
1038 | 48dc41eb | bellard | case EXCP_INTERRUPT:
|
1039 | 48dc41eb | bellard | /* just indicate that signals should be handled asap */
|
1040 | 48dc41eb | bellard | break;
|
1041 | 1fddef4b | bellard | case EXCP_DEBUG:
|
1042 | 1fddef4b | bellard | { |
1043 | 1fddef4b | bellard | int sig;
|
1044 | 1fddef4b | bellard | |
1045 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1046 | 1fddef4b | bellard | if (sig)
|
1047 | 1fddef4b | bellard | { |
1048 | 1fddef4b | bellard | info.si_signo = sig; |
1049 | 1fddef4b | bellard | info.si_errno = 0;
|
1050 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
1051 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1052 | 1fddef4b | bellard | } |
1053 | 1fddef4b | bellard | } |
1054 | 1fddef4b | bellard | break;
|
1055 | 060366c5 | bellard | default:
|
1056 | 060366c5 | bellard | printf ("Unhandled trap: 0x%x\n", trapnr);
|
1057 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
1058 | 060366c5 | bellard | exit (1);
|
1059 | 060366c5 | bellard | } |
1060 | 060366c5 | bellard | process_pending_signals (env); |
1061 | 060366c5 | bellard | } |
1062 | 93ac68bc | bellard | } |
1063 | 93ac68bc | bellard | |
1064 | 93ac68bc | bellard | #endif
|
1065 | 93ac68bc | bellard | |
1066 | 67867308 | bellard | #ifdef TARGET_PPC
|
1067 | 9fddaa0c | bellard | static inline uint64_t cpu_ppc_get_tb (CPUState *env) |
1068 | 9fddaa0c | bellard | { |
1069 | 9fddaa0c | bellard | /* TO FIX */
|
1070 | 9fddaa0c | bellard | return 0; |
1071 | 9fddaa0c | bellard | } |
1072 | 3b46e624 | ths | |
1073 | e3ea6529 | Alexander Graf | uint64_t cpu_ppc_load_tbl (CPUState *env) |
1074 | 9fddaa0c | bellard | { |
1075 | e3ea6529 | Alexander Graf | return cpu_ppc_get_tb(env);
|
1076 | 9fddaa0c | bellard | } |
1077 | 3b46e624 | ths | |
1078 | 9fddaa0c | bellard | uint32_t cpu_ppc_load_tbu (CPUState *env) |
1079 | 9fddaa0c | bellard | { |
1080 | 9fddaa0c | bellard | return cpu_ppc_get_tb(env) >> 32; |
1081 | 9fddaa0c | bellard | } |
1082 | 3b46e624 | ths | |
1083 | b711de95 | Aurelien Jarno | uint64_t cpu_ppc_load_atbl (CPUState *env) |
1084 | 9fddaa0c | bellard | { |
1085 | b711de95 | Aurelien Jarno | return cpu_ppc_get_tb(env);
|
1086 | 9fddaa0c | bellard | } |
1087 | 5fafdf24 | ths | |
1088 | a062e36c | j_mayer | uint32_t cpu_ppc_load_atbu (CPUState *env) |
1089 | 9fddaa0c | bellard | { |
1090 | a062e36c | j_mayer | return cpu_ppc_get_tb(env) >> 32; |
1091 | 9fddaa0c | bellard | } |
1092 | 76a66253 | j_mayer | |
1093 | 76a66253 | j_mayer | uint32_t cpu_ppc601_load_rtcu (CPUState *env) |
1094 | 76a66253 | j_mayer | __attribute__ (( alias ("cpu_ppc_load_tbu") ));
|
1095 | 76a66253 | j_mayer | |
1096 | 76a66253 | j_mayer | uint32_t cpu_ppc601_load_rtcl (CPUState *env) |
1097 | 9fddaa0c | bellard | { |
1098 | 76a66253 | j_mayer | return cpu_ppc_load_tbl(env) & 0x3FFFFF80; |
1099 | 9fddaa0c | bellard | } |
1100 | 76a66253 | j_mayer | |
1101 | a750fc0b | j_mayer | /* XXX: to be fixed */
|
1102 | 73b01960 | Alexander Graf | int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp) |
1103 | a750fc0b | j_mayer | { |
1104 | a750fc0b | j_mayer | return -1; |
1105 | a750fc0b | j_mayer | } |
1106 | a750fc0b | j_mayer | |
1107 | 73b01960 | Alexander Graf | int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val) |
1108 | a750fc0b | j_mayer | { |
1109 | a750fc0b | j_mayer | return -1; |
1110 | a750fc0b | j_mayer | } |
1111 | a750fc0b | j_mayer | |
1112 | 001faf32 | Blue Swirl | #define EXCP_DUMP(env, fmt, ...) \
|
1113 | 001faf32 | Blue Swirl | do { \
|
1114 | 001faf32 | Blue Swirl | fprintf(stderr, fmt , ## __VA_ARGS__); \ |
1115 | 001faf32 | Blue Swirl | cpu_dump_state(env, stderr, fprintf, 0); \
|
1116 | 001faf32 | Blue Swirl | qemu_log(fmt, ## __VA_ARGS__); \ |
1117 | 430c7ec7 | malc | if (logfile) \
|
1118 | 430c7ec7 | malc | log_cpu_state(env, 0); \
|
1119 | e1833e1f | j_mayer | } while (0) |
1120 | e1833e1f | j_mayer | |
1121 | 56f066bb | Nathan Froyd | static int do_store_exclusive(CPUPPCState *env) |
1122 | 56f066bb | Nathan Froyd | { |
1123 | 56f066bb | Nathan Froyd | target_ulong addr; |
1124 | 56f066bb | Nathan Froyd | target_ulong page_addr; |
1125 | 56f066bb | Nathan Froyd | target_ulong val; |
1126 | 56f066bb | Nathan Froyd | int flags;
|
1127 | 56f066bb | Nathan Froyd | int segv = 0; |
1128 | 56f066bb | Nathan Froyd | |
1129 | 56f066bb | Nathan Froyd | addr = env->reserve_ea; |
1130 | 56f066bb | Nathan Froyd | page_addr = addr & TARGET_PAGE_MASK; |
1131 | 56f066bb | Nathan Froyd | start_exclusive(); |
1132 | 56f066bb | Nathan Froyd | mmap_lock(); |
1133 | 56f066bb | Nathan Froyd | flags = page_get_flags(page_addr); |
1134 | 56f066bb | Nathan Froyd | if ((flags & PAGE_READ) == 0) { |
1135 | 56f066bb | Nathan Froyd | segv = 1;
|
1136 | 56f066bb | Nathan Froyd | } else {
|
1137 | 56f066bb | Nathan Froyd | int reg = env->reserve_info & 0x1f; |
1138 | 56f066bb | Nathan Froyd | int size = (env->reserve_info >> 5) & 0xf; |
1139 | 56f066bb | Nathan Froyd | int stored = 0; |
1140 | 56f066bb | Nathan Froyd | |
1141 | 56f066bb | Nathan Froyd | if (addr == env->reserve_addr) {
|
1142 | 56f066bb | Nathan Froyd | switch (size) {
|
1143 | 56f066bb | Nathan Froyd | case 1: segv = get_user_u8(val, addr); break; |
1144 | 56f066bb | Nathan Froyd | case 2: segv = get_user_u16(val, addr); break; |
1145 | 56f066bb | Nathan Froyd | case 4: segv = get_user_u32(val, addr); break; |
1146 | 56f066bb | Nathan Froyd | #if defined(TARGET_PPC64)
|
1147 | 56f066bb | Nathan Froyd | case 8: segv = get_user_u64(val, addr); break; |
1148 | 56f066bb | Nathan Froyd | #endif
|
1149 | 56f066bb | Nathan Froyd | default: abort();
|
1150 | 56f066bb | Nathan Froyd | } |
1151 | 56f066bb | Nathan Froyd | if (!segv && val == env->reserve_val) {
|
1152 | 56f066bb | Nathan Froyd | val = env->gpr[reg]; |
1153 | 56f066bb | Nathan Froyd | switch (size) {
|
1154 | 56f066bb | Nathan Froyd | case 1: segv = put_user_u8(val, addr); break; |
1155 | 56f066bb | Nathan Froyd | case 2: segv = put_user_u16(val, addr); break; |
1156 | 56f066bb | Nathan Froyd | case 4: segv = put_user_u32(val, addr); break; |
1157 | 56f066bb | Nathan Froyd | #if defined(TARGET_PPC64)
|
1158 | 56f066bb | Nathan Froyd | case 8: segv = put_user_u64(val, addr); break; |
1159 | 56f066bb | Nathan Froyd | #endif
|
1160 | 56f066bb | Nathan Froyd | default: abort();
|
1161 | 56f066bb | Nathan Froyd | } |
1162 | 56f066bb | Nathan Froyd | if (!segv) {
|
1163 | 56f066bb | Nathan Froyd | stored = 1;
|
1164 | 56f066bb | Nathan Froyd | } |
1165 | 56f066bb | Nathan Froyd | } |
1166 | 56f066bb | Nathan Froyd | } |
1167 | 56f066bb | Nathan Froyd | env->crf[0] = (stored << 1) | xer_so; |
1168 | 56f066bb | Nathan Froyd | env->reserve_addr = (target_ulong)-1;
|
1169 | 56f066bb | Nathan Froyd | } |
1170 | 56f066bb | Nathan Froyd | if (!segv) {
|
1171 | 56f066bb | Nathan Froyd | env->nip += 4;
|
1172 | 56f066bb | Nathan Froyd | } |
1173 | 56f066bb | Nathan Froyd | mmap_unlock(); |
1174 | 56f066bb | Nathan Froyd | end_exclusive(); |
1175 | 56f066bb | Nathan Froyd | return segv;
|
1176 | 56f066bb | Nathan Froyd | } |
1177 | 56f066bb | Nathan Froyd | |
1178 | 67867308 | bellard | void cpu_loop(CPUPPCState *env)
|
1179 | 67867308 | bellard | { |
1180 | c227f099 | Anthony Liguori | target_siginfo_t info; |
1181 | 61190b14 | bellard | int trapnr;
|
1182 | 61190b14 | bellard | uint32_t ret; |
1183 | 3b46e624 | ths | |
1184 | 67867308 | bellard | for(;;) {
|
1185 | 56f066bb | Nathan Froyd | cpu_exec_start(env); |
1186 | 67867308 | bellard | trapnr = cpu_ppc_exec(env); |
1187 | 56f066bb | Nathan Froyd | cpu_exec_end(env); |
1188 | 67867308 | bellard | switch(trapnr) {
|
1189 | e1833e1f | j_mayer | case POWERPC_EXCP_NONE:
|
1190 | e1833e1f | j_mayer | /* Just go on */
|
1191 | 67867308 | bellard | break;
|
1192 | e1833e1f | j_mayer | case POWERPC_EXCP_CRITICAL: /* Critical input */ |
1193 | e1833e1f | j_mayer | cpu_abort(env, "Critical interrupt while in user mode. "
|
1194 | e1833e1f | j_mayer | "Aborting\n");
|
1195 | 61190b14 | bellard | break;
|
1196 | e1833e1f | j_mayer | case POWERPC_EXCP_MCHECK: /* Machine check exception */ |
1197 | e1833e1f | j_mayer | cpu_abort(env, "Machine check exception while in user mode. "
|
1198 | e1833e1f | j_mayer | "Aborting\n");
|
1199 | e1833e1f | j_mayer | break;
|
1200 | e1833e1f | j_mayer | case POWERPC_EXCP_DSI: /* Data storage exception */ |
1201 | 90e189ec | Blue Swirl | EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n", |
1202 | e1833e1f | j_mayer | env->spr[SPR_DAR]); |
1203 | e1833e1f | j_mayer | /* XXX: check this. Seems bugged */
|
1204 | 2be0071f | bellard | switch (env->error_code & 0xFF000000) { |
1205 | 2be0071f | bellard | case 0x40000000: |
1206 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1207 | 61190b14 | bellard | info.si_errno = 0;
|
1208 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1209 | 61190b14 | bellard | break;
|
1210 | 2be0071f | bellard | case 0x04000000: |
1211 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1212 | 61190b14 | bellard | info.si_errno = 0;
|
1213 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
1214 | 61190b14 | bellard | break;
|
1215 | 2be0071f | bellard | case 0x08000000: |
1216 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1217 | 61190b14 | bellard | info.si_errno = 0;
|
1218 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
1219 | 61190b14 | bellard | break;
|
1220 | 61190b14 | bellard | default:
|
1221 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
1222 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
1223 | e1833e1f | j_mayer | env->error_code); |
1224 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1225 | 61190b14 | bellard | info.si_errno = 0;
|
1226 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1227 | 61190b14 | bellard | break;
|
1228 | 61190b14 | bellard | } |
1229 | 67867308 | bellard | info._sifields._sigfault._addr = env->nip; |
1230 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1231 | 67867308 | bellard | break;
|
1232 | e1833e1f | j_mayer | case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
1233 | 90e189ec | Blue Swirl | EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
|
1234 | 90e189ec | Blue Swirl | "\n", env->spr[SPR_SRR0]);
|
1235 | e1833e1f | j_mayer | /* XXX: check this */
|
1236 | 2be0071f | bellard | switch (env->error_code & 0xFF000000) { |
1237 | 2be0071f | bellard | case 0x40000000: |
1238 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1239 | 67867308 | bellard | info.si_errno = 0;
|
1240 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1241 | 61190b14 | bellard | break;
|
1242 | 2be0071f | bellard | case 0x10000000: |
1243 | 2be0071f | bellard | case 0x08000000: |
1244 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1245 | 61190b14 | bellard | info.si_errno = 0;
|
1246 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
1247 | 61190b14 | bellard | break;
|
1248 | 61190b14 | bellard | default:
|
1249 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
1250 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
1251 | e1833e1f | j_mayer | env->error_code); |
1252 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1253 | 61190b14 | bellard | info.si_errno = 0;
|
1254 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1255 | 61190b14 | bellard | break;
|
1256 | 61190b14 | bellard | } |
1257 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1258 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1259 | 67867308 | bellard | break;
|
1260 | e1833e1f | j_mayer | case POWERPC_EXCP_EXTERNAL: /* External input */ |
1261 | e1833e1f | j_mayer | cpu_abort(env, "External interrupt while in user mode. "
|
1262 | e1833e1f | j_mayer | "Aborting\n");
|
1263 | e1833e1f | j_mayer | break;
|
1264 | e1833e1f | j_mayer | case POWERPC_EXCP_ALIGN: /* Alignment exception */ |
1265 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unaligned memory access\n");
|
1266 | e1833e1f | j_mayer | /* XXX: check this */
|
1267 | 61190b14 | bellard | info.si_signo = TARGET_SIGBUS; |
1268 | 67867308 | bellard | info.si_errno = 0;
|
1269 | 61190b14 | bellard | info.si_code = TARGET_BUS_ADRALN; |
1270 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1271 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1272 | 67867308 | bellard | break;
|
1273 | e1833e1f | j_mayer | case POWERPC_EXCP_PROGRAM: /* Program exception */ |
1274 | e1833e1f | j_mayer | /* XXX: check this */
|
1275 | 61190b14 | bellard | switch (env->error_code & ~0xF) { |
1276 | e1833e1f | j_mayer | case POWERPC_EXCP_FP:
|
1277 | e1833e1f | j_mayer | EXCP_DUMP(env, "Floating point program exception\n");
|
1278 | 61190b14 | bellard | info.si_signo = TARGET_SIGFPE; |
1279 | 61190b14 | bellard | info.si_errno = 0;
|
1280 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
1281 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_OX:
|
1282 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTOVF; |
1283 | 61190b14 | bellard | break;
|
1284 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_UX:
|
1285 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTUND; |
1286 | 61190b14 | bellard | break;
|
1287 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_ZX:
|
1288 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXZDZ:
|
1289 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTDIV; |
1290 | 61190b14 | bellard | break;
|
1291 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_XX:
|
1292 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTRES; |
1293 | 61190b14 | bellard | break;
|
1294 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXSOFT:
|
1295 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTINV; |
1296 | 61190b14 | bellard | break;
|
1297 | 7c58044c | j_mayer | case POWERPC_EXCP_FP_VXSNAN:
|
1298 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXISI:
|
1299 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXIDI:
|
1300 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXIMZ:
|
1301 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXVC:
|
1302 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXSQRT:
|
1303 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXCVI:
|
1304 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTSUB; |
1305 | 61190b14 | bellard | break;
|
1306 | 61190b14 | bellard | default:
|
1307 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
|
1308 | e1833e1f | j_mayer | env->error_code); |
1309 | e1833e1f | j_mayer | break;
|
1310 | 61190b14 | bellard | } |
1311 | e1833e1f | j_mayer | break;
|
1312 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL:
|
1313 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid instruction\n");
|
1314 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1315 | 61190b14 | bellard | info.si_errno = 0;
|
1316 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
1317 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_INVAL:
|
1318 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLOPC; |
1319 | 61190b14 | bellard | break;
|
1320 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_LSWX:
|
1321 | a750fc0b | j_mayer | info.si_code = TARGET_ILL_ILLOPN; |
1322 | 61190b14 | bellard | break;
|
1323 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_SPR:
|
1324 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
1325 | 61190b14 | bellard | break;
|
1326 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_FP:
|
1327 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
1328 | 61190b14 | bellard | break;
|
1329 | 61190b14 | bellard | default:
|
1330 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
|
1331 | e1833e1f | j_mayer | env->error_code & 0xF);
|
1332 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
1333 | 61190b14 | bellard | break;
|
1334 | 61190b14 | bellard | } |
1335 | 61190b14 | bellard | break;
|
1336 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV:
|
1337 | e1833e1f | j_mayer | EXCP_DUMP(env, "Privilege violation\n");
|
1338 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1339 | 61190b14 | bellard | info.si_errno = 0;
|
1340 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
1341 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV_OPC:
|
1342 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
1343 | 61190b14 | bellard | break;
|
1344 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV_REG:
|
1345 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
1346 | e1833e1f | j_mayer | break;
|
1347 | 61190b14 | bellard | default:
|
1348 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
|
1349 | e1833e1f | j_mayer | env->error_code & 0xF);
|
1350 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
1351 | 61190b14 | bellard | break;
|
1352 | 61190b14 | bellard | } |
1353 | 61190b14 | bellard | break;
|
1354 | e1833e1f | j_mayer | case POWERPC_EXCP_TRAP:
|
1355 | e1833e1f | j_mayer | cpu_abort(env, "Tried to call a TRAP\n");
|
1356 | e1833e1f | j_mayer | break;
|
1357 | 61190b14 | bellard | default:
|
1358 | 61190b14 | bellard | /* Should not happen ! */
|
1359 | e1833e1f | j_mayer | cpu_abort(env, "Unknown program exception (%02x)\n",
|
1360 | e1833e1f | j_mayer | env->error_code); |
1361 | e1833e1f | j_mayer | break;
|
1362 | 61190b14 | bellard | } |
1363 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1364 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1365 | 67867308 | bellard | break;
|
1366 | e1833e1f | j_mayer | case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ |
1367 | e1833e1f | j_mayer | EXCP_DUMP(env, "No floating point allowed\n");
|
1368 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1369 | 67867308 | bellard | info.si_errno = 0;
|
1370 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
1371 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1372 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1373 | 67867308 | bellard | break;
|
1374 | e1833e1f | j_mayer | case POWERPC_EXCP_SYSCALL: /* System call exception */ |
1375 | e1833e1f | j_mayer | cpu_abort(env, "Syscall exception while in user mode. "
|
1376 | e1833e1f | j_mayer | "Aborting\n");
|
1377 | 61190b14 | bellard | break;
|
1378 | e1833e1f | j_mayer | case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ |
1379 | e1833e1f | j_mayer | EXCP_DUMP(env, "No APU instruction allowed\n");
|
1380 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
1381 | e1833e1f | j_mayer | info.si_errno = 0;
|
1382 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
1383 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
1384 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1385 | 61190b14 | bellard | break;
|
1386 | e1833e1f | j_mayer | case POWERPC_EXCP_DECR: /* Decrementer exception */ |
1387 | e1833e1f | j_mayer | cpu_abort(env, "Decrementer interrupt while in user mode. "
|
1388 | e1833e1f | j_mayer | "Aborting\n");
|
1389 | 61190b14 | bellard | break;
|
1390 | e1833e1f | j_mayer | case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ |
1391 | e1833e1f | j_mayer | cpu_abort(env, "Fix interval timer interrupt while in user mode. "
|
1392 | e1833e1f | j_mayer | "Aborting\n");
|
1393 | e1833e1f | j_mayer | break;
|
1394 | e1833e1f | j_mayer | case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ |
1395 | e1833e1f | j_mayer | cpu_abort(env, "Watchdog timer interrupt while in user mode. "
|
1396 | e1833e1f | j_mayer | "Aborting\n");
|
1397 | e1833e1f | j_mayer | break;
|
1398 | e1833e1f | j_mayer | case POWERPC_EXCP_DTLB: /* Data TLB error */ |
1399 | e1833e1f | j_mayer | cpu_abort(env, "Data TLB exception while in user mode. "
|
1400 | e1833e1f | j_mayer | "Aborting\n");
|
1401 | e1833e1f | j_mayer | break;
|
1402 | e1833e1f | j_mayer | case POWERPC_EXCP_ITLB: /* Instruction TLB error */ |
1403 | e1833e1f | j_mayer | cpu_abort(env, "Instruction TLB exception while in user mode. "
|
1404 | e1833e1f | j_mayer | "Aborting\n");
|
1405 | e1833e1f | j_mayer | break;
|
1406 | e1833e1f | j_mayer | case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ |
1407 | e1833e1f | j_mayer | EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
|
1408 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
1409 | e1833e1f | j_mayer | info.si_errno = 0;
|
1410 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
1411 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
1412 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1413 | e1833e1f | j_mayer | break;
|
1414 | e1833e1f | j_mayer | case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ |
1415 | e1833e1f | j_mayer | cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
|
1416 | e1833e1f | j_mayer | break;
|
1417 | e1833e1f | j_mayer | case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ |
1418 | e1833e1f | j_mayer | cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
|
1419 | e1833e1f | j_mayer | break;
|
1420 | e1833e1f | j_mayer | case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ |
1421 | e1833e1f | j_mayer | cpu_abort(env, "Performance monitor exception not handled\n");
|
1422 | e1833e1f | j_mayer | break;
|
1423 | e1833e1f | j_mayer | case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ |
1424 | e1833e1f | j_mayer | cpu_abort(env, "Doorbell interrupt while in user mode. "
|
1425 | e1833e1f | j_mayer | "Aborting\n");
|
1426 | e1833e1f | j_mayer | break;
|
1427 | e1833e1f | j_mayer | case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ |
1428 | e1833e1f | j_mayer | cpu_abort(env, "Doorbell critical interrupt while in user mode. "
|
1429 | e1833e1f | j_mayer | "Aborting\n");
|
1430 | e1833e1f | j_mayer | break;
|
1431 | e1833e1f | j_mayer | case POWERPC_EXCP_RESET: /* System reset exception */ |
1432 | e1833e1f | j_mayer | cpu_abort(env, "Reset interrupt while in user mode. "
|
1433 | e1833e1f | j_mayer | "Aborting\n");
|
1434 | e1833e1f | j_mayer | break;
|
1435 | e1833e1f | j_mayer | case POWERPC_EXCP_DSEG: /* Data segment exception */ |
1436 | e1833e1f | j_mayer | cpu_abort(env, "Data segment exception while in user mode. "
|
1437 | e1833e1f | j_mayer | "Aborting\n");
|
1438 | e1833e1f | j_mayer | break;
|
1439 | e1833e1f | j_mayer | case POWERPC_EXCP_ISEG: /* Instruction segment exception */ |
1440 | e1833e1f | j_mayer | cpu_abort(env, "Instruction segment exception "
|
1441 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1442 | e1833e1f | j_mayer | break;
|
1443 | e85e7c6e | j_mayer | /* PowerPC 64 with hypervisor mode support */
|
1444 | e1833e1f | j_mayer | case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ |
1445 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor decrementer interrupt "
|
1446 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1447 | e1833e1f | j_mayer | break;
|
1448 | e1833e1f | j_mayer | case POWERPC_EXCP_TRACE: /* Trace exception */ |
1449 | e1833e1f | j_mayer | /* Nothing to do:
|
1450 | e1833e1f | j_mayer | * we use this exception to emulate step-by-step execution mode.
|
1451 | e1833e1f | j_mayer | */
|
1452 | e1833e1f | j_mayer | break;
|
1453 | e85e7c6e | j_mayer | /* PowerPC 64 with hypervisor mode support */
|
1454 | e1833e1f | j_mayer | case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ |
1455 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor data storage exception "
|
1456 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1457 | e1833e1f | j_mayer | break;
|
1458 | e1833e1f | j_mayer | case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ |
1459 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor instruction storage exception "
|
1460 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1461 | e1833e1f | j_mayer | break;
|
1462 | e1833e1f | j_mayer | case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ |
1463 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor data segment exception "
|
1464 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1465 | e1833e1f | j_mayer | break;
|
1466 | e1833e1f | j_mayer | case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ |
1467 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor instruction segment exception "
|
1468 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1469 | e1833e1f | j_mayer | break;
|
1470 | e1833e1f | j_mayer | case POWERPC_EXCP_VPU: /* Vector unavailable exception */ |
1471 | e1833e1f | j_mayer | EXCP_DUMP(env, "No Altivec instructions allowed\n");
|
1472 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
1473 | e1833e1f | j_mayer | info.si_errno = 0;
|
1474 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
1475 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
1476 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1477 | e1833e1f | j_mayer | break;
|
1478 | e1833e1f | j_mayer | case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ |
1479 | e1833e1f | j_mayer | cpu_abort(env, "Programable interval timer interrupt "
|
1480 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1481 | e1833e1f | j_mayer | break;
|
1482 | e1833e1f | j_mayer | case POWERPC_EXCP_IO: /* IO error exception */ |
1483 | e1833e1f | j_mayer | cpu_abort(env, "IO error exception while in user mode. "
|
1484 | e1833e1f | j_mayer | "Aborting\n");
|
1485 | e1833e1f | j_mayer | break;
|
1486 | e1833e1f | j_mayer | case POWERPC_EXCP_RUNM: /* Run mode exception */ |
1487 | e1833e1f | j_mayer | cpu_abort(env, "Run mode exception while in user mode. "
|
1488 | e1833e1f | j_mayer | "Aborting\n");
|
1489 | e1833e1f | j_mayer | break;
|
1490 | e1833e1f | j_mayer | case POWERPC_EXCP_EMUL: /* Emulation trap exception */ |
1491 | e1833e1f | j_mayer | cpu_abort(env, "Emulation trap exception not handled\n");
|
1492 | e1833e1f | j_mayer | break;
|
1493 | e1833e1f | j_mayer | case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ |
1494 | e1833e1f | j_mayer | cpu_abort(env, "Instruction fetch TLB exception "
|
1495 | e1833e1f | j_mayer | "while in user-mode. Aborting");
|
1496 | e1833e1f | j_mayer | break;
|
1497 | e1833e1f | j_mayer | case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ |
1498 | e1833e1f | j_mayer | cpu_abort(env, "Data load TLB exception while in user-mode. "
|
1499 | e1833e1f | j_mayer | "Aborting");
|
1500 | e1833e1f | j_mayer | break;
|
1501 | e1833e1f | j_mayer | case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ |
1502 | e1833e1f | j_mayer | cpu_abort(env, "Data store TLB exception while in user-mode. "
|
1503 | e1833e1f | j_mayer | "Aborting");
|
1504 | e1833e1f | j_mayer | break;
|
1505 | e1833e1f | j_mayer | case POWERPC_EXCP_FPA: /* Floating-point assist exception */ |
1506 | e1833e1f | j_mayer | cpu_abort(env, "Floating-point assist exception not handled\n");
|
1507 | e1833e1f | j_mayer | break;
|
1508 | e1833e1f | j_mayer | case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ |
1509 | e1833e1f | j_mayer | cpu_abort(env, "Instruction address breakpoint exception "
|
1510 | e1833e1f | j_mayer | "not handled\n");
|
1511 | e1833e1f | j_mayer | break;
|
1512 | e1833e1f | j_mayer | case POWERPC_EXCP_SMI: /* System management interrupt */ |
1513 | e1833e1f | j_mayer | cpu_abort(env, "System management interrupt while in user mode. "
|
1514 | e1833e1f | j_mayer | "Aborting\n");
|
1515 | e1833e1f | j_mayer | break;
|
1516 | e1833e1f | j_mayer | case POWERPC_EXCP_THERM: /* Thermal interrupt */ |
1517 | e1833e1f | j_mayer | cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
|
1518 | e1833e1f | j_mayer | "Aborting\n");
|
1519 | e1833e1f | j_mayer | break;
|
1520 | e1833e1f | j_mayer | case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ |
1521 | e1833e1f | j_mayer | cpu_abort(env, "Performance monitor exception not handled\n");
|
1522 | e1833e1f | j_mayer | break;
|
1523 | e1833e1f | j_mayer | case POWERPC_EXCP_VPUA: /* Vector assist exception */ |
1524 | e1833e1f | j_mayer | cpu_abort(env, "Vector assist exception not handled\n");
|
1525 | e1833e1f | j_mayer | break;
|
1526 | e1833e1f | j_mayer | case POWERPC_EXCP_SOFTP: /* Soft patch exception */ |
1527 | e1833e1f | j_mayer | cpu_abort(env, "Soft patch exception not handled\n");
|
1528 | e1833e1f | j_mayer | break;
|
1529 | e1833e1f | j_mayer | case POWERPC_EXCP_MAINT: /* Maintenance exception */ |
1530 | e1833e1f | j_mayer | cpu_abort(env, "Maintenance exception while in user mode. "
|
1531 | e1833e1f | j_mayer | "Aborting\n");
|
1532 | e1833e1f | j_mayer | break;
|
1533 | e1833e1f | j_mayer | case POWERPC_EXCP_STOP: /* stop translation */ |
1534 | e1833e1f | j_mayer | /* We did invalidate the instruction cache. Go on */
|
1535 | e1833e1f | j_mayer | break;
|
1536 | e1833e1f | j_mayer | case POWERPC_EXCP_BRANCH: /* branch instruction: */ |
1537 | e1833e1f | j_mayer | /* We just stopped because of a branch. Go on */
|
1538 | e1833e1f | j_mayer | break;
|
1539 | e1833e1f | j_mayer | case POWERPC_EXCP_SYSCALL_USER:
|
1540 | e1833e1f | j_mayer | /* system call in user-mode emulation */
|
1541 | e1833e1f | j_mayer | /* WARNING:
|
1542 | e1833e1f | j_mayer | * PPC ABI uses overflow flag in cr0 to signal an error
|
1543 | e1833e1f | j_mayer | * in syscalls.
|
1544 | e1833e1f | j_mayer | */
|
1545 | e1833e1f | j_mayer | #if 0
|
1546 | e1833e1f | j_mayer | printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
|
1547 | e1833e1f | j_mayer | env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
|
1548 | e1833e1f | j_mayer | #endif
|
1549 | e1833e1f | j_mayer | env->crf[0] &= ~0x1; |
1550 | e1833e1f | j_mayer | ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], |
1551 | e1833e1f | j_mayer | env->gpr[5], env->gpr[6], env->gpr[7], |
1552 | e1833e1f | j_mayer | env->gpr[8]);
|
1553 | bcd4933a | Nathan Froyd | if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
|
1554 | bcd4933a | Nathan Froyd | /* Returning from a successful sigreturn syscall.
|
1555 | bcd4933a | Nathan Froyd | Avoid corrupting register state. */
|
1556 | bcd4933a | Nathan Froyd | break;
|
1557 | bcd4933a | Nathan Froyd | } |
1558 | e1833e1f | j_mayer | if (ret > (uint32_t)(-515)) { |
1559 | e1833e1f | j_mayer | env->crf[0] |= 0x1; |
1560 | e1833e1f | j_mayer | ret = -ret; |
1561 | 61190b14 | bellard | } |
1562 | e1833e1f | j_mayer | env->gpr[3] = ret;
|
1563 | e1833e1f | j_mayer | #if 0
|
1564 | e1833e1f | j_mayer | printf("syscall returned 0x%08x (%d)\n", ret, ret);
|
1565 | e1833e1f | j_mayer | #endif
|
1566 | e1833e1f | j_mayer | break;
|
1567 | 56f066bb | Nathan Froyd | case POWERPC_EXCP_STCX:
|
1568 | 56f066bb | Nathan Froyd | if (do_store_exclusive(env)) {
|
1569 | 56f066bb | Nathan Froyd | info.si_signo = TARGET_SIGSEGV; |
1570 | 56f066bb | Nathan Froyd | info.si_errno = 0;
|
1571 | 56f066bb | Nathan Froyd | info.si_code = TARGET_SEGV_MAPERR; |
1572 | 56f066bb | Nathan Froyd | info._sifields._sigfault._addr = env->nip; |
1573 | 56f066bb | Nathan Froyd | queue_signal(env, info.si_signo, &info); |
1574 | 56f066bb | Nathan Froyd | } |
1575 | 56f066bb | Nathan Froyd | break;
|
1576 | 71f75756 | aurel32 | case EXCP_DEBUG:
|
1577 | 71f75756 | aurel32 | { |
1578 | 71f75756 | aurel32 | int sig;
|
1579 | 71f75756 | aurel32 | |
1580 | 71f75756 | aurel32 | sig = gdb_handlesig(env, TARGET_SIGTRAP); |
1581 | 71f75756 | aurel32 | if (sig) {
|
1582 | 71f75756 | aurel32 | info.si_signo = sig; |
1583 | 71f75756 | aurel32 | info.si_errno = 0;
|
1584 | 71f75756 | aurel32 | info.si_code = TARGET_TRAP_BRKPT; |
1585 | 71f75756 | aurel32 | queue_signal(env, info.si_signo, &info); |
1586 | 71f75756 | aurel32 | } |
1587 | 71f75756 | aurel32 | } |
1588 | 71f75756 | aurel32 | break;
|
1589 | 56ba31ff | j_mayer | case EXCP_INTERRUPT:
|
1590 | 56ba31ff | j_mayer | /* just indicate that signals should be handled asap */
|
1591 | 56ba31ff | j_mayer | break;
|
1592 | e1833e1f | j_mayer | default:
|
1593 | e1833e1f | j_mayer | cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
|
1594 | e1833e1f | j_mayer | break;
|
1595 | 67867308 | bellard | } |
1596 | 67867308 | bellard | process_pending_signals(env); |
1597 | 67867308 | bellard | } |
1598 | 67867308 | bellard | } |
1599 | 67867308 | bellard | #endif
|
1600 | 67867308 | bellard | |
1601 | 048f6b4d | bellard | #ifdef TARGET_MIPS
|
1602 | 048f6b4d | bellard | |
1603 | 048f6b4d | bellard | #define MIPS_SYS(name, args) args,
|
1604 | 048f6b4d | bellard | |
1605 | 048f6b4d | bellard | static const uint8_t mips_syscall_args[] = { |
1606 | 048f6b4d | bellard | MIPS_SYS(sys_syscall , 0) /* 4000 */ |
1607 | 048f6b4d | bellard | MIPS_SYS(sys_exit , 1)
|
1608 | 048f6b4d | bellard | MIPS_SYS(sys_fork , 0)
|
1609 | 048f6b4d | bellard | MIPS_SYS(sys_read , 3)
|
1610 | 048f6b4d | bellard | MIPS_SYS(sys_write , 3)
|
1611 | 048f6b4d | bellard | MIPS_SYS(sys_open , 3) /* 4005 */ |
1612 | 048f6b4d | bellard | MIPS_SYS(sys_close , 1)
|
1613 | 048f6b4d | bellard | MIPS_SYS(sys_waitpid , 3)
|
1614 | 048f6b4d | bellard | MIPS_SYS(sys_creat , 2)
|
1615 | 048f6b4d | bellard | MIPS_SYS(sys_link , 2)
|
1616 | 048f6b4d | bellard | MIPS_SYS(sys_unlink , 1) /* 4010 */ |
1617 | 048f6b4d | bellard | MIPS_SYS(sys_execve , 0)
|
1618 | 048f6b4d | bellard | MIPS_SYS(sys_chdir , 1)
|
1619 | 048f6b4d | bellard | MIPS_SYS(sys_time , 1)
|
1620 | 048f6b4d | bellard | MIPS_SYS(sys_mknod , 3)
|
1621 | 048f6b4d | bellard | MIPS_SYS(sys_chmod , 2) /* 4015 */ |
1622 | 048f6b4d | bellard | MIPS_SYS(sys_lchown , 3)
|
1623 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1624 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ |
1625 | 048f6b4d | bellard | MIPS_SYS(sys_lseek , 3)
|
1626 | 048f6b4d | bellard | MIPS_SYS(sys_getpid , 0) /* 4020 */ |
1627 | 048f6b4d | bellard | MIPS_SYS(sys_mount , 5)
|
1628 | 048f6b4d | bellard | MIPS_SYS(sys_oldumount , 1)
|
1629 | 048f6b4d | bellard | MIPS_SYS(sys_setuid , 1)
|
1630 | 048f6b4d | bellard | MIPS_SYS(sys_getuid , 0)
|
1631 | 048f6b4d | bellard | MIPS_SYS(sys_stime , 1) /* 4025 */ |
1632 | 048f6b4d | bellard | MIPS_SYS(sys_ptrace , 4)
|
1633 | 048f6b4d | bellard | MIPS_SYS(sys_alarm , 1)
|
1634 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ |
1635 | 048f6b4d | bellard | MIPS_SYS(sys_pause , 0)
|
1636 | 048f6b4d | bellard | MIPS_SYS(sys_utime , 2) /* 4030 */ |
1637 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1638 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1639 | 048f6b4d | bellard | MIPS_SYS(sys_access , 2)
|
1640 | 048f6b4d | bellard | MIPS_SYS(sys_nice , 1)
|
1641 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ |
1642 | 048f6b4d | bellard | MIPS_SYS(sys_sync , 0)
|
1643 | 048f6b4d | bellard | MIPS_SYS(sys_kill , 2)
|
1644 | 048f6b4d | bellard | MIPS_SYS(sys_rename , 2)
|
1645 | 048f6b4d | bellard | MIPS_SYS(sys_mkdir , 2)
|
1646 | 048f6b4d | bellard | MIPS_SYS(sys_rmdir , 1) /* 4040 */ |
1647 | 048f6b4d | bellard | MIPS_SYS(sys_dup , 1)
|
1648 | 048f6b4d | bellard | MIPS_SYS(sys_pipe , 0)
|
1649 | 048f6b4d | bellard | MIPS_SYS(sys_times , 1)
|
1650 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1651 | 048f6b4d | bellard | MIPS_SYS(sys_brk , 1) /* 4045 */ |
1652 | 048f6b4d | bellard | MIPS_SYS(sys_setgid , 1)
|
1653 | 048f6b4d | bellard | MIPS_SYS(sys_getgid , 0)
|
1654 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ |
1655 | 048f6b4d | bellard | MIPS_SYS(sys_geteuid , 0)
|
1656 | 048f6b4d | bellard | MIPS_SYS(sys_getegid , 0) /* 4050 */ |
1657 | 048f6b4d | bellard | MIPS_SYS(sys_acct , 0)
|
1658 | 048f6b4d | bellard | MIPS_SYS(sys_umount , 2)
|
1659 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1660 | 048f6b4d | bellard | MIPS_SYS(sys_ioctl , 3)
|
1661 | 048f6b4d | bellard | MIPS_SYS(sys_fcntl , 3) /* 4055 */ |
1662 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 2)
|
1663 | 048f6b4d | bellard | MIPS_SYS(sys_setpgid , 2)
|
1664 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1665 | 048f6b4d | bellard | MIPS_SYS(sys_olduname , 1)
|
1666 | 048f6b4d | bellard | MIPS_SYS(sys_umask , 1) /* 4060 */ |
1667 | 048f6b4d | bellard | MIPS_SYS(sys_chroot , 1)
|
1668 | 048f6b4d | bellard | MIPS_SYS(sys_ustat , 2)
|
1669 | 048f6b4d | bellard | MIPS_SYS(sys_dup2 , 2)
|
1670 | 048f6b4d | bellard | MIPS_SYS(sys_getppid , 0)
|
1671 | 048f6b4d | bellard | MIPS_SYS(sys_getpgrp , 0) /* 4065 */ |
1672 | 048f6b4d | bellard | MIPS_SYS(sys_setsid , 0)
|
1673 | 048f6b4d | bellard | MIPS_SYS(sys_sigaction , 3)
|
1674 | 048f6b4d | bellard | MIPS_SYS(sys_sgetmask , 0)
|
1675 | 048f6b4d | bellard | MIPS_SYS(sys_ssetmask , 1)
|
1676 | 048f6b4d | bellard | MIPS_SYS(sys_setreuid , 2) /* 4070 */ |
1677 | 048f6b4d | bellard | MIPS_SYS(sys_setregid , 2)
|
1678 | 048f6b4d | bellard | MIPS_SYS(sys_sigsuspend , 0)
|
1679 | 048f6b4d | bellard | MIPS_SYS(sys_sigpending , 1)
|
1680 | 048f6b4d | bellard | MIPS_SYS(sys_sethostname , 2)
|
1681 | 048f6b4d | bellard | MIPS_SYS(sys_setrlimit , 2) /* 4075 */ |
1682 | 048f6b4d | bellard | MIPS_SYS(sys_getrlimit , 2)
|
1683 | 048f6b4d | bellard | MIPS_SYS(sys_getrusage , 2)
|
1684 | 048f6b4d | bellard | MIPS_SYS(sys_gettimeofday, 2)
|
1685 | 048f6b4d | bellard | MIPS_SYS(sys_settimeofday, 2)
|
1686 | 048f6b4d | bellard | MIPS_SYS(sys_getgroups , 2) /* 4080 */ |
1687 | 048f6b4d | bellard | MIPS_SYS(sys_setgroups , 2)
|
1688 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* old_select */ |
1689 | 048f6b4d | bellard | MIPS_SYS(sys_symlink , 2)
|
1690 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ |
1691 | 048f6b4d | bellard | MIPS_SYS(sys_readlink , 3) /* 4085 */ |
1692 | 048f6b4d | bellard | MIPS_SYS(sys_uselib , 1)
|
1693 | 048f6b4d | bellard | MIPS_SYS(sys_swapon , 2)
|
1694 | 048f6b4d | bellard | MIPS_SYS(sys_reboot , 3)
|
1695 | 048f6b4d | bellard | MIPS_SYS(old_readdir , 3)
|
1696 | 048f6b4d | bellard | MIPS_SYS(old_mmap , 6) /* 4090 */ |
1697 | 048f6b4d | bellard | MIPS_SYS(sys_munmap , 2)
|
1698 | 048f6b4d | bellard | MIPS_SYS(sys_truncate , 2)
|
1699 | 048f6b4d | bellard | MIPS_SYS(sys_ftruncate , 2)
|
1700 | 048f6b4d | bellard | MIPS_SYS(sys_fchmod , 2)
|
1701 | 048f6b4d | bellard | MIPS_SYS(sys_fchown , 3) /* 4095 */ |
1702 | 048f6b4d | bellard | MIPS_SYS(sys_getpriority , 2)
|
1703 | 048f6b4d | bellard | MIPS_SYS(sys_setpriority , 3)
|
1704 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1705 | 048f6b4d | bellard | MIPS_SYS(sys_statfs , 2)
|
1706 | 048f6b4d | bellard | MIPS_SYS(sys_fstatfs , 2) /* 4100 */ |
1707 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ |
1708 | 048f6b4d | bellard | MIPS_SYS(sys_socketcall , 2)
|
1709 | 048f6b4d | bellard | MIPS_SYS(sys_syslog , 3)
|
1710 | 048f6b4d | bellard | MIPS_SYS(sys_setitimer , 3)
|
1711 | 048f6b4d | bellard | MIPS_SYS(sys_getitimer , 2) /* 4105 */ |
1712 | 048f6b4d | bellard | MIPS_SYS(sys_newstat , 2)
|
1713 | 048f6b4d | bellard | MIPS_SYS(sys_newlstat , 2)
|
1714 | 048f6b4d | bellard | MIPS_SYS(sys_newfstat , 2)
|
1715 | 048f6b4d | bellard | MIPS_SYS(sys_uname , 1)
|
1716 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ |
1717 | 048f6b4d | bellard | MIPS_SYS(sys_vhangup , 0)
|
1718 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ |
1719 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ |
1720 | 048f6b4d | bellard | MIPS_SYS(sys_wait4 , 4)
|
1721 | 048f6b4d | bellard | MIPS_SYS(sys_swapoff , 1) /* 4115 */ |
1722 | 048f6b4d | bellard | MIPS_SYS(sys_sysinfo , 1)
|
1723 | 048f6b4d | bellard | MIPS_SYS(sys_ipc , 6)
|
1724 | 048f6b4d | bellard | MIPS_SYS(sys_fsync , 1)
|
1725 | 048f6b4d | bellard | MIPS_SYS(sys_sigreturn , 0)
|
1726 | 18113962 | Paul Brook | MIPS_SYS(sys_clone , 6) /* 4120 */ |
1727 | 048f6b4d | bellard | MIPS_SYS(sys_setdomainname, 2)
|
1728 | 048f6b4d | bellard | MIPS_SYS(sys_newuname , 1)
|
1729 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ |
1730 | 048f6b4d | bellard | MIPS_SYS(sys_adjtimex , 1)
|
1731 | 048f6b4d | bellard | MIPS_SYS(sys_mprotect , 3) /* 4125 */ |
1732 | 048f6b4d | bellard | MIPS_SYS(sys_sigprocmask , 3)
|
1733 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ |
1734 | 048f6b4d | bellard | MIPS_SYS(sys_init_module , 5)
|
1735 | 048f6b4d | bellard | MIPS_SYS(sys_delete_module, 1)
|
1736 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ |
1737 | 048f6b4d | bellard | MIPS_SYS(sys_quotactl , 0)
|
1738 | 048f6b4d | bellard | MIPS_SYS(sys_getpgid , 1)
|
1739 | 048f6b4d | bellard | MIPS_SYS(sys_fchdir , 1)
|
1740 | 048f6b4d | bellard | MIPS_SYS(sys_bdflush , 2)
|
1741 | 048f6b4d | bellard | MIPS_SYS(sys_sysfs , 3) /* 4135 */ |
1742 | 048f6b4d | bellard | MIPS_SYS(sys_personality , 1)
|
1743 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ |
1744 | 048f6b4d | bellard | MIPS_SYS(sys_setfsuid , 1)
|
1745 | 048f6b4d | bellard | MIPS_SYS(sys_setfsgid , 1)
|
1746 | 048f6b4d | bellard | MIPS_SYS(sys_llseek , 5) /* 4140 */ |
1747 | 048f6b4d | bellard | MIPS_SYS(sys_getdents , 3)
|
1748 | 048f6b4d | bellard | MIPS_SYS(sys_select , 5)
|
1749 | 048f6b4d | bellard | MIPS_SYS(sys_flock , 2)
|
1750 | 048f6b4d | bellard | MIPS_SYS(sys_msync , 3)
|
1751 | 048f6b4d | bellard | MIPS_SYS(sys_readv , 3) /* 4145 */ |
1752 | 048f6b4d | bellard | MIPS_SYS(sys_writev , 3)
|
1753 | 048f6b4d | bellard | MIPS_SYS(sys_cacheflush , 3)
|
1754 | 048f6b4d | bellard | MIPS_SYS(sys_cachectl , 3)
|
1755 | 048f6b4d | bellard | MIPS_SYS(sys_sysmips , 4)
|
1756 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ |
1757 | 048f6b4d | bellard | MIPS_SYS(sys_getsid , 1)
|
1758 | 048f6b4d | bellard | MIPS_SYS(sys_fdatasync , 0)
|
1759 | 048f6b4d | bellard | MIPS_SYS(sys_sysctl , 1)
|
1760 | 048f6b4d | bellard | MIPS_SYS(sys_mlock , 2)
|
1761 | 048f6b4d | bellard | MIPS_SYS(sys_munlock , 2) /* 4155 */ |
1762 | 048f6b4d | bellard | MIPS_SYS(sys_mlockall , 1)
|
1763 | 048f6b4d | bellard | MIPS_SYS(sys_munlockall , 0)
|
1764 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setparam, 2)
|
1765 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getparam, 2)
|
1766 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ |
1767 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getscheduler, 1)
|
1768 | 048f6b4d | bellard | MIPS_SYS(sys_sched_yield , 0)
|
1769 | 048f6b4d | bellard | MIPS_SYS(sys_sched_get_priority_max, 1)
|
1770 | 048f6b4d | bellard | MIPS_SYS(sys_sched_get_priority_min, 1)
|
1771 | 048f6b4d | bellard | MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ |
1772 | 048f6b4d | bellard | MIPS_SYS(sys_nanosleep, 2)
|
1773 | 048f6b4d | bellard | MIPS_SYS(sys_mremap , 4)
|
1774 | 048f6b4d | bellard | MIPS_SYS(sys_accept , 3)
|
1775 | 048f6b4d | bellard | MIPS_SYS(sys_bind , 3)
|
1776 | 048f6b4d | bellard | MIPS_SYS(sys_connect , 3) /* 4170 */ |
1777 | 048f6b4d | bellard | MIPS_SYS(sys_getpeername , 3)
|
1778 | 048f6b4d | bellard | MIPS_SYS(sys_getsockname , 3)
|
1779 | 048f6b4d | bellard | MIPS_SYS(sys_getsockopt , 5)
|
1780 | 048f6b4d | bellard | MIPS_SYS(sys_listen , 2)
|
1781 | 048f6b4d | bellard | MIPS_SYS(sys_recv , 4) /* 4175 */ |
1782 | 048f6b4d | bellard | MIPS_SYS(sys_recvfrom , 6)
|
1783 | 048f6b4d | bellard | MIPS_SYS(sys_recvmsg , 3)
|
1784 | 048f6b4d | bellard | MIPS_SYS(sys_send , 4)
|
1785 | 048f6b4d | bellard | MIPS_SYS(sys_sendmsg , 3)
|
1786 | 048f6b4d | bellard | MIPS_SYS(sys_sendto , 6) /* 4180 */ |
1787 | 048f6b4d | bellard | MIPS_SYS(sys_setsockopt , 5)
|
1788 | 048f6b4d | bellard | MIPS_SYS(sys_shutdown , 2)
|
1789 | 048f6b4d | bellard | MIPS_SYS(sys_socket , 3)
|
1790 | 048f6b4d | bellard | MIPS_SYS(sys_socketpair , 4)
|
1791 | 048f6b4d | bellard | MIPS_SYS(sys_setresuid , 3) /* 4185 */ |
1792 | 048f6b4d | bellard | MIPS_SYS(sys_getresuid , 3)
|
1793 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ |
1794 | 048f6b4d | bellard | MIPS_SYS(sys_poll , 3)
|
1795 | 048f6b4d | bellard | MIPS_SYS(sys_nfsservctl , 3)
|
1796 | 048f6b4d | bellard | MIPS_SYS(sys_setresgid , 3) /* 4190 */ |
1797 | 048f6b4d | bellard | MIPS_SYS(sys_getresgid , 3)
|
1798 | 048f6b4d | bellard | MIPS_SYS(sys_prctl , 5)
|
1799 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigreturn, 0)
|
1800 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigaction, 4)
|
1801 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ |
1802 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigpending, 2)
|
1803 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigtimedwait, 4)
|
1804 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigqueueinfo, 3)
|
1805 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigsuspend, 0)
|
1806 | 048f6b4d | bellard | MIPS_SYS(sys_pread64 , 6) /* 4200 */ |
1807 | 048f6b4d | bellard | MIPS_SYS(sys_pwrite64 , 6)
|
1808 | 048f6b4d | bellard | MIPS_SYS(sys_chown , 3)
|
1809 | 048f6b4d | bellard | MIPS_SYS(sys_getcwd , 2)
|
1810 | 048f6b4d | bellard | MIPS_SYS(sys_capget , 2)
|
1811 | 048f6b4d | bellard | MIPS_SYS(sys_capset , 2) /* 4205 */ |
1812 | 048f6b4d | bellard | MIPS_SYS(sys_sigaltstack , 0)
|
1813 | 048f6b4d | bellard | MIPS_SYS(sys_sendfile , 4)
|
1814 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1815 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1816 | 048f6b4d | bellard | MIPS_SYS(sys_mmap2 , 6) /* 4210 */ |
1817 | 048f6b4d | bellard | MIPS_SYS(sys_truncate64 , 4)
|
1818 | 048f6b4d | bellard | MIPS_SYS(sys_ftruncate64 , 4)
|
1819 | 048f6b4d | bellard | MIPS_SYS(sys_stat64 , 2)
|
1820 | 048f6b4d | bellard | MIPS_SYS(sys_lstat64 , 2)
|
1821 | 048f6b4d | bellard | MIPS_SYS(sys_fstat64 , 2) /* 4215 */ |
1822 | 048f6b4d | bellard | MIPS_SYS(sys_pivot_root , 2)
|
1823 | 048f6b4d | bellard | MIPS_SYS(sys_mincore , 3)
|
1824 | 048f6b4d | bellard | MIPS_SYS(sys_madvise , 3)
|
1825 | 048f6b4d | bellard | MIPS_SYS(sys_getdents64 , 3)
|
1826 | 048f6b4d | bellard | MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ |
1827 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1828 | 048f6b4d | bellard | MIPS_SYS(sys_gettid , 0)
|
1829 | 048f6b4d | bellard | MIPS_SYS(sys_readahead , 5)
|
1830 | 048f6b4d | bellard | MIPS_SYS(sys_setxattr , 5)
|
1831 | 048f6b4d | bellard | MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ |
1832 | 048f6b4d | bellard | MIPS_SYS(sys_fsetxattr , 5)
|
1833 | 048f6b4d | bellard | MIPS_SYS(sys_getxattr , 4)
|
1834 | 048f6b4d | bellard | MIPS_SYS(sys_lgetxattr , 4)
|
1835 | 048f6b4d | bellard | MIPS_SYS(sys_fgetxattr , 4)
|
1836 | 048f6b4d | bellard | MIPS_SYS(sys_listxattr , 3) /* 4230 */ |
1837 | 048f6b4d | bellard | MIPS_SYS(sys_llistxattr , 3)
|
1838 | 048f6b4d | bellard | MIPS_SYS(sys_flistxattr , 3)
|
1839 | 048f6b4d | bellard | MIPS_SYS(sys_removexattr , 2)
|
1840 | 048f6b4d | bellard | MIPS_SYS(sys_lremovexattr, 2)
|
1841 | 048f6b4d | bellard | MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ |
1842 | 048f6b4d | bellard | MIPS_SYS(sys_tkill , 2)
|
1843 | 048f6b4d | bellard | MIPS_SYS(sys_sendfile64 , 5)
|
1844 | 048f6b4d | bellard | MIPS_SYS(sys_futex , 2)
|
1845 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setaffinity, 3)
|
1846 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ |
1847 | 048f6b4d | bellard | MIPS_SYS(sys_io_setup , 2)
|
1848 | 048f6b4d | bellard | MIPS_SYS(sys_io_destroy , 1)
|
1849 | 048f6b4d | bellard | MIPS_SYS(sys_io_getevents, 5)
|
1850 | 048f6b4d | bellard | MIPS_SYS(sys_io_submit , 3)
|
1851 | 048f6b4d | bellard | MIPS_SYS(sys_io_cancel , 3) /* 4245 */ |
1852 | 048f6b4d | bellard | MIPS_SYS(sys_exit_group , 1)
|
1853 | 048f6b4d | bellard | MIPS_SYS(sys_lookup_dcookie, 3)
|
1854 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_create, 1)
|
1855 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_ctl , 4)
|
1856 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ |
1857 | 048f6b4d | bellard | MIPS_SYS(sys_remap_file_pages, 5)
|
1858 | 048f6b4d | bellard | MIPS_SYS(sys_set_tid_address, 1)
|
1859 | 048f6b4d | bellard | MIPS_SYS(sys_restart_syscall, 0)
|
1860 | 048f6b4d | bellard | MIPS_SYS(sys_fadvise64_64, 7)
|
1861 | 048f6b4d | bellard | MIPS_SYS(sys_statfs64 , 3) /* 4255 */ |
1862 | 048f6b4d | bellard | MIPS_SYS(sys_fstatfs64 , 2)
|
1863 | 048f6b4d | bellard | MIPS_SYS(sys_timer_create, 3)
|
1864 | 048f6b4d | bellard | MIPS_SYS(sys_timer_settime, 4)
|
1865 | 048f6b4d | bellard | MIPS_SYS(sys_timer_gettime, 2)
|
1866 | 048f6b4d | bellard | MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ |
1867 | 048f6b4d | bellard | MIPS_SYS(sys_timer_delete, 1)
|
1868 | 048f6b4d | bellard | MIPS_SYS(sys_clock_settime, 2)
|
1869 | 048f6b4d | bellard | MIPS_SYS(sys_clock_gettime, 2)
|
1870 | 048f6b4d | bellard | MIPS_SYS(sys_clock_getres, 2)
|
1871 | 048f6b4d | bellard | MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ |
1872 | 048f6b4d | bellard | MIPS_SYS(sys_tgkill , 3)
|
1873 | 048f6b4d | bellard | MIPS_SYS(sys_utimes , 2)
|
1874 | 048f6b4d | bellard | MIPS_SYS(sys_mbind , 4)
|
1875 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ |
1876 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ |
1877 | 048f6b4d | bellard | MIPS_SYS(sys_mq_open , 4)
|
1878 | 048f6b4d | bellard | MIPS_SYS(sys_mq_unlink , 1)
|
1879 | 048f6b4d | bellard | MIPS_SYS(sys_mq_timedsend, 5)
|
1880 | 048f6b4d | bellard | MIPS_SYS(sys_mq_timedreceive, 5)
|
1881 | 048f6b4d | bellard | MIPS_SYS(sys_mq_notify , 2) /* 4275 */ |
1882 | 048f6b4d | bellard | MIPS_SYS(sys_mq_getsetattr, 3)
|
1883 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ |
1884 | 048f6b4d | bellard | MIPS_SYS(sys_waitid , 4)
|
1885 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ |
1886 | 048f6b4d | bellard | MIPS_SYS(sys_add_key , 5)
|
1887 | 388bb21a | ths | MIPS_SYS(sys_request_key, 4)
|
1888 | 048f6b4d | bellard | MIPS_SYS(sys_keyctl , 5)
|
1889 | 6f5b89a0 | ths | MIPS_SYS(sys_set_thread_area, 1)
|
1890 | 388bb21a | ths | MIPS_SYS(sys_inotify_init, 0)
|
1891 | 388bb21a | ths | MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ |
1892 | 388bb21a | ths | MIPS_SYS(sys_inotify_rm_watch, 2)
|
1893 | 388bb21a | ths | MIPS_SYS(sys_migrate_pages, 4)
|
1894 | 388bb21a | ths | MIPS_SYS(sys_openat, 4)
|
1895 | 388bb21a | ths | MIPS_SYS(sys_mkdirat, 3)
|
1896 | 388bb21a | ths | MIPS_SYS(sys_mknodat, 4) /* 4290 */ |
1897 | 388bb21a | ths | MIPS_SYS(sys_fchownat, 5)
|
1898 | 388bb21a | ths | MIPS_SYS(sys_futimesat, 3)
|
1899 | 388bb21a | ths | MIPS_SYS(sys_fstatat64, 4)
|
1900 | 388bb21a | ths | MIPS_SYS(sys_unlinkat, 3)
|
1901 | 388bb21a | ths | MIPS_SYS(sys_renameat, 4) /* 4295 */ |
1902 | 388bb21a | ths | MIPS_SYS(sys_linkat, 5)
|
1903 | 388bb21a | ths | MIPS_SYS(sys_symlinkat, 3)
|
1904 | 388bb21a | ths | MIPS_SYS(sys_readlinkat, 4)
|
1905 | 388bb21a | ths | MIPS_SYS(sys_fchmodat, 3)
|
1906 | 388bb21a | ths | MIPS_SYS(sys_faccessat, 3) /* 4300 */ |
1907 | 388bb21a | ths | MIPS_SYS(sys_pselect6, 6)
|
1908 | 388bb21a | ths | MIPS_SYS(sys_ppoll, 5)
|
1909 | 388bb21a | ths | MIPS_SYS(sys_unshare, 1)
|
1910 | 388bb21a | ths | MIPS_SYS(sys_splice, 4)
|
1911 | 388bb21a | ths | MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ |
1912 | 388bb21a | ths | MIPS_SYS(sys_tee, 4)
|
1913 | 388bb21a | ths | MIPS_SYS(sys_vmsplice, 4)
|
1914 | 388bb21a | ths | MIPS_SYS(sys_move_pages, 6)
|
1915 | 388bb21a | ths | MIPS_SYS(sys_set_robust_list, 2)
|
1916 | 388bb21a | ths | MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ |
1917 | 388bb21a | ths | MIPS_SYS(sys_kexec_load, 4)
|
1918 | 388bb21a | ths | MIPS_SYS(sys_getcpu, 3)
|
1919 | 388bb21a | ths | MIPS_SYS(sys_epoll_pwait, 6)
|
1920 | 388bb21a | ths | MIPS_SYS(sys_ioprio_set, 3)
|
1921 | 388bb21a | ths | MIPS_SYS(sys_ioprio_get, 2)
|
1922 | 048f6b4d | bellard | }; |
1923 | 048f6b4d | bellard | |
1924 | 048f6b4d | bellard | #undef MIPS_SYS
|
1925 | 048f6b4d | bellard | |
1926 | 590bc601 | Paul Brook | static int do_store_exclusive(CPUMIPSState *env) |
1927 | 590bc601 | Paul Brook | { |
1928 | 590bc601 | Paul Brook | target_ulong addr; |
1929 | 590bc601 | Paul Brook | target_ulong page_addr; |
1930 | 590bc601 | Paul Brook | target_ulong val; |
1931 | 590bc601 | Paul Brook | int flags;
|
1932 | 590bc601 | Paul Brook | int segv = 0; |
1933 | 590bc601 | Paul Brook | int reg;
|
1934 | 590bc601 | Paul Brook | int d;
|
1935 | 590bc601 | Paul Brook | |
1936 | 5499b6ff | Aurelien Jarno | addr = env->lladdr; |
1937 | 590bc601 | Paul Brook | page_addr = addr & TARGET_PAGE_MASK; |
1938 | 590bc601 | Paul Brook | start_exclusive(); |
1939 | 590bc601 | Paul Brook | mmap_lock(); |
1940 | 590bc601 | Paul Brook | flags = page_get_flags(page_addr); |
1941 | 590bc601 | Paul Brook | if ((flags & PAGE_READ) == 0) { |
1942 | 590bc601 | Paul Brook | segv = 1;
|
1943 | 590bc601 | Paul Brook | } else {
|
1944 | 590bc601 | Paul Brook | reg = env->llreg & 0x1f;
|
1945 | 590bc601 | Paul Brook | d = (env->llreg & 0x20) != 0; |
1946 | 590bc601 | Paul Brook | if (d) {
|
1947 | 590bc601 | Paul Brook | segv = get_user_s64(val, addr); |
1948 | 590bc601 | Paul Brook | } else {
|
1949 | 590bc601 | Paul Brook | segv = get_user_s32(val, addr); |
1950 | 590bc601 | Paul Brook | } |
1951 | 590bc601 | Paul Brook | if (!segv) {
|
1952 | 590bc601 | Paul Brook | if (val != env->llval) {
|
1953 | 590bc601 | Paul Brook | env->active_tc.gpr[reg] = 0;
|
1954 | 590bc601 | Paul Brook | } else {
|
1955 | 590bc601 | Paul Brook | if (d) {
|
1956 | 590bc601 | Paul Brook | segv = put_user_u64(env->llnewval, addr); |
1957 | 590bc601 | Paul Brook | } else {
|
1958 | 590bc601 | Paul Brook | segv = put_user_u32(env->llnewval, addr); |
1959 | 590bc601 | Paul Brook | } |
1960 | 590bc601 | Paul Brook | if (!segv) {
|
1961 | 590bc601 | Paul Brook | env->active_tc.gpr[reg] = 1;
|
1962 | 590bc601 | Paul Brook | } |
1963 | 590bc601 | Paul Brook | } |
1964 | 590bc601 | Paul Brook | } |
1965 | 590bc601 | Paul Brook | } |
1966 | 5499b6ff | Aurelien Jarno | env->lladdr = -1;
|
1967 | 590bc601 | Paul Brook | if (!segv) {
|
1968 | 590bc601 | Paul Brook | env->active_tc.PC += 4;
|
1969 | 590bc601 | Paul Brook | } |
1970 | 590bc601 | Paul Brook | mmap_unlock(); |
1971 | 590bc601 | Paul Brook | end_exclusive(); |
1972 | 590bc601 | Paul Brook | return segv;
|
1973 | 590bc601 | Paul Brook | } |
1974 | 590bc601 | Paul Brook | |
1975 | 048f6b4d | bellard | void cpu_loop(CPUMIPSState *env)
|
1976 | 048f6b4d | bellard | { |
1977 | c227f099 | Anthony Liguori | target_siginfo_t info; |
1978 | 388bb21a | ths | int trapnr, ret;
|
1979 | 048f6b4d | bellard | unsigned int syscall_num; |
1980 | 048f6b4d | bellard | |
1981 | 048f6b4d | bellard | for(;;) {
|
1982 | 590bc601 | Paul Brook | cpu_exec_start(env); |
1983 | 048f6b4d | bellard | trapnr = cpu_mips_exec(env); |
1984 | 590bc601 | Paul Brook | cpu_exec_end(env); |
1985 | 048f6b4d | bellard | switch(trapnr) {
|
1986 | 048f6b4d | bellard | case EXCP_SYSCALL:
|
1987 | b5dc7732 | ths | syscall_num = env->active_tc.gpr[2] - 4000; |
1988 | b5dc7732 | ths | env->active_tc.PC += 4;
|
1989 | 388bb21a | ths | if (syscall_num >= sizeof(mips_syscall_args)) { |
1990 | 388bb21a | ths | ret = -ENOSYS; |
1991 | 388bb21a | ths | } else {
|
1992 | 388bb21a | ths | int nb_args;
|
1993 | 992f48a0 | blueswir1 | abi_ulong sp_reg; |
1994 | 992f48a0 | blueswir1 | abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; |
1995 | 388bb21a | ths | |
1996 | 388bb21a | ths | nb_args = mips_syscall_args[syscall_num]; |
1997 | b5dc7732 | ths | sp_reg = env->active_tc.gpr[29];
|
1998 | 388bb21a | ths | switch (nb_args) {
|
1999 | 388bb21a | ths | /* these arguments are taken from the stack */
|
2000 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
2001 | 2f619698 | bellard | case 8: get_user_ual(arg8, sp_reg + 28); |
2002 | 2f619698 | bellard | case 7: get_user_ual(arg7, sp_reg + 24); |
2003 | 2f619698 | bellard | case 6: get_user_ual(arg6, sp_reg + 20); |
2004 | 2f619698 | bellard | case 5: get_user_ual(arg5, sp_reg + 16); |
2005 | 388bb21a | ths | default:
|
2006 | 388bb21a | ths | break;
|
2007 | 048f6b4d | bellard | } |
2008 | b5dc7732 | ths | ret = do_syscall(env, env->active_tc.gpr[2],
|
2009 | b5dc7732 | ths | env->active_tc.gpr[4],
|
2010 | b5dc7732 | ths | env->active_tc.gpr[5],
|
2011 | b5dc7732 | ths | env->active_tc.gpr[6],
|
2012 | b5dc7732 | ths | env->active_tc.gpr[7],
|
2013 | 388bb21a | ths | arg5, arg6/*, arg7, arg8*/);
|
2014 | 388bb21a | ths | } |
2015 | 0b1bcb00 | pbrook | if (ret == -TARGET_QEMU_ESIGRETURN) {
|
2016 | 0b1bcb00 | pbrook | /* Returning from a successful sigreturn syscall.
|
2017 | 0b1bcb00 | pbrook | Avoid clobbering register state. */
|
2018 | 0b1bcb00 | pbrook | break;
|
2019 | 0b1bcb00 | pbrook | } |
2020 | 388bb21a | ths | if ((unsigned int)ret >= (unsigned int)(-1133)) { |
2021 | b5dc7732 | ths | env->active_tc.gpr[7] = 1; /* error flag */ |
2022 | 388bb21a | ths | ret = -ret; |
2023 | 388bb21a | ths | } else {
|
2024 | b5dc7732 | ths | env->active_tc.gpr[7] = 0; /* error flag */ |
2025 | 048f6b4d | bellard | } |
2026 | b5dc7732 | ths | env->active_tc.gpr[2] = ret;
|
2027 | 048f6b4d | bellard | break;
|
2028 | ca7c2b1b | ths | case EXCP_TLBL:
|
2029 | ca7c2b1b | ths | case EXCP_TLBS:
|
2030 | e4474235 | pbrook | info.si_signo = TARGET_SIGSEGV; |
2031 | e4474235 | pbrook | info.si_errno = 0;
|
2032 | e4474235 | pbrook | /* XXX: check env->error_code */
|
2033 | e4474235 | pbrook | info.si_code = TARGET_SEGV_MAPERR; |
2034 | e4474235 | pbrook | info._sifields._sigfault._addr = env->CP0_BadVAddr; |
2035 | e4474235 | pbrook | queue_signal(env, info.si_signo, &info); |
2036 | e4474235 | pbrook | break;
|
2037 | 6900e84b | bellard | case EXCP_CpU:
|
2038 | 048f6b4d | bellard | case EXCP_RI:
|
2039 | bc1ad2de | bellard | info.si_signo = TARGET_SIGILL; |
2040 | bc1ad2de | bellard | info.si_errno = 0;
|
2041 | bc1ad2de | bellard | info.si_code = 0;
|
2042 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2043 | 048f6b4d | bellard | break;
|
2044 | 106ec879 | bellard | case EXCP_INTERRUPT:
|
2045 | 106ec879 | bellard | /* just indicate that signals should be handled asap */
|
2046 | 106ec879 | bellard | break;
|
2047 | d08b2a28 | pbrook | case EXCP_DEBUG:
|
2048 | d08b2a28 | pbrook | { |
2049 | d08b2a28 | pbrook | int sig;
|
2050 | d08b2a28 | pbrook | |
2051 | d08b2a28 | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2052 | d08b2a28 | pbrook | if (sig)
|
2053 | d08b2a28 | pbrook | { |
2054 | d08b2a28 | pbrook | info.si_signo = sig; |
2055 | d08b2a28 | pbrook | info.si_errno = 0;
|
2056 | d08b2a28 | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
2057 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2058 | d08b2a28 | pbrook | } |
2059 | d08b2a28 | pbrook | } |
2060 | d08b2a28 | pbrook | break;
|
2061 | 590bc601 | Paul Brook | case EXCP_SC:
|
2062 | 590bc601 | Paul Brook | if (do_store_exclusive(env)) {
|
2063 | 590bc601 | Paul Brook | info.si_signo = TARGET_SIGSEGV; |
2064 | 590bc601 | Paul Brook | info.si_errno = 0;
|
2065 | 590bc601 | Paul Brook | info.si_code = TARGET_SEGV_MAPERR; |
2066 | 590bc601 | Paul Brook | info._sifields._sigfault._addr = env->active_tc.PC; |
2067 | 590bc601 | Paul Brook | queue_signal(env, info.si_signo, &info); |
2068 | 590bc601 | Paul Brook | } |
2069 | 590bc601 | Paul Brook | break;
|
2070 | 048f6b4d | bellard | default:
|
2071 | 048f6b4d | bellard | // error:
|
2072 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
2073 | 048f6b4d | bellard | trapnr); |
2074 | 048f6b4d | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
2075 | 048f6b4d | bellard | abort(); |
2076 | 048f6b4d | bellard | } |
2077 | 048f6b4d | bellard | process_pending_signals(env); |
2078 | 048f6b4d | bellard | } |
2079 | 048f6b4d | bellard | } |
2080 | 048f6b4d | bellard | #endif
|
2081 | 048f6b4d | bellard | |
2082 | fdf9b3e8 | bellard | #ifdef TARGET_SH4
|
2083 | fdf9b3e8 | bellard | void cpu_loop (CPUState *env)
|
2084 | fdf9b3e8 | bellard | { |
2085 | fdf9b3e8 | bellard | int trapnr, ret;
|
2086 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2087 | 3b46e624 | ths | |
2088 | fdf9b3e8 | bellard | while (1) { |
2089 | fdf9b3e8 | bellard | trapnr = cpu_sh4_exec (env); |
2090 | 3b46e624 | ths | |
2091 | fdf9b3e8 | bellard | switch (trapnr) {
|
2092 | fdf9b3e8 | bellard | case 0x160: |
2093 | 0b6d3ae0 | aurel32 | env->pc += 2;
|
2094 | 5fafdf24 | ths | ret = do_syscall(env, |
2095 | 5fafdf24 | ths | env->gregs[3],
|
2096 | 5fafdf24 | ths | env->gregs[4],
|
2097 | 5fafdf24 | ths | env->gregs[5],
|
2098 | 5fafdf24 | ths | env->gregs[6],
|
2099 | 5fafdf24 | ths | env->gregs[7],
|
2100 | 5fafdf24 | ths | env->gregs[0],
|
2101 | fca743f3 | ths | env->gregs[1]);
|
2102 | 9c2a9ea1 | pbrook | env->gregs[0] = ret;
|
2103 | fdf9b3e8 | bellard | break;
|
2104 | c3b5bc8a | ths | case EXCP_INTERRUPT:
|
2105 | c3b5bc8a | ths | /* just indicate that signals should be handled asap */
|
2106 | c3b5bc8a | ths | break;
|
2107 | 355fb23d | pbrook | case EXCP_DEBUG:
|
2108 | 355fb23d | pbrook | { |
2109 | 355fb23d | pbrook | int sig;
|
2110 | 355fb23d | pbrook | |
2111 | 355fb23d | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2112 | 355fb23d | pbrook | if (sig)
|
2113 | 355fb23d | pbrook | { |
2114 | 355fb23d | pbrook | info.si_signo = sig; |
2115 | 355fb23d | pbrook | info.si_errno = 0;
|
2116 | 355fb23d | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
2117 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2118 | 355fb23d | pbrook | } |
2119 | 355fb23d | pbrook | } |
2120 | 355fb23d | pbrook | break;
|
2121 | c3b5bc8a | ths | case 0xa0: |
2122 | c3b5bc8a | ths | case 0xc0: |
2123 | c3b5bc8a | ths | info.si_signo = SIGSEGV; |
2124 | c3b5bc8a | ths | info.si_errno = 0;
|
2125 | c3b5bc8a | ths | info.si_code = TARGET_SEGV_MAPERR; |
2126 | c3b5bc8a | ths | info._sifields._sigfault._addr = env->tea; |
2127 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2128 | c3b5bc8a | ths | break;
|
2129 | c3b5bc8a | ths | |
2130 | fdf9b3e8 | bellard | default:
|
2131 | fdf9b3e8 | bellard | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2132 | fdf9b3e8 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
2133 | fdf9b3e8 | bellard | exit (1);
|
2134 | fdf9b3e8 | bellard | } |
2135 | fdf9b3e8 | bellard | process_pending_signals (env); |
2136 | fdf9b3e8 | bellard | } |
2137 | fdf9b3e8 | bellard | } |
2138 | fdf9b3e8 | bellard | #endif
|
2139 | fdf9b3e8 | bellard | |
2140 | 48733d19 | ths | #ifdef TARGET_CRIS
|
2141 | 48733d19 | ths | void cpu_loop (CPUState *env)
|
2142 | 48733d19 | ths | { |
2143 | 48733d19 | ths | int trapnr, ret;
|
2144 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2145 | 48733d19 | ths | |
2146 | 48733d19 | ths | while (1) { |
2147 | 48733d19 | ths | trapnr = cpu_cris_exec (env); |
2148 | 48733d19 | ths | switch (trapnr) {
|
2149 | 48733d19 | ths | case 0xaa: |
2150 | 48733d19 | ths | { |
2151 | 48733d19 | ths | info.si_signo = SIGSEGV; |
2152 | 48733d19 | ths | info.si_errno = 0;
|
2153 | 48733d19 | ths | /* XXX: check env->error_code */
|
2154 | 48733d19 | ths | info.si_code = TARGET_SEGV_MAPERR; |
2155 | e00c1e71 | edgar_igl | info._sifields._sigfault._addr = env->pregs[PR_EDA]; |
2156 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2157 | 48733d19 | ths | } |
2158 | 48733d19 | ths | break;
|
2159 | b6d3abda | edgar_igl | case EXCP_INTERRUPT:
|
2160 | b6d3abda | edgar_igl | /* just indicate that signals should be handled asap */
|
2161 | b6d3abda | edgar_igl | break;
|
2162 | 48733d19 | ths | case EXCP_BREAK:
|
2163 | 48733d19 | ths | ret = do_syscall(env, |
2164 | 48733d19 | ths | env->regs[9],
|
2165 | 48733d19 | ths | env->regs[10],
|
2166 | 48733d19 | ths | env->regs[11],
|
2167 | 48733d19 | ths | env->regs[12],
|
2168 | 48733d19 | ths | env->regs[13],
|
2169 | 48733d19 | ths | env->pregs[7],
|
2170 | 48733d19 | ths | env->pregs[11]);
|
2171 | 48733d19 | ths | env->regs[10] = ret;
|
2172 | 48733d19 | ths | break;
|
2173 | 48733d19 | ths | case EXCP_DEBUG:
|
2174 | 48733d19 | ths | { |
2175 | 48733d19 | ths | int sig;
|
2176 | 48733d19 | ths | |
2177 | 48733d19 | ths | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2178 | 48733d19 | ths | if (sig)
|
2179 | 48733d19 | ths | { |
2180 | 48733d19 | ths | info.si_signo = sig; |
2181 | 48733d19 | ths | info.si_errno = 0;
|
2182 | 48733d19 | ths | info.si_code = TARGET_TRAP_BRKPT; |
2183 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2184 | 48733d19 | ths | } |
2185 | 48733d19 | ths | } |
2186 | 48733d19 | ths | break;
|
2187 | 48733d19 | ths | default:
|
2188 | 48733d19 | ths | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2189 | 48733d19 | ths | cpu_dump_state(env, stderr, fprintf, 0);
|
2190 | 48733d19 | ths | exit (1);
|
2191 | 48733d19 | ths | } |
2192 | 48733d19 | ths | process_pending_signals (env); |
2193 | 48733d19 | ths | } |
2194 | 48733d19 | ths | } |
2195 | 48733d19 | ths | #endif
|
2196 | 48733d19 | ths | |
2197 | b779e29e | Edgar E. Iglesias | #ifdef TARGET_MICROBLAZE
|
2198 | b779e29e | Edgar E. Iglesias | void cpu_loop (CPUState *env)
|
2199 | b779e29e | Edgar E. Iglesias | { |
2200 | b779e29e | Edgar E. Iglesias | int trapnr, ret;
|
2201 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2202 | b779e29e | Edgar E. Iglesias | |
2203 | b779e29e | Edgar E. Iglesias | while (1) { |
2204 | b779e29e | Edgar E. Iglesias | trapnr = cpu_mb_exec (env); |
2205 | b779e29e | Edgar E. Iglesias | switch (trapnr) {
|
2206 | b779e29e | Edgar E. Iglesias | case 0xaa: |
2207 | b779e29e | Edgar E. Iglesias | { |
2208 | b779e29e | Edgar E. Iglesias | info.si_signo = SIGSEGV; |
2209 | b779e29e | Edgar E. Iglesias | info.si_errno = 0;
|
2210 | b779e29e | Edgar E. Iglesias | /* XXX: check env->error_code */
|
2211 | b779e29e | Edgar E. Iglesias | info.si_code = TARGET_SEGV_MAPERR; |
2212 | b779e29e | Edgar E. Iglesias | info._sifields._sigfault._addr = 0;
|
2213 | b779e29e | Edgar E. Iglesias | queue_signal(env, info.si_signo, &info); |
2214 | b779e29e | Edgar E. Iglesias | } |
2215 | b779e29e | Edgar E. Iglesias | break;
|
2216 | b779e29e | Edgar E. Iglesias | case EXCP_INTERRUPT:
|
2217 | b779e29e | Edgar E. Iglesias | /* just indicate that signals should be handled asap */
|
2218 | b779e29e | Edgar E. Iglesias | break;
|
2219 | b779e29e | Edgar E. Iglesias | case EXCP_BREAK:
|
2220 | b779e29e | Edgar E. Iglesias | /* Return address is 4 bytes after the call. */
|
2221 | b779e29e | Edgar E. Iglesias | env->regs[14] += 4; |
2222 | b779e29e | Edgar E. Iglesias | ret = do_syscall(env, |
2223 | b779e29e | Edgar E. Iglesias | env->regs[12],
|
2224 | b779e29e | Edgar E. Iglesias | env->regs[5],
|
2225 | b779e29e | Edgar E. Iglesias | env->regs[6],
|
2226 | b779e29e | Edgar E. Iglesias | env->regs[7],
|
2227 | b779e29e | Edgar E. Iglesias | env->regs[8],
|
2228 | b779e29e | Edgar E. Iglesias | env->regs[9],
|
2229 | b779e29e | Edgar E. Iglesias | env->regs[10]);
|
2230 | b779e29e | Edgar E. Iglesias | env->regs[3] = ret;
|
2231 | b779e29e | Edgar E. Iglesias | env->sregs[SR_PC] = env->regs[14];
|
2232 | b779e29e | Edgar E. Iglesias | break;
|
2233 | b779e29e | Edgar E. Iglesias | case EXCP_DEBUG:
|
2234 | b779e29e | Edgar E. Iglesias | { |
2235 | b779e29e | Edgar E. Iglesias | int sig;
|
2236 | b779e29e | Edgar E. Iglesias | |
2237 | b779e29e | Edgar E. Iglesias | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2238 | b779e29e | Edgar E. Iglesias | if (sig)
|
2239 | b779e29e | Edgar E. Iglesias | { |
2240 | b779e29e | Edgar E. Iglesias | info.si_signo = sig; |
2241 | b779e29e | Edgar E. Iglesias | info.si_errno = 0;
|
2242 | b779e29e | Edgar E. Iglesias | info.si_code = TARGET_TRAP_BRKPT; |
2243 | b779e29e | Edgar E. Iglesias | queue_signal(env, info.si_signo, &info); |
2244 | b779e29e | Edgar E. Iglesias | } |
2245 | b779e29e | Edgar E. Iglesias | } |
2246 | b779e29e | Edgar E. Iglesias | break;
|
2247 | b779e29e | Edgar E. Iglesias | default:
|
2248 | b779e29e | Edgar E. Iglesias | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2249 | b779e29e | Edgar E. Iglesias | cpu_dump_state(env, stderr, fprintf, 0);
|
2250 | b779e29e | Edgar E. Iglesias | exit (1);
|
2251 | b779e29e | Edgar E. Iglesias | } |
2252 | b779e29e | Edgar E. Iglesias | process_pending_signals (env); |
2253 | b779e29e | Edgar E. Iglesias | } |
2254 | b779e29e | Edgar E. Iglesias | } |
2255 | b779e29e | Edgar E. Iglesias | #endif
|
2256 | b779e29e | Edgar E. Iglesias | |
2257 | e6e5906b | pbrook | #ifdef TARGET_M68K
|
2258 | e6e5906b | pbrook | |
2259 | e6e5906b | pbrook | void cpu_loop(CPUM68KState *env)
|
2260 | e6e5906b | pbrook | { |
2261 | e6e5906b | pbrook | int trapnr;
|
2262 | e6e5906b | pbrook | unsigned int n; |
2263 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2264 | e6e5906b | pbrook | TaskState *ts = env->opaque; |
2265 | 3b46e624 | ths | |
2266 | e6e5906b | pbrook | for(;;) {
|
2267 | e6e5906b | pbrook | trapnr = cpu_m68k_exec(env); |
2268 | e6e5906b | pbrook | switch(trapnr) {
|
2269 | e6e5906b | pbrook | case EXCP_ILLEGAL:
|
2270 | e6e5906b | pbrook | { |
2271 | e6e5906b | pbrook | if (ts->sim_syscalls) {
|
2272 | e6e5906b | pbrook | uint16_t nr; |
2273 | e6e5906b | pbrook | nr = lduw(env->pc + 2);
|
2274 | e6e5906b | pbrook | env->pc += 4;
|
2275 | e6e5906b | pbrook | do_m68k_simcall(env, nr); |
2276 | e6e5906b | pbrook | } else {
|
2277 | e6e5906b | pbrook | goto do_sigill;
|
2278 | e6e5906b | pbrook | } |
2279 | e6e5906b | pbrook | } |
2280 | e6e5906b | pbrook | break;
|
2281 | a87295e8 | pbrook | case EXCP_HALT_INSN:
|
2282 | e6e5906b | pbrook | /* Semihosing syscall. */
|
2283 | a87295e8 | pbrook | env->pc += 4;
|
2284 | e6e5906b | pbrook | do_m68k_semihosting(env, env->dregs[0]);
|
2285 | e6e5906b | pbrook | break;
|
2286 | e6e5906b | pbrook | case EXCP_LINEA:
|
2287 | e6e5906b | pbrook | case EXCP_LINEF:
|
2288 | e6e5906b | pbrook | case EXCP_UNSUPPORTED:
|
2289 | e6e5906b | pbrook | do_sigill:
|
2290 | e6e5906b | pbrook | info.si_signo = SIGILL; |
2291 | e6e5906b | pbrook | info.si_errno = 0;
|
2292 | e6e5906b | pbrook | info.si_code = TARGET_ILL_ILLOPN; |
2293 | e6e5906b | pbrook | info._sifields._sigfault._addr = env->pc; |
2294 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2295 | e6e5906b | pbrook | break;
|
2296 | e6e5906b | pbrook | case EXCP_TRAP0:
|
2297 | e6e5906b | pbrook | { |
2298 | e6e5906b | pbrook | ts->sim_syscalls = 0;
|
2299 | e6e5906b | pbrook | n = env->dregs[0];
|
2300 | e6e5906b | pbrook | env->pc += 2;
|
2301 | 5fafdf24 | ths | env->dregs[0] = do_syscall(env,
|
2302 | 5fafdf24 | ths | n, |
2303 | e6e5906b | pbrook | env->dregs[1],
|
2304 | e6e5906b | pbrook | env->dregs[2],
|
2305 | e6e5906b | pbrook | env->dregs[3],
|
2306 | e6e5906b | pbrook | env->dregs[4],
|
2307 | e6e5906b | pbrook | env->dregs[5],
|
2308 | bb7ec043 | pbrook | env->aregs[0]);
|
2309 | e6e5906b | pbrook | } |
2310 | e6e5906b | pbrook | break;
|
2311 | e6e5906b | pbrook | case EXCP_INTERRUPT:
|
2312 | e6e5906b | pbrook | /* just indicate that signals should be handled asap */
|
2313 | e6e5906b | pbrook | break;
|
2314 | e6e5906b | pbrook | case EXCP_ACCESS:
|
2315 | e6e5906b | pbrook | { |
2316 | e6e5906b | pbrook | info.si_signo = SIGSEGV; |
2317 | e6e5906b | pbrook | info.si_errno = 0;
|
2318 | e6e5906b | pbrook | /* XXX: check env->error_code */
|
2319 | e6e5906b | pbrook | info.si_code = TARGET_SEGV_MAPERR; |
2320 | e6e5906b | pbrook | info._sifields._sigfault._addr = env->mmu.ar; |
2321 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2322 | e6e5906b | pbrook | } |
2323 | e6e5906b | pbrook | break;
|
2324 | e6e5906b | pbrook | case EXCP_DEBUG:
|
2325 | e6e5906b | pbrook | { |
2326 | e6e5906b | pbrook | int sig;
|
2327 | e6e5906b | pbrook | |
2328 | e6e5906b | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2329 | e6e5906b | pbrook | if (sig)
|
2330 | e6e5906b | pbrook | { |
2331 | e6e5906b | pbrook | info.si_signo = sig; |
2332 | e6e5906b | pbrook | info.si_errno = 0;
|
2333 | e6e5906b | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
2334 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2335 | e6e5906b | pbrook | } |
2336 | e6e5906b | pbrook | } |
2337 | e6e5906b | pbrook | break;
|
2338 | e6e5906b | pbrook | default:
|
2339 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
2340 | e6e5906b | pbrook | trapnr); |
2341 | e6e5906b | pbrook | cpu_dump_state(env, stderr, fprintf, 0);
|
2342 | e6e5906b | pbrook | abort(); |
2343 | e6e5906b | pbrook | } |
2344 | e6e5906b | pbrook | process_pending_signals(env); |
2345 | e6e5906b | pbrook | } |
2346 | e6e5906b | pbrook | } |
2347 | e6e5906b | pbrook | #endif /* TARGET_M68K */ |
2348 | e6e5906b | pbrook | |
2349 | 7a3148a9 | j_mayer | #ifdef TARGET_ALPHA
|
2350 | 7a3148a9 | j_mayer | void cpu_loop (CPUState *env)
|
2351 | 7a3148a9 | j_mayer | { |
2352 | e96efcfc | j_mayer | int trapnr;
|
2353 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2354 | 6049f4f8 | Richard Henderson | abi_long sysret; |
2355 | 3b46e624 | ths | |
2356 | 7a3148a9 | j_mayer | while (1) { |
2357 | 7a3148a9 | j_mayer | trapnr = cpu_alpha_exec (env); |
2358 | 3b46e624 | ths | |
2359 | 7a3148a9 | j_mayer | switch (trapnr) {
|
2360 | 7a3148a9 | j_mayer | case EXCP_RESET:
|
2361 | 7a3148a9 | j_mayer | fprintf(stderr, "Reset requested. Exit\n");
|
2362 | 7a3148a9 | j_mayer | exit(1);
|
2363 | 7a3148a9 | j_mayer | break;
|
2364 | 7a3148a9 | j_mayer | case EXCP_MCHK:
|
2365 | 7a3148a9 | j_mayer | fprintf(stderr, "Machine check exception. Exit\n");
|
2366 | 7a3148a9 | j_mayer | exit(1);
|
2367 | 7a3148a9 | j_mayer | break;
|
2368 | 7a3148a9 | j_mayer | case EXCP_ARITH:
|
2369 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGFPE; |
2370 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2371 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTINV; |
2372 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2373 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2374 | 7a3148a9 | j_mayer | break;
|
2375 | 7a3148a9 | j_mayer | case EXCP_HW_INTERRUPT:
|
2376 | 5fafdf24 | ths | fprintf(stderr, "External interrupt. Exit\n");
|
2377 | 7a3148a9 | j_mayer | exit(1);
|
2378 | 7a3148a9 | j_mayer | break;
|
2379 | 7a3148a9 | j_mayer | case EXCP_DFAULT:
|
2380 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGSEGV; |
2381 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2382 | 6049f4f8 | Richard Henderson | info.si_code = 0; /* ??? SEGV_MAPERR vs SEGV_ACCERR. */ |
2383 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2384 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2385 | 7a3148a9 | j_mayer | break;
|
2386 | 7a3148a9 | j_mayer | case EXCP_DTB_MISS_PAL:
|
2387 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU data TLB miss in PALcode\n");
|
2388 | 7a3148a9 | j_mayer | exit(1);
|
2389 | 7a3148a9 | j_mayer | break;
|
2390 | 7a3148a9 | j_mayer | case EXCP_ITB_MISS:
|
2391 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU instruction TLB miss\n");
|
2392 | 7a3148a9 | j_mayer | exit(1);
|
2393 | 7a3148a9 | j_mayer | break;
|
2394 | 7a3148a9 | j_mayer | case EXCP_ITB_ACV:
|
2395 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU instruction access violation\n");
|
2396 | 7a3148a9 | j_mayer | exit(1);
|
2397 | 7a3148a9 | j_mayer | break;
|
2398 | 7a3148a9 | j_mayer | case EXCP_DTB_MISS_NATIVE:
|
2399 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU data TLB miss\n");
|
2400 | 7a3148a9 | j_mayer | exit(1);
|
2401 | 7a3148a9 | j_mayer | break;
|
2402 | 7a3148a9 | j_mayer | case EXCP_UNALIGN:
|
2403 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGBUS; |
2404 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2405 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_BUS_ADRALN; |
2406 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2407 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2408 | 7a3148a9 | j_mayer | break;
|
2409 | 7a3148a9 | j_mayer | case EXCP_OPCDEC:
|
2410 | 6049f4f8 | Richard Henderson | do_sigill:
|
2411 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGILL; |
2412 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2413 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_ILL_ILLOPC; |
2414 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2415 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2416 | 7a3148a9 | j_mayer | break;
|
2417 | 7a3148a9 | j_mayer | case EXCP_FEN:
|
2418 | 6049f4f8 | Richard Henderson | /* No-op. Linux simply re-enables the FPU. */
|
2419 | 7a3148a9 | j_mayer | break;
|
2420 | 7a3148a9 | j_mayer | case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): |
2421 | 6049f4f8 | Richard Henderson | switch ((trapnr >> 6) | 0x80) { |
2422 | 6049f4f8 | Richard Henderson | case 0x80: |
2423 | 6049f4f8 | Richard Henderson | /* BPT */
|
2424 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGTRAP; |
2425 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2426 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_TRAP_BRKPT; |
2427 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2428 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2429 | 6049f4f8 | Richard Henderson | break;
|
2430 | 6049f4f8 | Richard Henderson | case 0x81: |
2431 | 6049f4f8 | Richard Henderson | /* BUGCHK */
|
2432 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGTRAP; |
2433 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2434 | 6049f4f8 | Richard Henderson | info.si_code = 0;
|
2435 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2436 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2437 | 6049f4f8 | Richard Henderson | break;
|
2438 | 6049f4f8 | Richard Henderson | case 0x83: |
2439 | 6049f4f8 | Richard Henderson | /* CALLSYS */
|
2440 | 6049f4f8 | Richard Henderson | trapnr = env->ir[IR_V0]; |
2441 | 6049f4f8 | Richard Henderson | sysret = do_syscall(env, trapnr, |
2442 | 6049f4f8 | Richard Henderson | env->ir[IR_A0], env->ir[IR_A1], |
2443 | 6049f4f8 | Richard Henderson | env->ir[IR_A2], env->ir[IR_A3], |
2444 | 6049f4f8 | Richard Henderson | env->ir[IR_A4], env->ir[IR_A5]); |
2445 | 6049f4f8 | Richard Henderson | if (trapnr != TARGET_NR_sigreturn
|
2446 | 6049f4f8 | Richard Henderson | && trapnr != TARGET_NR_rt_sigreturn) { |
2447 | 6049f4f8 | Richard Henderson | env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
|
2448 | 6049f4f8 | Richard Henderson | env->ir[IR_A3] = (sysret < 0);
|
2449 | 6049f4f8 | Richard Henderson | } |
2450 | 6049f4f8 | Richard Henderson | break;
|
2451 | 6049f4f8 | Richard Henderson | case 0x86: |
2452 | 6049f4f8 | Richard Henderson | /* IMB */
|
2453 | 6049f4f8 | Richard Henderson | /* ??? We can probably elide the code using page_unprotect
|
2454 | 6049f4f8 | Richard Henderson | that is checking for self-modifying code. Instead we
|
2455 | 6049f4f8 | Richard Henderson | could simply call tb_flush here. Until we work out the
|
2456 | 6049f4f8 | Richard Henderson | changes required to turn off the extra write protection,
|
2457 | 6049f4f8 | Richard Henderson | this can be a no-op. */
|
2458 | 6049f4f8 | Richard Henderson | break;
|
2459 | 6049f4f8 | Richard Henderson | case 0x9E: |
2460 | 6049f4f8 | Richard Henderson | /* RDUNIQUE */
|
2461 | 6049f4f8 | Richard Henderson | /* Handled in the translator for usermode. */
|
2462 | 6049f4f8 | Richard Henderson | abort(); |
2463 | 6049f4f8 | Richard Henderson | case 0x9F: |
2464 | 6049f4f8 | Richard Henderson | /* WRUNIQUE */
|
2465 | 6049f4f8 | Richard Henderson | /* Handled in the translator for usermode. */
|
2466 | 6049f4f8 | Richard Henderson | abort(); |
2467 | 6049f4f8 | Richard Henderson | case 0xAA: |
2468 | 6049f4f8 | Richard Henderson | /* GENTRAP */
|
2469 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGFPE; |
2470 | 6049f4f8 | Richard Henderson | switch (env->ir[IR_A0]) {
|
2471 | 6049f4f8 | Richard Henderson | case TARGET_GEN_INTOVF:
|
2472 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_INTOVF; |
2473 | 6049f4f8 | Richard Henderson | break;
|
2474 | 6049f4f8 | Richard Henderson | case TARGET_GEN_INTDIV:
|
2475 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_INTDIV; |
2476 | 6049f4f8 | Richard Henderson | break;
|
2477 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTOVF:
|
2478 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTOVF; |
2479 | 6049f4f8 | Richard Henderson | break;
|
2480 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTUND:
|
2481 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTUND; |
2482 | 6049f4f8 | Richard Henderson | break;
|
2483 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTINV:
|
2484 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTINV; |
2485 | 6049f4f8 | Richard Henderson | break;
|
2486 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTINE:
|
2487 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTRES; |
2488 | 6049f4f8 | Richard Henderson | break;
|
2489 | 6049f4f8 | Richard Henderson | case TARGET_GEN_ROPRAND:
|
2490 | 6049f4f8 | Richard Henderson | info.si_code = 0;
|
2491 | 6049f4f8 | Richard Henderson | break;
|
2492 | 6049f4f8 | Richard Henderson | default:
|
2493 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGTRAP; |
2494 | 6049f4f8 | Richard Henderson | info.si_code = 0;
|
2495 | 6049f4f8 | Richard Henderson | break;
|
2496 | 6049f4f8 | Richard Henderson | } |
2497 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2498 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2499 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2500 | 6049f4f8 | Richard Henderson | break;
|
2501 | 6049f4f8 | Richard Henderson | default:
|
2502 | 6049f4f8 | Richard Henderson | goto do_sigill;
|
2503 | 6049f4f8 | Richard Henderson | } |
2504 | 7a3148a9 | j_mayer | break;
|
2505 | 7a3148a9 | j_mayer | case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): |
2506 | 6049f4f8 | Richard Henderson | goto do_sigill;
|
2507 | 7a3148a9 | j_mayer | case EXCP_DEBUG:
|
2508 | 6049f4f8 | Richard Henderson | info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP); |
2509 | 6049f4f8 | Richard Henderson | if (info.si_signo) {
|
2510 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2511 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_TRAP_BRKPT; |
2512 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2513 | 7a3148a9 | j_mayer | } |
2514 | 7a3148a9 | j_mayer | break;
|
2515 | 7a3148a9 | j_mayer | default:
|
2516 | 7a3148a9 | j_mayer | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2517 | 7a3148a9 | j_mayer | cpu_dump_state(env, stderr, fprintf, 0);
|
2518 | 7a3148a9 | j_mayer | exit (1);
|
2519 | 7a3148a9 | j_mayer | } |
2520 | 7a3148a9 | j_mayer | process_pending_signals (env); |
2521 | 7a3148a9 | j_mayer | } |
2522 | 7a3148a9 | j_mayer | } |
2523 | 7a3148a9 | j_mayer | #endif /* TARGET_ALPHA */ |
2524 | 7a3148a9 | j_mayer | |
2525 | 8fcd3692 | blueswir1 | static void usage(void) |
2526 | 31e31b8a | bellard | { |
2527 | 4a19f1ec | pbrook | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n" |
2528 | 68d0f70e | bellard | "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n" |
2529 | b346ff46 | bellard | "Linux CPU emulator (compiled for %s emulation)\n"
|
2530 | d691f669 | bellard | "\n"
|
2531 | 68d0f70e | bellard | "Standard options:\n"
|
2532 | b12b6a18 | ths | "-h print this help\n"
|
2533 | b12b6a18 | ths | "-g port wait gdb connection to port\n"
|
2534 | b12b6a18 | ths | "-L path set the elf interpreter prefix (default=%s)\n"
|
2535 | b12b6a18 | ths | "-s size set the stack size in bytes (default=%ld)\n"
|
2536 | b12b6a18 | ths | "-cpu model select CPU (-cpu ? for list)\n"
|
2537 | b12b6a18 | ths | "-drop-ld-preload drop LD_PRELOAD for target process\n"
|
2538 | 04a6dfeb | aurel32 | "-E var=value sets/modifies targets environment variable(s)\n"
|
2539 | 04a6dfeb | aurel32 | "-U var unsets targets environment variable(s)\n"
|
2540 | 7d8cec95 | aurel32 | "-0 argv0 forces target process argv[0] to be argv0\n"
|
2541 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
2542 | 379f6698 | Paul Brook | "-B address set guest_base address to address\n"
|
2543 | 379f6698 | Paul Brook | #endif
|
2544 | 54936004 | bellard | "\n"
|
2545 | 68d0f70e | bellard | "Debug options:\n"
|
2546 | 6f1f31c0 | bellard | "-d options activate log (logfile=%s)\n"
|
2547 | b6741956 | bellard | "-p pagesize set the host page size to 'pagesize'\n"
|
2548 | 1b530a6d | aurel32 | "-singlestep always run in singlestep mode\n"
|
2549 | b01bcae6 | balrog | "-strace log system calls\n"
|
2550 | b01bcae6 | balrog | "\n"
|
2551 | 68d0f70e | bellard | "Environment variables:\n"
|
2552 | b01bcae6 | balrog | "QEMU_STRACE Print system calls and arguments similar to the\n"
|
2553 | b01bcae6 | balrog | " 'strace' program. Enable by setting to any value.\n"
|
2554 | 04a6dfeb | aurel32 | "You can use -E and -U options to set/unset environment variables\n"
|
2555 | 04a6dfeb | aurel32 | "for target process. It is possible to provide several variables\n"
|
2556 | 04a6dfeb | aurel32 | "by repeating the option. For example:\n"
|
2557 | 04a6dfeb | aurel32 | " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
|
2558 | 04a6dfeb | aurel32 | "Note that if you provide several changes to single variable\n"
|
2559 | 04a6dfeb | aurel32 | "last change will stay in effect.\n"
|
2560 | b01bcae6 | balrog | , |
2561 | b346ff46 | bellard | TARGET_ARCH, |
2562 | 5fafdf24 | ths | interp_prefix, |
2563 | 54936004 | bellard | x86_stack_size, |
2564 | 54936004 | bellard | DEBUG_LOGFILE); |
2565 | 2d18e637 | blueswir1 | exit(1);
|
2566 | 31e31b8a | bellard | } |
2567 | 31e31b8a | bellard | |
2568 | d5975363 | pbrook | THREAD CPUState *thread_env; |
2569 | 59faf6d6 | bellard | |
2570 | edf8e2af | Mika Westerberg | void task_settid(TaskState *ts)
|
2571 | edf8e2af | Mika Westerberg | { |
2572 | edf8e2af | Mika Westerberg | if (ts->ts_tid == 0) { |
2573 | 2f7bb878 | Juan Quintela | #ifdef CONFIG_USE_NPTL
|
2574 | edf8e2af | Mika Westerberg | ts->ts_tid = (pid_t)syscall(SYS_gettid); |
2575 | edf8e2af | Mika Westerberg | #else
|
2576 | edf8e2af | Mika Westerberg | /* when no threads are used, tid becomes pid */
|
2577 | edf8e2af | Mika Westerberg | ts->ts_tid = getpid(); |
2578 | edf8e2af | Mika Westerberg | #endif
|
2579 | edf8e2af | Mika Westerberg | } |
2580 | edf8e2af | Mika Westerberg | } |
2581 | edf8e2af | Mika Westerberg | |
2582 | edf8e2af | Mika Westerberg | void stop_all_tasks(void) |
2583 | edf8e2af | Mika Westerberg | { |
2584 | edf8e2af | Mika Westerberg | /*
|
2585 | edf8e2af | Mika Westerberg | * We trust that when using NPTL, start_exclusive()
|
2586 | edf8e2af | Mika Westerberg | * handles thread stopping correctly.
|
2587 | edf8e2af | Mika Westerberg | */
|
2588 | edf8e2af | Mika Westerberg | start_exclusive(); |
2589 | edf8e2af | Mika Westerberg | } |
2590 | edf8e2af | Mika Westerberg | |
2591 | c3a92833 | pbrook | /* Assumes contents are already zeroed. */
|
2592 | 624f7979 | pbrook | void init_task_state(TaskState *ts)
|
2593 | 624f7979 | pbrook | { |
2594 | 624f7979 | pbrook | int i;
|
2595 | 624f7979 | pbrook | |
2596 | 624f7979 | pbrook | ts->used = 1;
|
2597 | 624f7979 | pbrook | ts->first_free = ts->sigqueue_table; |
2598 | 624f7979 | pbrook | for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) { |
2599 | 624f7979 | pbrook | ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
|
2600 | 624f7979 | pbrook | } |
2601 | 624f7979 | pbrook | ts->sigqueue_table[i].next = NULL;
|
2602 | 624f7979 | pbrook | } |
2603 | 624f7979 | pbrook | |
2604 | 902b3d5c | malc | int main(int argc, char **argv, char **envp) |
2605 | 31e31b8a | bellard | { |
2606 | 31e31b8a | bellard | const char *filename; |
2607 | b1f9be31 | j_mayer | const char *cpu_model; |
2608 | 01ffc75b | bellard | struct target_pt_regs regs1, *regs = ®s1;
|
2609 | 31e31b8a | bellard | struct image_info info1, *info = &info1;
|
2610 | edf8e2af | Mika Westerberg | struct linux_binprm bprm;
|
2611 | 851e67a1 | bellard | TaskState ts1, *ts = &ts1; |
2612 | b346ff46 | bellard | CPUState *env; |
2613 | 586314f2 | bellard | int optind;
|
2614 | d691f669 | bellard | const char *r; |
2615 | 74c33bed | bellard | int gdbstub_port = 0; |
2616 | 04a6dfeb | aurel32 | char **target_environ, **wrk;
|
2617 | 7d8cec95 | aurel32 | char **target_argv;
|
2618 | 7d8cec95 | aurel32 | int target_argc;
|
2619 | 04a6dfeb | aurel32 | envlist_t *envlist = NULL;
|
2620 | 7d8cec95 | aurel32 | const char *argv0 = NULL; |
2621 | 7d8cec95 | aurel32 | int i;
|
2622 | fd4d81dd | Arnaud Patard | int ret;
|
2623 | b12b6a18 | ths | |
2624 | 31e31b8a | bellard | if (argc <= 1) |
2625 | 44de1b33 | pbrook | usage(); |
2626 | f801f97e | bellard | |
2627 | 902b3d5c | malc | qemu_cache_utils_init(envp); |
2628 | 902b3d5c | malc | |
2629 | cc38b844 | bellard | /* init debug */
|
2630 | cc38b844 | bellard | cpu_set_log_filename(DEBUG_LOGFILE); |
2631 | cc38b844 | bellard | |
2632 | 04a6dfeb | aurel32 | if ((envlist = envlist_create()) == NULL) { |
2633 | 04a6dfeb | aurel32 | (void) fprintf(stderr, "Unable to allocate envlist\n"); |
2634 | 04a6dfeb | aurel32 | exit(1);
|
2635 | 04a6dfeb | aurel32 | } |
2636 | 04a6dfeb | aurel32 | |
2637 | 04a6dfeb | aurel32 | /* add current environment into the list */
|
2638 | 04a6dfeb | aurel32 | for (wrk = environ; *wrk != NULL; wrk++) { |
2639 | 04a6dfeb | aurel32 | (void) envlist_setenv(envlist, *wrk);
|
2640 | 04a6dfeb | aurel32 | } |
2641 | 04a6dfeb | aurel32 | |
2642 | b1f9be31 | j_mayer | cpu_model = NULL;
|
2643 | b5ec5ce0 | john cooper | #if defined(cpudef_setup)
|
2644 | b5ec5ce0 | john cooper | cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
|
2645 | b5ec5ce0 | john cooper | #endif
|
2646 | b5ec5ce0 | john cooper | |
2647 | 586314f2 | bellard | optind = 1;
|
2648 | d691f669 | bellard | for(;;) {
|
2649 | d691f669 | bellard | if (optind >= argc)
|
2650 | d691f669 | bellard | break;
|
2651 | d691f669 | bellard | r = argv[optind]; |
2652 | d691f669 | bellard | if (r[0] != '-') |
2653 | d691f669 | bellard | break;
|
2654 | 586314f2 | bellard | optind++; |
2655 | d691f669 | bellard | r++; |
2656 | d691f669 | bellard | if (!strcmp(r, "-")) { |
2657 | d691f669 | bellard | break;
|
2658 | d691f669 | bellard | } else if (!strcmp(r, "d")) { |
2659 | e19e89a5 | bellard | int mask;
|
2660 | c7cd6a37 | blueswir1 | const CPULogItem *item;
|
2661 | 6f1f31c0 | bellard | |
2662 | 6f1f31c0 | bellard | if (optind >= argc)
|
2663 | 6f1f31c0 | bellard | break;
|
2664 | 3b46e624 | ths | |
2665 | 6f1f31c0 | bellard | r = argv[optind++]; |
2666 | 6f1f31c0 | bellard | mask = cpu_str_to_log_mask(r); |
2667 | e19e89a5 | bellard | if (!mask) {
|
2668 | e19e89a5 | bellard | printf("Log items (comma separated):\n");
|
2669 | e19e89a5 | bellard | for(item = cpu_log_items; item->mask != 0; item++) { |
2670 | e19e89a5 | bellard | printf("%-10s %s\n", item->name, item->help);
|
2671 | e19e89a5 | bellard | } |
2672 | e19e89a5 | bellard | exit(1);
|
2673 | e19e89a5 | bellard | } |
2674 | e19e89a5 | bellard | cpu_set_log(mask); |
2675 | 04a6dfeb | aurel32 | } else if (!strcmp(r, "E")) { |
2676 | 04a6dfeb | aurel32 | r = argv[optind++]; |
2677 | 04a6dfeb | aurel32 | if (envlist_setenv(envlist, r) != 0) |
2678 | 04a6dfeb | aurel32 | usage(); |
2679 | 04a6dfeb | aurel32 | } else if (!strcmp(r, "U")) { |
2680 | 04a6dfeb | aurel32 | r = argv[optind++]; |
2681 | 04a6dfeb | aurel32 | if (envlist_unsetenv(envlist, r) != 0) |
2682 | 04a6dfeb | aurel32 | usage(); |
2683 | 7d8cec95 | aurel32 | } else if (!strcmp(r, "0")) { |
2684 | 7d8cec95 | aurel32 | r = argv[optind++]; |
2685 | 7d8cec95 | aurel32 | argv0 = r; |
2686 | d691f669 | bellard | } else if (!strcmp(r, "s")) { |
2687 | 491150db | aurel32 | if (optind >= argc)
|
2688 | 491150db | aurel32 | break;
|
2689 | d691f669 | bellard | r = argv[optind++]; |
2690 | d691f669 | bellard | x86_stack_size = strtol(r, (char **)&r, 0); |
2691 | d691f669 | bellard | if (x86_stack_size <= 0) |
2692 | 44de1b33 | pbrook | usage(); |
2693 | d691f669 | bellard | if (*r == 'M') |
2694 | d691f669 | bellard | x86_stack_size *= 1024 * 1024; |
2695 | d691f669 | bellard | else if (*r == 'k' || *r == 'K') |
2696 | d691f669 | bellard | x86_stack_size *= 1024;
|
2697 | d691f669 | bellard | } else if (!strcmp(r, "L")) { |
2698 | d691f669 | bellard | interp_prefix = argv[optind++]; |
2699 | 54936004 | bellard | } else if (!strcmp(r, "p")) { |
2700 | 491150db | aurel32 | if (optind >= argc)
|
2701 | 491150db | aurel32 | break;
|
2702 | 83fb7adf | bellard | qemu_host_page_size = atoi(argv[optind++]); |
2703 | 83fb7adf | bellard | if (qemu_host_page_size == 0 || |
2704 | 83fb7adf | bellard | (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { |
2705 | 54936004 | bellard | fprintf(stderr, "page size must be a power of two\n");
|
2706 | 54936004 | bellard | exit(1);
|
2707 | 54936004 | bellard | } |
2708 | 1fddef4b | bellard | } else if (!strcmp(r, "g")) { |
2709 | 491150db | aurel32 | if (optind >= argc)
|
2710 | 491150db | aurel32 | break;
|
2711 | 74c33bed | bellard | gdbstub_port = atoi(argv[optind++]); |
2712 | c5937220 | pbrook | } else if (!strcmp(r, "r")) { |
2713 | c5937220 | pbrook | qemu_uname_release = argv[optind++]; |
2714 | b1f9be31 | j_mayer | } else if (!strcmp(r, "cpu")) { |
2715 | b1f9be31 | j_mayer | cpu_model = argv[optind++]; |
2716 | 491150db | aurel32 | if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) { |
2717 | c732abe2 | j_mayer | /* XXX: implement xxx_cpu_list for targets that still miss it */
|
2718 | b5ec5ce0 | john cooper | #if defined(cpu_list_id)
|
2719 | b5ec5ce0 | john cooper | cpu_list_id(stdout, &fprintf, "");
|
2720 | b1f9be31 | j_mayer | #endif
|
2721 | 2d18e637 | blueswir1 | exit(1);
|
2722 | b1f9be31 | j_mayer | } |
2723 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
2724 | 379f6698 | Paul Brook | } else if (!strcmp(r, "B")) { |
2725 | 379f6698 | Paul Brook | guest_base = strtol(argv[optind++], NULL, 0); |
2726 | 379f6698 | Paul Brook | have_guest_base = 1;
|
2727 | 379f6698 | Paul Brook | #endif
|
2728 | b12b6a18 | ths | } else if (!strcmp(r, "drop-ld-preload")) { |
2729 | 04a6dfeb | aurel32 | (void) envlist_unsetenv(envlist, "LD_PRELOAD"); |
2730 | 1b530a6d | aurel32 | } else if (!strcmp(r, "singlestep")) { |
2731 | 1b530a6d | aurel32 | singlestep = 1;
|
2732 | b6741956 | bellard | } else if (!strcmp(r, "strace")) { |
2733 | b6741956 | bellard | do_strace = 1;
|
2734 | 5fafdf24 | ths | } else
|
2735 | c6981055 | bellard | { |
2736 | d691f669 | bellard | usage(); |
2737 | d691f669 | bellard | } |
2738 | 586314f2 | bellard | } |
2739 | d691f669 | bellard | if (optind >= argc)
|
2740 | d691f669 | bellard | usage(); |
2741 | 586314f2 | bellard | filename = argv[optind]; |
2742 | d088d664 | aurel32 | exec_path = argv[optind]; |
2743 | 586314f2 | bellard | |
2744 | 31e31b8a | bellard | /* Zero out regs */
|
2745 | 01ffc75b | bellard | memset(regs, 0, sizeof(struct target_pt_regs)); |
2746 | 31e31b8a | bellard | |
2747 | 31e31b8a | bellard | /* Zero out image_info */
|
2748 | 31e31b8a | bellard | memset(info, 0, sizeof(struct image_info)); |
2749 | 31e31b8a | bellard | |
2750 | edf8e2af | Mika Westerberg | memset(&bprm, 0, sizeof (bprm)); |
2751 | edf8e2af | Mika Westerberg | |
2752 | 74cd30b8 | bellard | /* Scan interp_prefix dir for replacement files. */
|
2753 | 74cd30b8 | bellard | init_paths(interp_prefix); |
2754 | 74cd30b8 | bellard | |
2755 | 46027c07 | bellard | if (cpu_model == NULL) { |
2756 | aaed909a | bellard | #if defined(TARGET_I386)
|
2757 | 46027c07 | bellard | #ifdef TARGET_X86_64
|
2758 | 46027c07 | bellard | cpu_model = "qemu64";
|
2759 | 46027c07 | bellard | #else
|
2760 | 46027c07 | bellard | cpu_model = "qemu32";
|
2761 | 46027c07 | bellard | #endif
|
2762 | aaed909a | bellard | #elif defined(TARGET_ARM)
|
2763 | 088ab16c | pbrook | cpu_model = "any";
|
2764 | aaed909a | bellard | #elif defined(TARGET_M68K)
|
2765 | aaed909a | bellard | cpu_model = "any";
|
2766 | aaed909a | bellard | #elif defined(TARGET_SPARC)
|
2767 | aaed909a | bellard | #ifdef TARGET_SPARC64
|
2768 | aaed909a | bellard | cpu_model = "TI UltraSparc II";
|
2769 | aaed909a | bellard | #else
|
2770 | aaed909a | bellard | cpu_model = "Fujitsu MB86904";
|
2771 | 46027c07 | bellard | #endif
|
2772 | aaed909a | bellard | #elif defined(TARGET_MIPS)
|
2773 | aaed909a | bellard | #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
|
2774 | aaed909a | bellard | cpu_model = "20Kc";
|
2775 | aaed909a | bellard | #else
|
2776 | aaed909a | bellard | cpu_model = "24Kf";
|
2777 | aaed909a | bellard | #endif
|
2778 | aaed909a | bellard | #elif defined(TARGET_PPC)
|
2779 | 7ded4f52 | bellard | #ifdef TARGET_PPC64
|
2780 | 7ded4f52 | bellard | cpu_model = "970";
|
2781 | 7ded4f52 | bellard | #else
|
2782 | aaed909a | bellard | cpu_model = "750";
|
2783 | 7ded4f52 | bellard | #endif
|
2784 | aaed909a | bellard | #else
|
2785 | aaed909a | bellard | cpu_model = "any";
|
2786 | aaed909a | bellard | #endif
|
2787 | aaed909a | bellard | } |
2788 | 26a5f13b | bellard | cpu_exec_init_all(0);
|
2789 | 83fb7adf | bellard | /* NOTE: we need to init the CPU at this stage to get
|
2790 | 83fb7adf | bellard | qemu_host_page_size */
|
2791 | aaed909a | bellard | env = cpu_init(cpu_model); |
2792 | aaed909a | bellard | if (!env) {
|
2793 | aaed909a | bellard | fprintf(stderr, "Unable to find CPU definition\n");
|
2794 | aaed909a | bellard | exit(1);
|
2795 | aaed909a | bellard | } |
2796 | b55a37c9 | Blue Swirl | #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
|
2797 | b55a37c9 | Blue Swirl | cpu_reset(env); |
2798 | b55a37c9 | Blue Swirl | #endif
|
2799 | b55a37c9 | Blue Swirl | |
2800 | d5975363 | pbrook | thread_env = env; |
2801 | 3b46e624 | ths | |
2802 | b6741956 | bellard | if (getenv("QEMU_STRACE")) { |
2803 | b6741956 | bellard | do_strace = 1;
|
2804 | b92c47c1 | ths | } |
2805 | b92c47c1 | ths | |
2806 | 04a6dfeb | aurel32 | target_environ = envlist_to_environ(envlist, NULL);
|
2807 | 04a6dfeb | aurel32 | envlist_free(envlist); |
2808 | b12b6a18 | ths | |
2809 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
2810 | 379f6698 | Paul Brook | /*
|
2811 | 379f6698 | Paul Brook | * Now that page sizes are configured in cpu_init() we can do
|
2812 | 379f6698 | Paul Brook | * proper page alignment for guest_base.
|
2813 | 379f6698 | Paul Brook | */
|
2814 | 379f6698 | Paul Brook | guest_base = HOST_PAGE_ALIGN(guest_base); |
2815 | 14f24e14 | Richard Henderson | #endif /* CONFIG_USE_GUEST_BASE */ |
2816 | 379f6698 | Paul Brook | |
2817 | 379f6698 | Paul Brook | /*
|
2818 | 379f6698 | Paul Brook | * Read in mmap_min_addr kernel parameter. This value is used
|
2819 | 379f6698 | Paul Brook | * When loading the ELF image to determine whether guest_base
|
2820 | 14f24e14 | Richard Henderson | * is needed. It is also used in mmap_find_vma.
|
2821 | 379f6698 | Paul Brook | */
|
2822 | 14f24e14 | Richard Henderson | { |
2823 | 379f6698 | Paul Brook | FILE *fp; |
2824 | 379f6698 | Paul Brook | |
2825 | 379f6698 | Paul Brook | if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) { |
2826 | 379f6698 | Paul Brook | unsigned long tmp; |
2827 | 379f6698 | Paul Brook | if (fscanf(fp, "%lu", &tmp) == 1) { |
2828 | 379f6698 | Paul Brook | mmap_min_addr = tmp; |
2829 | 379f6698 | Paul Brook | qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
|
2830 | 379f6698 | Paul Brook | } |
2831 | 379f6698 | Paul Brook | fclose(fp); |
2832 | 379f6698 | Paul Brook | } |
2833 | 379f6698 | Paul Brook | } |
2834 | 379f6698 | Paul Brook | |
2835 | 7d8cec95 | aurel32 | /*
|
2836 | 7d8cec95 | aurel32 | * Prepare copy of argv vector for target.
|
2837 | 7d8cec95 | aurel32 | */
|
2838 | 7d8cec95 | aurel32 | target_argc = argc - optind; |
2839 | 7d8cec95 | aurel32 | target_argv = calloc(target_argc + 1, sizeof (char *)); |
2840 | 7d8cec95 | aurel32 | if (target_argv == NULL) { |
2841 | 7d8cec95 | aurel32 | (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); |
2842 | 7d8cec95 | aurel32 | exit(1);
|
2843 | 7d8cec95 | aurel32 | } |
2844 | 7d8cec95 | aurel32 | |
2845 | 7d8cec95 | aurel32 | /*
|
2846 | 7d8cec95 | aurel32 | * If argv0 is specified (using '-0' switch) we replace
|
2847 | 7d8cec95 | aurel32 | * argv[0] pointer with the given one.
|
2848 | 7d8cec95 | aurel32 | */
|
2849 | 7d8cec95 | aurel32 | i = 0;
|
2850 | 7d8cec95 | aurel32 | if (argv0 != NULL) { |
2851 | 7d8cec95 | aurel32 | target_argv[i++] = strdup(argv0); |
2852 | 7d8cec95 | aurel32 | } |
2853 | 7d8cec95 | aurel32 | for (; i < target_argc; i++) {
|
2854 | 7d8cec95 | aurel32 | target_argv[i] = strdup(argv[optind + i]); |
2855 | 7d8cec95 | aurel32 | } |
2856 | 7d8cec95 | aurel32 | target_argv[target_argc] = NULL;
|
2857 | 7d8cec95 | aurel32 | |
2858 | edf8e2af | Mika Westerberg | memset(ts, 0, sizeof(TaskState)); |
2859 | edf8e2af | Mika Westerberg | init_task_state(ts); |
2860 | edf8e2af | Mika Westerberg | /* build Task State */
|
2861 | edf8e2af | Mika Westerberg | ts->info = info; |
2862 | edf8e2af | Mika Westerberg | ts->bprm = &bprm; |
2863 | edf8e2af | Mika Westerberg | env->opaque = ts; |
2864 | edf8e2af | Mika Westerberg | task_settid(ts); |
2865 | edf8e2af | Mika Westerberg | |
2866 | fd4d81dd | Arnaud Patard | ret = loader_exec(filename, target_argv, target_environ, regs, |
2867 | fd4d81dd | Arnaud Patard | info, &bprm); |
2868 | fd4d81dd | Arnaud Patard | if (ret != 0) { |
2869 | fd4d81dd | Arnaud Patard | printf("Error %d while loading %s\n", ret, filename);
|
2870 | b12b6a18 | ths | _exit(1);
|
2871 | b12b6a18 | ths | } |
2872 | b12b6a18 | ths | |
2873 | 7d8cec95 | aurel32 | for (i = 0; i < target_argc; i++) { |
2874 | 7d8cec95 | aurel32 | free(target_argv[i]); |
2875 | 7d8cec95 | aurel32 | } |
2876 | 7d8cec95 | aurel32 | free(target_argv); |
2877 | 7d8cec95 | aurel32 | |
2878 | b12b6a18 | ths | for (wrk = target_environ; *wrk; wrk++) {
|
2879 | b12b6a18 | ths | free(*wrk); |
2880 | 31e31b8a | bellard | } |
2881 | 3b46e624 | ths | |
2882 | b12b6a18 | ths | free(target_environ); |
2883 | b12b6a18 | ths | |
2884 | 2e77eac6 | blueswir1 | if (qemu_log_enabled()) {
|
2885 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
2886 | 379f6698 | Paul Brook | qemu_log("guest_base 0x%lx\n", guest_base);
|
2887 | 379f6698 | Paul Brook | #endif
|
2888 | 2e77eac6 | blueswir1 | log_page_dump(); |
2889 | 2e77eac6 | blueswir1 | |
2890 | 2e77eac6 | blueswir1 | qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); |
2891 | 2e77eac6 | blueswir1 | qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); |
2892 | 2e77eac6 | blueswir1 | qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", |
2893 | 2e77eac6 | blueswir1 | info->start_code); |
2894 | 2e77eac6 | blueswir1 | qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", |
2895 | 2e77eac6 | blueswir1 | info->start_data); |
2896 | 2e77eac6 | blueswir1 | qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); |
2897 | 2e77eac6 | blueswir1 | qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", |
2898 | 2e77eac6 | blueswir1 | info->start_stack); |
2899 | 2e77eac6 | blueswir1 | qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); |
2900 | 2e77eac6 | blueswir1 | qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); |
2901 | 2e77eac6 | blueswir1 | } |
2902 | 31e31b8a | bellard | |
2903 | 53a5960a | pbrook | target_set_brk(info->brk); |
2904 | 31e31b8a | bellard | syscall_init(); |
2905 | 66fb9763 | bellard | signal_init(); |
2906 | 31e31b8a | bellard | |
2907 | b346ff46 | bellard | #if defined(TARGET_I386)
|
2908 | 2e255c6b | bellard | cpu_x86_set_cpl(env, 3);
|
2909 | 2e255c6b | bellard | |
2910 | 3802ce26 | bellard | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
|
2911 | 1bde465e | bellard | env->hflags |= HF_PE_MASK; |
2912 | 1bde465e | bellard | if (env->cpuid_features & CPUID_SSE) {
|
2913 | 1bde465e | bellard | env->cr[4] |= CR4_OSFXSR_MASK;
|
2914 | 1bde465e | bellard | env->hflags |= HF_OSFXSR_MASK; |
2915 | 1bde465e | bellard | } |
2916 | d2fd1af7 | bellard | #ifndef TARGET_ABI32
|
2917 | 4dbc422b | bellard | /* enable 64 bit mode if possible */
|
2918 | 4dbc422b | bellard | if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
|
2919 | 4dbc422b | bellard | fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
|
2920 | 4dbc422b | bellard | exit(1);
|
2921 | 4dbc422b | bellard | } |
2922 | d2fd1af7 | bellard | env->cr[4] |= CR4_PAE_MASK;
|
2923 | 4dbc422b | bellard | env->efer |= MSR_EFER_LMA | MSR_EFER_LME; |
2924 | d2fd1af7 | bellard | env->hflags |= HF_LMA_MASK; |
2925 | d2fd1af7 | bellard | #endif
|
2926 | 1bde465e | bellard | |
2927 | 415e561f | bellard | /* flags setup : we activate the IRQs by default as in user mode */
|
2928 | 415e561f | bellard | env->eflags |= IF_MASK; |
2929 | 3b46e624 | ths | |
2930 | 6dbad63e | bellard | /* linux register setup */
|
2931 | d2fd1af7 | bellard | #ifndef TARGET_ABI32
|
2932 | 84409ddb | j_mayer | env->regs[R_EAX] = regs->rax; |
2933 | 84409ddb | j_mayer | env->regs[R_EBX] = regs->rbx; |
2934 | 84409ddb | j_mayer | env->regs[R_ECX] = regs->rcx; |
2935 | 84409ddb | j_mayer | env->regs[R_EDX] = regs->rdx; |
2936 | 84409ddb | j_mayer | env->regs[R_ESI] = regs->rsi; |
2937 | 84409ddb | j_mayer | env->regs[R_EDI] = regs->rdi; |
2938 | 84409ddb | j_mayer | env->regs[R_EBP] = regs->rbp; |
2939 | 84409ddb | j_mayer | env->regs[R_ESP] = regs->rsp; |
2940 | 84409ddb | j_mayer | env->eip = regs->rip; |
2941 | 84409ddb | j_mayer | #else
|
2942 | 0ecfa993 | bellard | env->regs[R_EAX] = regs->eax; |
2943 | 0ecfa993 | bellard | env->regs[R_EBX] = regs->ebx; |
2944 | 0ecfa993 | bellard | env->regs[R_ECX] = regs->ecx; |
2945 | 0ecfa993 | bellard | env->regs[R_EDX] = regs->edx; |
2946 | 0ecfa993 | bellard | env->regs[R_ESI] = regs->esi; |
2947 | 0ecfa993 | bellard | env->regs[R_EDI] = regs->edi; |
2948 | 0ecfa993 | bellard | env->regs[R_EBP] = regs->ebp; |
2949 | 0ecfa993 | bellard | env->regs[R_ESP] = regs->esp; |
2950 | dab2ed99 | bellard | env->eip = regs->eip; |
2951 | 84409ddb | j_mayer | #endif
|
2952 | 31e31b8a | bellard | |
2953 | f4beb510 | bellard | /* linux interrupt setup */
|
2954 | e441570f | balrog | #ifndef TARGET_ABI32
|
2955 | e441570f | balrog | env->idt.limit = 511;
|
2956 | e441570f | balrog | #else
|
2957 | e441570f | balrog | env->idt.limit = 255;
|
2958 | e441570f | balrog | #endif
|
2959 | e441570f | balrog | env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), |
2960 | e441570f | balrog | PROT_READ|PROT_WRITE, |
2961 | e441570f | balrog | MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); |
2962 | e441570f | balrog | idt_table = g2h(env->idt.base); |
2963 | f4beb510 | bellard | set_idt(0, 0); |
2964 | f4beb510 | bellard | set_idt(1, 0); |
2965 | f4beb510 | bellard | set_idt(2, 0); |
2966 | f4beb510 | bellard | set_idt(3, 3); |
2967 | f4beb510 | bellard | set_idt(4, 3); |
2968 | ec95da6c | bellard | set_idt(5, 0); |
2969 | f4beb510 | bellard | set_idt(6, 0); |
2970 | f4beb510 | bellard | set_idt(7, 0); |
2971 | f4beb510 | bellard | set_idt(8, 0); |
2972 | f4beb510 | bellard | set_idt(9, 0); |
2973 | f4beb510 | bellard | set_idt(10, 0); |
2974 | f4beb510 | bellard | set_idt(11, 0); |
2975 | f4beb510 | bellard | set_idt(12, 0); |
2976 | f4beb510 | bellard | set_idt(13, 0); |
2977 | f4beb510 | bellard | set_idt(14, 0); |
2978 | f4beb510 | bellard | set_idt(15, 0); |
2979 | f4beb510 | bellard | set_idt(16, 0); |
2980 | f4beb510 | bellard | set_idt(17, 0); |
2981 | f4beb510 | bellard | set_idt(18, 0); |
2982 | f4beb510 | bellard | set_idt(19, 0); |
2983 | f4beb510 | bellard | set_idt(0x80, 3); |
2984 | f4beb510 | bellard | |
2985 | 6dbad63e | bellard | /* linux segment setup */
|
2986 | 8d18e893 | bellard | { |
2987 | 8d18e893 | bellard | uint64_t *gdt_table; |
2988 | e441570f | balrog | env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES, |
2989 | e441570f | balrog | PROT_READ|PROT_WRITE, |
2990 | e441570f | balrog | MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); |
2991 | 8d18e893 | bellard | env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1; |
2992 | e441570f | balrog | gdt_table = g2h(env->gdt.base); |
2993 | d2fd1af7 | bellard | #ifdef TARGET_ABI32
|
2994 | 8d18e893 | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
2995 | 8d18e893 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
2996 | 8d18e893 | bellard | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
2997 | d2fd1af7 | bellard | #else
|
2998 | d2fd1af7 | bellard | /* 64 bit code segment */
|
2999 | d2fd1af7 | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
3000 | d2fd1af7 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
3001 | d2fd1af7 | bellard | DESC_L_MASK | |
3002 | d2fd1af7 | bellard | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
3003 | d2fd1af7 | bellard | #endif
|
3004 | 8d18e893 | bellard | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, |
3005 | 8d18e893 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
3006 | 8d18e893 | bellard | (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
3007 | 8d18e893 | bellard | } |
3008 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_CS, __USER_CS); |
3009 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_SS, __USER_DS); |
3010 | d2fd1af7 | bellard | #ifdef TARGET_ABI32
|
3011 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_DS, __USER_DS); |
3012 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_ES, __USER_DS); |
3013 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_FS, __USER_DS); |
3014 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_GS, __USER_DS); |
3015 | d6eb40f6 | ths | /* This hack makes Wine work... */
|
3016 | d6eb40f6 | ths | env->segs[R_FS].selector = 0;
|
3017 | d2fd1af7 | bellard | #else
|
3018 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_DS, 0);
|
3019 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_ES, 0);
|
3020 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_FS, 0);
|
3021 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_GS, 0);
|
3022 | d2fd1af7 | bellard | #endif
|
3023 | b346ff46 | bellard | #elif defined(TARGET_ARM)
|
3024 | b346ff46 | bellard | { |
3025 | b346ff46 | bellard | int i;
|
3026 | b5ff1b31 | bellard | cpsr_write(env, regs->uregs[16], 0xffffffff); |
3027 | b346ff46 | bellard | for(i = 0; i < 16; i++) { |
3028 | b346ff46 | bellard | env->regs[i] = regs->uregs[i]; |
3029 | b346ff46 | bellard | } |
3030 | b346ff46 | bellard | } |
3031 | 93ac68bc | bellard | #elif defined(TARGET_SPARC)
|
3032 | 060366c5 | bellard | { |
3033 | 060366c5 | bellard | int i;
|
3034 | 060366c5 | bellard | env->pc = regs->pc; |
3035 | 060366c5 | bellard | env->npc = regs->npc; |
3036 | 060366c5 | bellard | env->y = regs->y; |
3037 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
3038 | 060366c5 | bellard | env->gregs[i] = regs->u_regs[i]; |
3039 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
3040 | 060366c5 | bellard | env->regwptr[i] = regs->u_regs[i + 8];
|
3041 | 060366c5 | bellard | } |
3042 | 67867308 | bellard | #elif defined(TARGET_PPC)
|
3043 | 67867308 | bellard | { |
3044 | 67867308 | bellard | int i;
|
3045 | 3fc6c082 | bellard | |
3046 | 0411a972 | j_mayer | #if defined(TARGET_PPC64)
|
3047 | 0411a972 | j_mayer | #if defined(TARGET_ABI32)
|
3048 | 0411a972 | j_mayer | env->msr &= ~((target_ulong)1 << MSR_SF);
|
3049 | e85e7c6e | j_mayer | #else
|
3050 | 0411a972 | j_mayer | env->msr |= (target_ulong)1 << MSR_SF;
|
3051 | 0411a972 | j_mayer | #endif
|
3052 | 84409ddb | j_mayer | #endif
|
3053 | 67867308 | bellard | env->nip = regs->nip; |
3054 | 67867308 | bellard | for(i = 0; i < 32; i++) { |
3055 | 67867308 | bellard | env->gpr[i] = regs->gpr[i]; |
3056 | 67867308 | bellard | } |
3057 | 67867308 | bellard | } |
3058 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
|
3059 | e6e5906b | pbrook | { |
3060 | e6e5906b | pbrook | env->pc = regs->pc; |
3061 | e6e5906b | pbrook | env->dregs[0] = regs->d0;
|
3062 | e6e5906b | pbrook | env->dregs[1] = regs->d1;
|
3063 | e6e5906b | pbrook | env->dregs[2] = regs->d2;
|
3064 | e6e5906b | pbrook | env->dregs[3] = regs->d3;
|
3065 | e6e5906b | pbrook | env->dregs[4] = regs->d4;
|
3066 | e6e5906b | pbrook | env->dregs[5] = regs->d5;
|
3067 | e6e5906b | pbrook | env->dregs[6] = regs->d6;
|
3068 | e6e5906b | pbrook | env->dregs[7] = regs->d7;
|
3069 | e6e5906b | pbrook | env->aregs[0] = regs->a0;
|
3070 | e6e5906b | pbrook | env->aregs[1] = regs->a1;
|
3071 | e6e5906b | pbrook | env->aregs[2] = regs->a2;
|
3072 | e6e5906b | pbrook | env->aregs[3] = regs->a3;
|
3073 | e6e5906b | pbrook | env->aregs[4] = regs->a4;
|
3074 | e6e5906b | pbrook | env->aregs[5] = regs->a5;
|
3075 | e6e5906b | pbrook | env->aregs[6] = regs->a6;
|
3076 | e6e5906b | pbrook | env->aregs[7] = regs->usp;
|
3077 | e6e5906b | pbrook | env->sr = regs->sr; |
3078 | e6e5906b | pbrook | ts->sim_syscalls = 1;
|
3079 | e6e5906b | pbrook | } |
3080 | b779e29e | Edgar E. Iglesias | #elif defined(TARGET_MICROBLAZE)
|
3081 | b779e29e | Edgar E. Iglesias | { |
3082 | b779e29e | Edgar E. Iglesias | env->regs[0] = regs->r0;
|
3083 | b779e29e | Edgar E. Iglesias | env->regs[1] = regs->r1;
|
3084 | b779e29e | Edgar E. Iglesias | env->regs[2] = regs->r2;
|
3085 | b779e29e | Edgar E. Iglesias | env->regs[3] = regs->r3;
|
3086 | b779e29e | Edgar E. Iglesias | env->regs[4] = regs->r4;
|
3087 | b779e29e | Edgar E. Iglesias | env->regs[5] = regs->r5;
|
3088 | b779e29e | Edgar E. Iglesias | env->regs[6] = regs->r6;
|
3089 | b779e29e | Edgar E. Iglesias | env->regs[7] = regs->r7;
|
3090 | b779e29e | Edgar E. Iglesias | env->regs[8] = regs->r8;
|
3091 | b779e29e | Edgar E. Iglesias | env->regs[9] = regs->r9;
|
3092 | b779e29e | Edgar E. Iglesias | env->regs[10] = regs->r10;
|
3093 | b779e29e | Edgar E. Iglesias | env->regs[11] = regs->r11;
|
3094 | b779e29e | Edgar E. Iglesias | env->regs[12] = regs->r12;
|
3095 | b779e29e | Edgar E. Iglesias | env->regs[13] = regs->r13;
|
3096 | b779e29e | Edgar E. Iglesias | env->regs[14] = regs->r14;
|
3097 | b779e29e | Edgar E. Iglesias | env->regs[15] = regs->r15;
|
3098 | b779e29e | Edgar E. Iglesias | env->regs[16] = regs->r16;
|
3099 | b779e29e | Edgar E. Iglesias | env->regs[17] = regs->r17;
|
3100 | b779e29e | Edgar E. Iglesias | env->regs[18] = regs->r18;
|
3101 | b779e29e | Edgar E. Iglesias | env->regs[19] = regs->r19;
|
3102 | b779e29e | Edgar E. Iglesias | env->regs[20] = regs->r20;
|
3103 | b779e29e | Edgar E. Iglesias | env->regs[21] = regs->r21;
|
3104 | b779e29e | Edgar E. Iglesias | env->regs[22] = regs->r22;
|
3105 | b779e29e | Edgar E. Iglesias | env->regs[23] = regs->r23;
|
3106 | b779e29e | Edgar E. Iglesias | env->regs[24] = regs->r24;
|
3107 | b779e29e | Edgar E. Iglesias | env->regs[25] = regs->r25;
|
3108 | b779e29e | Edgar E. Iglesias | env->regs[26] = regs->r26;
|
3109 | b779e29e | Edgar E. Iglesias | env->regs[27] = regs->r27;
|
3110 | b779e29e | Edgar E. Iglesias | env->regs[28] = regs->r28;
|
3111 | b779e29e | Edgar E. Iglesias | env->regs[29] = regs->r29;
|
3112 | b779e29e | Edgar E. Iglesias | env->regs[30] = regs->r30;
|
3113 | b779e29e | Edgar E. Iglesias | env->regs[31] = regs->r31;
|
3114 | b779e29e | Edgar E. Iglesias | env->sregs[SR_PC] = regs->pc; |
3115 | b779e29e | Edgar E. Iglesias | } |
3116 | 048f6b4d | bellard | #elif defined(TARGET_MIPS)
|
3117 | 048f6b4d | bellard | { |
3118 | 048f6b4d | bellard | int i;
|
3119 | 048f6b4d | bellard | |
3120 | 048f6b4d | bellard | for(i = 0; i < 32; i++) { |
3121 | b5dc7732 | ths | env->active_tc.gpr[i] = regs->regs[i]; |
3122 | 048f6b4d | bellard | } |
3123 | b5dc7732 | ths | env->active_tc.PC = regs->cp0_epc; |
3124 | 048f6b4d | bellard | } |
3125 | fdf9b3e8 | bellard | #elif defined(TARGET_SH4)
|
3126 | fdf9b3e8 | bellard | { |
3127 | fdf9b3e8 | bellard | int i;
|
3128 | fdf9b3e8 | bellard | |
3129 | fdf9b3e8 | bellard | for(i = 0; i < 16; i++) { |
3130 | fdf9b3e8 | bellard | env->gregs[i] = regs->regs[i]; |
3131 | fdf9b3e8 | bellard | } |
3132 | fdf9b3e8 | bellard | env->pc = regs->pc; |
3133 | fdf9b3e8 | bellard | } |
3134 | 7a3148a9 | j_mayer | #elif defined(TARGET_ALPHA)
|
3135 | 7a3148a9 | j_mayer | { |
3136 | 7a3148a9 | j_mayer | int i;
|
3137 | 7a3148a9 | j_mayer | |
3138 | 7a3148a9 | j_mayer | for(i = 0; i < 28; i++) { |
3139 | 992f48a0 | blueswir1 | env->ir[i] = ((abi_ulong *)regs)[i]; |
3140 | 7a3148a9 | j_mayer | } |
3141 | dad081ee | Richard Henderson | env->ir[IR_SP] = regs->usp; |
3142 | 7a3148a9 | j_mayer | env->pc = regs->pc; |
3143 | 7a3148a9 | j_mayer | } |
3144 | 48733d19 | ths | #elif defined(TARGET_CRIS)
|
3145 | 48733d19 | ths | { |
3146 | 48733d19 | ths | env->regs[0] = regs->r0;
|
3147 | 48733d19 | ths | env->regs[1] = regs->r1;
|
3148 | 48733d19 | ths | env->regs[2] = regs->r2;
|
3149 | 48733d19 | ths | env->regs[3] = regs->r3;
|
3150 | 48733d19 | ths | env->regs[4] = regs->r4;
|
3151 | 48733d19 | ths | env->regs[5] = regs->r5;
|
3152 | 48733d19 | ths | env->regs[6] = regs->r6;
|
3153 | 48733d19 | ths | env->regs[7] = regs->r7;
|
3154 | 48733d19 | ths | env->regs[8] = regs->r8;
|
3155 | 48733d19 | ths | env->regs[9] = regs->r9;
|
3156 | 48733d19 | ths | env->regs[10] = regs->r10;
|
3157 | 48733d19 | ths | env->regs[11] = regs->r11;
|
3158 | 48733d19 | ths | env->regs[12] = regs->r12;
|
3159 | 48733d19 | ths | env->regs[13] = regs->r13;
|
3160 | 48733d19 | ths | env->regs[14] = info->start_stack;
|
3161 | 48733d19 | ths | env->regs[15] = regs->acr;
|
3162 | 48733d19 | ths | env->pc = regs->erp; |
3163 | 48733d19 | ths | } |
3164 | b346ff46 | bellard | #else
|
3165 | b346ff46 | bellard | #error unsupported target CPU
|
3166 | b346ff46 | bellard | #endif
|
3167 | 31e31b8a | bellard | |
3168 | a87295e8 | pbrook | #if defined(TARGET_ARM) || defined(TARGET_M68K)
|
3169 | a87295e8 | pbrook | ts->stack_base = info->start_stack; |
3170 | a87295e8 | pbrook | ts->heap_base = info->brk; |
3171 | a87295e8 | pbrook | /* This will be filled in on the first SYS_HEAPINFO call. */
|
3172 | a87295e8 | pbrook | ts->heap_limit = 0;
|
3173 | a87295e8 | pbrook | #endif
|
3174 | a87295e8 | pbrook | |
3175 | 74c33bed | bellard | if (gdbstub_port) {
|
3176 | 74c33bed | bellard | gdbserver_start (gdbstub_port); |
3177 | 1fddef4b | bellard | gdb_handlesig(env, 0);
|
3178 | 1fddef4b | bellard | } |
3179 | 1b6b029e | bellard | cpu_loop(env); |
3180 | 1b6b029e | bellard | /* never exits */
|
3181 | 31e31b8a | bellard | return 0; |
3182 | 31e31b8a | bellard | } |