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push CPUID level to 4 to allow Intel multicore decoding
Intel CPUs store the number of cores in CPUID leaf 4. So pushthe maxleaf value to 4 to allow the guests access to this leaf.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
set CPUID bits to present cores and threads topology
Controlled by the enhanced -smp option set the CPUID bits to present theguest the desired topology. This is vendor specific, but (with the exceptionof the CMP_LEGACY bit) not conflicting, so we set all bits everytime....
allow overriding of CPUID level on command line
The CPUID level determines how many CPUID leafs are exposed to the guest.Some features (like multi-core) cannot be propagated without the properlevel, but guests maybe confused by bogus entries in some leafs....
introduce kvm64 CPU
In addition to the TCG based qemu64 type let's introduce a kvm64 CPU type,which is the least common denominator of all KVM-capable x86-CPUs(based on Intel Pentium 4 Prescott). It can be used as a base typefor migration.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>...
Unbreak large mem support by removing kqemu
kqemu introduces a number of restrictions on the i386 target. The worst is thatit prevents large memory from working in the default build.
Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on...
Only allow -cpu host when KVM is enabled
-cpu host is not at all useful when using tcg.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Initialize cpuid variables
This causes a build break when !KVM.
omit 3DNOW! CPUID bits from qemu64 CPU model
Since we recently do not disable 3DNOW! support anymore, we shouldavoid setting the bits in the default qemu64 CPU model to easemigration. TCG does not support it anyway and even AMD deprecatesit's usage nowadays....
Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
gdbstub: x86: Support for setting segment registers
This allows to set segment registers via gdb also in system emulationmode. Basic sanity checks are applied and nothing is changed if theyfail. But screwing up the target via this interface will never be...
QEMU: MCE: Add MCE simulation to qemu/tcg
- MCE features are initialized when VCPU is intialized according to CPUID.- A monitor command "mce" is added to inject a MCE.- A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE.
aliguori: fix build for linux-user...
Suppress a GCC warning
allow hypervisor CPUID bit to be overriden
KVM defaults to the hypervisor CPUID bit to be set, whereas pureQEMU clears it. On some occasions one wants to set or clear it theother way round (for instance to get HyperV running inside a guest).
Move the bit-set to be done before the command line parsing and...
introduce -cpu host target
Although the guest's CPUID bits can be controlled in a fine grained wayin QEMU, a simple way to inject the host CPU is missing. This is handyfor KVM desktop virtualization, where one wants the guest to support thefull host feature set....
CPUID Fn8000_0001.EAX is family/model/stepping, not features
fix KVMs GET_SUPPORTED_CPUID feature usage
If we want to trim the user provided CPUID bits for KVM to be not greaterthan that of the host, we should not remove the bits after we sentthem to the kernel.This fixes the masking of features that are not present on the host by...
remove CPUID host hacks
KVM provides an in-kernel feature to disable CPUID bits that are notpresent in the current host. So there is no need here to duplicate thiswork. Additionally allows 3DNow! on capable processors, since therestriction seems to apply to QEMU/TCG only....
Handle init/sipi in a main cpu exec loop. (v2)
This should fix compilation problem in case of CONFIG_USER_ONLY.
Currently INIT/SIPI is handled in the context of CPU that sends IPI.This patch changes this to handle them like all other events in a maincpu exec loop. When KVM will gain thread per vcpu capability it will...
allow CPUID vendor override
KVM-enabled QEMU will always report the vendor ID of the physical CPU it isrunning on. Allow to override this if explicitly requested on thecommand line. It will not suffice to name a CPU type (like -cpu phenom),but you have to explicitly set the vendor: -cpu phenom,vendor=AuthenticAMD...
QEMU KVM: i386: Fix the cpu reset state
As per the IA32 processor manual, the accessed bit is set to 1 in theprocessor state after reset. qemu pc cpu_reset code was missing thisaccessed bit setting.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>...
Include assert.h from qemu-common.h
Include assert.h from qemu-common.h and remove other direct uses.cpu-all.h still need to include it because of the dyngen-exec.h hacks
Signed-off-by: Paul Brook <paul@codesourcery.com>
Remove noisy printf when KVM masks CPU features
Make x86 cpuid feature names available in file scope
To be used later.
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Fix x86 feature modifications for features that set multiple bits
QEMU allows adding or removing cpu features by using the syntax '-cpu +feature'or '-cpu -feature'. Some cpuid features cause more than one bit to be set orcleared; but QEMU stops after just one bit has been modified, causing the...
kvm: Trim cpu features not supported by kvm
Remove cpu features that are not supported by kvm from the cpuid featuresreported to the guest.
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
kqemu: merge CONFIG_KQEMU and USE_KQEMU
Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g".
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Enhanced dump of segment registers (Jan Kiszka)
Parse the descriptor flags that segment registers refer to and show theresult in a more human-friendly format. The output of info registers eg.then looks like this:
[...]ES =007b 00000000 ffffffff 00cff300 DPL=3 DS [-WA]...
Fix cpuid KVM crash on i386 (Lubomir Rintel)
Cpuid should return into vec, not overwrite past address in count.Changeset 6565 broke this.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6689 c046a42c-6fe2-441c-8c8c-71466251a162
Fix "info registers" under kvm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6684 c046a42c-6fe2-441c-8c8c-71466251a162
KVM: CPUID takes ecx as input value for some functions (Amit Shah)
The CPUID instruction takes the value of ECX as an input parameterin addition to the value of EAX as the count for functions 4, 0xband 0xd. Make sure we pass the value to the instruction....
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
Add phenom CPU descriptor (Alexander Graf)
As part of my ongoing effort to make nested SVM useful, I started working to getVMware ESX run inside KVM.
VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulatea machine that officially supports SVM and should thus exploit the powers of...
Fix a typo in ext2_feature_name (Carl-Daniel Hailfinger)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6474 c046a42c-6fe2-441c-8c8c-71466251a162
Log reset events (Jan Kiszka)
Original idea&code by Kevin Wolf, split-up in two patches and added morearchs.
This patch introduces a flag to log CPU resets. Useful for tracingunexpected resets (such as those triggered by x86 triple faults).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplatein most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
Use the ARRAY_SIZE() macro where appropriate.
Change from v1: Avoid changing the existing coding style in certain files.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
x86 cleanup
Remove some unnecessary includes, add needed includes, move prototypes tocpu.h to suppress missing prototype warnings.
Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock,cpu_unlock, restore_native_fp_state, save_native_fp_state)....
Fix register name typo in dumping debug registers (Jan Kiszka)
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5855 c046a42c-6fe2-441c-8c8c-71466251a162
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying thecode and also fixing a use after release issue incpu_break/watchpoint_remove_all.
x86: Dump debug registers (Jan Kiszka)
As the debug registers are no longer dummies, let's include theircurrent state into the 'info registers' output and other register dumps.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
x86: Debug register emulation (Jan Kiszka)
Built on top of previously enhanced breakpoint/watchpoint support, thispatch adds full debug register emulation for the x86 architecture.
Many corner cases were considered, and the result was successfullytested inside a Linux guest with gdb, but I won't be surprised if one...
TCG variable type checking.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
x86: fix warning without CONFIG_KVM (Mark McLoughlin)
Warning is:
target-i386/helper.c: In function `cpu_x86_cpuid': target-i386/helper.c:1373: warning: implicit declaration of function `host_cpuid'
Signed-off-by: Mark McLoughlin <markmc@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Fix CPUID ext2 features masking (Avi Kivity)
Typo. Exposes rdtscp which kills some guests.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5717 c046a42c-6fe2-441c-8c8c-71466251a162
x86 CPUID extended family/model (Andre Przywara).
x86 CPUs feature extended family/model bits in CPUID leaf0000_0001|EAX. Refer to page 10 in:http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf
Those bits are necessary to model newer AMD CPUs:...
Add KVM support to QEMU
This patch adds very basic KVM support. KVM is a kernel module for Linux thatallows userspace programs to make use of hardware virtualization support. Itcurrent supports x86 hardware virtualization using Intel VT-x or AMD-V. It...
Split CPUID from op_helper
KVM needs to call CPUID from outside of the TCG code. This patchsplits out the CPUID logic into a separate helper that both the ophelper and KVM can call.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5626 c046a42c-6fe2-441c-8c8c-71466251a162
Fix cpuid ext_features value for Atom N270 (Blue Swirl).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5558 c046a42c-6fe2-441c-8c8c-71466251a162
target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried toresemble the original as closely as possible and document what featuresare missing still. This patch enables the use of a recent CPU definitionon 32 bit platforms....
My core2duo patch introduced a vague statement of "missing features" inthe CPUID specification. This patch addresses this by specifying exactlywhat is missing.While going along the missing CPUID entries I also stumbled acrossinvalid and missing CPUID #defines while comparing them to the Intel...
Rename -cpu atom to -cpu n270.
As noticed by Alexander Graf Atom is a name of a series with varyingfeatures.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5341 c046a42c-6fe2-441c-8c8c-71466251a162
Add Atom (x86) cpu identification.
Also add SSSE3 to Core2 features.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5319 c046a42c-6fe2-441c-8c8c-71466251a162
Core 2 Duo specification (Alexander Graf).
This patch adds a Core 2 Duo CPU to the available CPU types. The CPUdefinition tries to resemble a real CPU as good as possible, whilst notexposing features qemu does not implement.The patch also includes some minor additions that Core 2 Duo CPUs have:...
Clean up vendor identification (Alexander Graf).
Right now CPU vendor identification contains a lot of magic numbers. Thepatch cleans them up to defines, so we can identify the CPU later onwithout copying magic numbers.
Signed-off-by: Alexander Graf <agraf@suse.de>...
Use qemu_free() on env instead of free.
Fixes a glibc Abort on qemu-x86_64 -cpu foo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5314 c046a42c-6fe2-441c-8c8c-71466251a162
i386: Catch all non-present ptes in cpu_get_phys_page_debug (Jan Kiszka)
It helps debugging guests when yet unmapped pages are correctly reportedas, well, unmapped.
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Fix task register type after reset (Avi Kivity)
Obvious typo that breaks reboots.
Signed-off-by: Avi Kivity <avi@qumranet.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4926 c046a42c-6fe2-441c-8c8c-71466251a162
Fix constant truncation, spotted by Jindrich Makovicka.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4832 c046a42c-6fe2-441c-8c8c-71466251a162
added model_id and vendor cpu model options (initial patch by Dan Kenigsberg) - various cleanup
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4757 c046a42c-6fe2-441c-8c8c-71466251a162
Fix i386 segment descriptor types on reset (Avi Kivity)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4686 c046a42c-6fe2-441c-8c8c-71466251a162
reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
moved halted field to CPU_COMMON
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
SVM rework
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
consistent naming for i386 TCG helper file
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4603 c046a42c-6fe2-441c-8c8c-71466251a162
Fix off-by-one unwinding error.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
cmpxchg8b fix - added cmpxchg16b
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4522 c046a42c-6fe2-441c-8c8c-71466251a162
fxsave/fxrstor 64 bit fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4520 c046a42c-6fe2-441c-8c8c-71466251a162
convert eflags manipulation insns to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4515 c046a42c-6fe2-441c-8c8c-71466251a162
converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4513 c046a42c-6fe2-441c-8c8c-71466251a162
converted INTO/CMPXCHG8B to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4510 c046a42c-6fe2-441c-8c8c-71466251a162
converted MUL/IMUL to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4508 c046a42c-6fe2-441c-8c8c-71466251a162
BSR/BSF TCG conversion
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4477 c046a42c-6fe2-441c-8c8c-71466251a162
moved eflags computation outside op.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4472 c046a42c-6fe2-441c-8c8c-71466251a162
converted condition code supprot to TCG - converted shift ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162
converted more helpers to TCG - fixed some SVM issues
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162
converted more helpers to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4447 c046a42c-6fe2-441c-8c8c-71466251a162
converted x87 FPU ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4444 c046a42c-6fe2-441c-8c8c-71466251a162
converted SSE/MMX ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4441 c046a42c-6fe2-441c-8c8c-71466251a162
char is only for strings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4436 c046a42c-6fe2-441c-8c8c-71466251a162
Use correct types to enable > 2G support, based on a patch fromAnthony Liguori.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Introduce CPU_INTERRUPT_NMI
(Jan Kiszka)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4205 c046a42c-6fe2-441c-8c8c-71466251a162
Remove unused phys_ram_base definition from target-i386/helper.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4189 c046a42c-6fe2-441c-8c8c-71466251a162
x86-64: recompute DF after eflags has been modified when emulating SYSCALL
(Jakub Jermar)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4120 c046a42c-6fe2-441c-8c8c-71466251a162
Fix some functions declared () rather than (void) (Ian Jackson)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4029 c046a42c-6fe2-441c-8c8c-71466251a162
NMI and INTR events injection should not be handled as software interrupts (Bernhard Kauer).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3952 c046a42c-6fe2-441c-8c8c-71466251a162
Make SVM env->cr8 a valid register (patch from TeLeMan).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3950 c046a42c-6fe2-441c-8c8c-71466251a162
use the TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
SVM enabled processor should provide cpuid Fn8000_000A (Bernhard Kauer).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3844 c046a42c-6fe2-441c-8c8c-71466251a162
Make SVM IOIO intercept check all needed bits, by Bernhard Kauer.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3792 c046a42c-6fe2-441c-8c8c-71466251a162
Add rdpmc SVM intercept, by Bernhard Kauer.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3791 c046a42c-6fe2-441c-8c8c-71466251a162
Add statics and missing #includes for prototypes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3683 c046a42c-6fe2-441c-8c8c-71466251a162
x86_64 linux user emulation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3646 c046a42c-6fe2-441c-8c8c-71466251a162
For consistency, move muls64 / mulu64 prototypes to host-utils.hMake x86_64 optimized versions inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3523 c046a42c-6fe2-441c-8c8c-71466251a162
Adjust s390 addresses (the MSB is defined as "to be ignored").
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
The other half of the mul64 rework. Sorry for the breakage, I committedan incomplete version of what I tested.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3454 c046a42c-6fe2-441c-8c8c-71466251a162
Replace is_user variable with mmu_idx in softmmu core, allowing support of more than 2 mmu access modes.Add backward compatibility is_user variable in targets code when needed.Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions....
SVM VINTR fix, by Alexander Graf.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3248 c046a42c-6fe2-441c-8c8c-71466251a162
SVM Support, by Alexander Graf.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3210 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162