root / hw / mc146818rtc.c @ 4721c457
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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU MC146818 RTC emulation
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3 | 80cabfad | bellard | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 80cabfad | bellard | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 80cabfad | bellard | #include "vl.h" |
25 | 80cabfad | bellard | |
26 | 80cabfad | bellard | //#define DEBUG_CMOS
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27 | 80cabfad | bellard | |
28 | 80cabfad | bellard | #define RTC_SECONDS 0 |
29 | 80cabfad | bellard | #define RTC_SECONDS_ALARM 1 |
30 | 80cabfad | bellard | #define RTC_MINUTES 2 |
31 | 80cabfad | bellard | #define RTC_MINUTES_ALARM 3 |
32 | 80cabfad | bellard | #define RTC_HOURS 4 |
33 | 80cabfad | bellard | #define RTC_HOURS_ALARM 5 |
34 | 80cabfad | bellard | #define RTC_ALARM_DONT_CARE 0xC0 |
35 | 80cabfad | bellard | |
36 | 80cabfad | bellard | #define RTC_DAY_OF_WEEK 6 |
37 | 80cabfad | bellard | #define RTC_DAY_OF_MONTH 7 |
38 | 80cabfad | bellard | #define RTC_MONTH 8 |
39 | 80cabfad | bellard | #define RTC_YEAR 9 |
40 | 80cabfad | bellard | |
41 | 80cabfad | bellard | #define RTC_REG_A 10 |
42 | 80cabfad | bellard | #define RTC_REG_B 11 |
43 | 80cabfad | bellard | #define RTC_REG_C 12 |
44 | 80cabfad | bellard | #define RTC_REG_D 13 |
45 | 80cabfad | bellard | |
46 | dff38e7b | bellard | #define REG_A_UIP 0x80 |
47 | 80cabfad | bellard | |
48 | dff38e7b | bellard | #define REG_B_SET 0x80 |
49 | dff38e7b | bellard | #define REG_B_PIE 0x40 |
50 | dff38e7b | bellard | #define REG_B_AIE 0x20 |
51 | dff38e7b | bellard | #define REG_B_UIE 0x10 |
52 | dff38e7b | bellard | |
53 | dff38e7b | bellard | struct RTCState {
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54 | dff38e7b | bellard | uint8_t cmos_data[128];
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55 | dff38e7b | bellard | uint8_t cmos_index; |
56 | dff38e7b | bellard | int current_time; /* in seconds */ |
57 | dff38e7b | bellard | int irq;
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58 | dff38e7b | bellard | uint8_t buf_data[10]; /* buffered data */ |
59 | dff38e7b | bellard | /* periodic timer */
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60 | dff38e7b | bellard | QEMUTimer *periodic_timer; |
61 | dff38e7b | bellard | int64_t next_periodic_time; |
62 | dff38e7b | bellard | /* second update */
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63 | dff38e7b | bellard | int64_t next_second_time; |
64 | dff38e7b | bellard | QEMUTimer *second_timer; |
65 | dff38e7b | bellard | QEMUTimer *second_timer2; |
66 | dff38e7b | bellard | }; |
67 | dff38e7b | bellard | |
68 | dff38e7b | bellard | static void rtc_set_time(RTCState *s); |
69 | dff38e7b | bellard | static void rtc_set_date_buf(RTCState *s, const struct tm *tm); |
70 | dff38e7b | bellard | static void rtc_copy_date(RTCState *s); |
71 | dff38e7b | bellard | |
72 | dff38e7b | bellard | static void rtc_timer_update(RTCState *s, int64_t current_time) |
73 | dff38e7b | bellard | { |
74 | dff38e7b | bellard | int period_code, period;
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75 | dff38e7b | bellard | int64_t cur_clock, next_irq_clock; |
76 | dff38e7b | bellard | |
77 | dff38e7b | bellard | period_code = s->cmos_data[RTC_REG_A] & 0x0f;
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78 | dff38e7b | bellard | if (period_code != 0 && |
79 | dff38e7b | bellard | (s->cmos_data[RTC_REG_B] & REG_B_PIE)) { |
80 | dff38e7b | bellard | if (period_code <= 2) |
81 | dff38e7b | bellard | period_code += 7;
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82 | dff38e7b | bellard | /* period in 32 Khz cycles */
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83 | dff38e7b | bellard | period = 1 << (period_code - 1); |
84 | dff38e7b | bellard | /* compute 32 khz clock */
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85 | dff38e7b | bellard | cur_clock = muldiv64(current_time, 32768, ticks_per_sec);
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86 | dff38e7b | bellard | next_irq_clock = (cur_clock & ~(period - 1)) + period;
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87 | dff38e7b | bellard | s->next_periodic_time = muldiv64(next_irq_clock, ticks_per_sec, 32768) + 1; |
88 | dff38e7b | bellard | qemu_mod_timer(s->periodic_timer, s->next_periodic_time); |
89 | dff38e7b | bellard | } else {
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90 | dff38e7b | bellard | qemu_del_timer(s->periodic_timer); |
91 | dff38e7b | bellard | } |
92 | dff38e7b | bellard | } |
93 | dff38e7b | bellard | |
94 | dff38e7b | bellard | static void rtc_periodic_timer(void *opaque) |
95 | dff38e7b | bellard | { |
96 | dff38e7b | bellard | RTCState *s = opaque; |
97 | dff38e7b | bellard | |
98 | dff38e7b | bellard | rtc_timer_update(s, s->next_periodic_time); |
99 | dff38e7b | bellard | s->cmos_data[RTC_REG_C] |= 0xc0;
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100 | dff38e7b | bellard | pic_set_irq(s->irq, 1);
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101 | dff38e7b | bellard | } |
102 | 80cabfad | bellard | |
103 | b41a2cd1 | bellard | static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) |
104 | 80cabfad | bellard | { |
105 | b41a2cd1 | bellard | RTCState *s = opaque; |
106 | 80cabfad | bellard | |
107 | 80cabfad | bellard | if ((addr & 1) == 0) { |
108 | 80cabfad | bellard | s->cmos_index = data & 0x7f;
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109 | 80cabfad | bellard | } else {
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110 | 80cabfad | bellard | #ifdef DEBUG_CMOS
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111 | 80cabfad | bellard | printf("cmos: write index=0x%02x val=0x%02x\n",
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112 | 80cabfad | bellard | s->cmos_index, data); |
113 | 80cabfad | bellard | #endif
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114 | dff38e7b | bellard | switch(s->cmos_index) {
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115 | 80cabfad | bellard | case RTC_SECONDS_ALARM:
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116 | 80cabfad | bellard | case RTC_MINUTES_ALARM:
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117 | 80cabfad | bellard | case RTC_HOURS_ALARM:
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118 | 80cabfad | bellard | /* XXX: not supported */
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119 | 80cabfad | bellard | s->cmos_data[s->cmos_index] = data; |
120 | 80cabfad | bellard | break;
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121 | 80cabfad | bellard | case RTC_SECONDS:
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122 | 80cabfad | bellard | case RTC_MINUTES:
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123 | 80cabfad | bellard | case RTC_HOURS:
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124 | 80cabfad | bellard | case RTC_DAY_OF_WEEK:
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125 | 80cabfad | bellard | case RTC_DAY_OF_MONTH:
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126 | 80cabfad | bellard | case RTC_MONTH:
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127 | 80cabfad | bellard | case RTC_YEAR:
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128 | 80cabfad | bellard | s->cmos_data[s->cmos_index] = data; |
129 | dff38e7b | bellard | /* if in set mode, do not update the time */
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130 | dff38e7b | bellard | if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
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131 | dff38e7b | bellard | rtc_set_time(s); |
132 | dff38e7b | bellard | } |
133 | 80cabfad | bellard | break;
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134 | 80cabfad | bellard | case RTC_REG_A:
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135 | dff38e7b | bellard | /* UIP bit is read only */
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136 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) | |
137 | dff38e7b | bellard | (s->cmos_data[RTC_REG_A] & REG_A_UIP); |
138 | dff38e7b | bellard | rtc_timer_update(s, qemu_get_clock(vm_clock)); |
139 | dff38e7b | bellard | break;
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140 | 80cabfad | bellard | case RTC_REG_B:
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141 | dff38e7b | bellard | if (data & REG_B_SET) {
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142 | dff38e7b | bellard | /* set mode: reset UIP mode */
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143 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; |
144 | dff38e7b | bellard | data &= ~REG_B_UIE; |
145 | dff38e7b | bellard | } else {
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146 | dff38e7b | bellard | /* if disabling set mode, update the time */
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147 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & REG_B_SET) {
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148 | dff38e7b | bellard | rtc_set_time(s); |
149 | dff38e7b | bellard | } |
150 | dff38e7b | bellard | } |
151 | dff38e7b | bellard | s->cmos_data[RTC_REG_B] = data; |
152 | dff38e7b | bellard | rtc_timer_update(s, qemu_get_clock(vm_clock)); |
153 | 80cabfad | bellard | break;
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154 | 80cabfad | bellard | case RTC_REG_C:
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155 | 80cabfad | bellard | case RTC_REG_D:
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156 | 80cabfad | bellard | /* cannot write to them */
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157 | 80cabfad | bellard | break;
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158 | 80cabfad | bellard | default:
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159 | 80cabfad | bellard | s->cmos_data[s->cmos_index] = data; |
160 | 80cabfad | bellard | break;
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161 | 80cabfad | bellard | } |
162 | 80cabfad | bellard | } |
163 | 80cabfad | bellard | } |
164 | 80cabfad | bellard | |
165 | dff38e7b | bellard | static inline int to_bcd(RTCState *s, int a) |
166 | 80cabfad | bellard | { |
167 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & 0x04) { |
168 | dff38e7b | bellard | return a;
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169 | dff38e7b | bellard | } else {
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170 | dff38e7b | bellard | return ((a / 10) << 4) | (a % 10); |
171 | dff38e7b | bellard | } |
172 | 80cabfad | bellard | } |
173 | 80cabfad | bellard | |
174 | dff38e7b | bellard | static inline int from_bcd(RTCState *s, int a) |
175 | 80cabfad | bellard | { |
176 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & 0x04) { |
177 | dff38e7b | bellard | return a;
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178 | dff38e7b | bellard | } else {
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179 | dff38e7b | bellard | return ((a >> 4) * 10) + (a & 0x0f); |
180 | dff38e7b | bellard | } |
181 | dff38e7b | bellard | } |
182 | dff38e7b | bellard | |
183 | dff38e7b | bellard | static void rtc_set_time(RTCState *s) |
184 | dff38e7b | bellard | { |
185 | dff38e7b | bellard | struct tm tm1, *tm = &tm1;
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186 | dff38e7b | bellard | |
187 | dff38e7b | bellard | tm->tm_sec = from_bcd(s, s->cmos_data[RTC_SECONDS]); |
188 | dff38e7b | bellard | tm->tm_min = from_bcd(s, s->cmos_data[RTC_MINUTES]); |
189 | dff38e7b | bellard | tm->tm_hour = from_bcd(s, s->cmos_data[RTC_HOURS]); |
190 | dff38e7b | bellard | tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]); |
191 | dff38e7b | bellard | tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]); |
192 | dff38e7b | bellard | tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
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193 | dff38e7b | bellard | tm->tm_year = from_bcd(s, s->cmos_data[RTC_YEAR]) + 100;
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194 | dff38e7b | bellard | |
195 | dff38e7b | bellard | /* update internal state */
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196 | dff38e7b | bellard | s->buf_data[RTC_SECONDS] = s->cmos_data[RTC_SECONDS]; |
197 | dff38e7b | bellard | s->buf_data[RTC_MINUTES] = s->cmos_data[RTC_MINUTES]; |
198 | dff38e7b | bellard | s->buf_data[RTC_HOURS] = s->cmos_data[RTC_HOURS]; |
199 | dff38e7b | bellard | s->buf_data[RTC_DAY_OF_WEEK] = s->cmos_data[RTC_DAY_OF_WEEK]; |
200 | dff38e7b | bellard | s->buf_data[RTC_DAY_OF_MONTH] = s->cmos_data[RTC_DAY_OF_MONTH]; |
201 | dff38e7b | bellard | s->buf_data[RTC_MONTH] = s->cmos_data[RTC_MONTH]; |
202 | dff38e7b | bellard | s->buf_data[RTC_YEAR] = s->cmos_data[RTC_YEAR]; |
203 | dff38e7b | bellard | s->current_time = mktime(tm); |
204 | dff38e7b | bellard | } |
205 | dff38e7b | bellard | |
206 | dff38e7b | bellard | static void rtc_update_second(void *opaque) |
207 | dff38e7b | bellard | { |
208 | dff38e7b | bellard | RTCState *s = opaque; |
209 | 4721c457 | bellard | int64_t delay; |
210 | dff38e7b | bellard | |
211 | dff38e7b | bellard | /* if the oscillator is not in normal operation, we do not update */
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212 | dff38e7b | bellard | if ((s->cmos_data[RTC_REG_A] & 0x70) != 0x20) { |
213 | dff38e7b | bellard | s->next_second_time += ticks_per_sec; |
214 | dff38e7b | bellard | qemu_mod_timer(s->second_timer, s->next_second_time); |
215 | dff38e7b | bellard | } else {
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216 | dff38e7b | bellard | s->current_time++; |
217 | dff38e7b | bellard | |
218 | dff38e7b | bellard | if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
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219 | dff38e7b | bellard | /* update in progress bit */
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220 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] |= REG_A_UIP; |
221 | dff38e7b | bellard | } |
222 | 4721c457 | bellard | /* should be 244 us = 8 / 32768 seconds, but currently the
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223 | 4721c457 | bellard | timers do not have the necessary resolution. */
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224 | 4721c457 | bellard | delay = (ticks_per_sec * 1) / 100; |
225 | 4721c457 | bellard | if (delay < 1) |
226 | 4721c457 | bellard | delay = 1;
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227 | dff38e7b | bellard | qemu_mod_timer(s->second_timer2, |
228 | 4721c457 | bellard | s->next_second_time + delay); |
229 | dff38e7b | bellard | } |
230 | dff38e7b | bellard | } |
231 | dff38e7b | bellard | |
232 | dff38e7b | bellard | static void rtc_update_second2(void *opaque) |
233 | dff38e7b | bellard | { |
234 | dff38e7b | bellard | RTCState *s = opaque; |
235 | 80cabfad | bellard | time_t ti; |
236 | 80cabfad | bellard | |
237 | dff38e7b | bellard | ti = s->current_time; |
238 | dff38e7b | bellard | rtc_set_date_buf(s, gmtime(&ti)); |
239 | dff38e7b | bellard | |
240 | dff38e7b | bellard | if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
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241 | dff38e7b | bellard | rtc_copy_date(s); |
242 | dff38e7b | bellard | } |
243 | dff38e7b | bellard | |
244 | dff38e7b | bellard | /* check alarm */
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245 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & REG_B_AIE) {
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246 | dff38e7b | bellard | if (((s->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0 || |
247 | dff38e7b | bellard | s->cmos_data[RTC_SECONDS_ALARM] == s->buf_data[RTC_SECONDS]) && |
248 | dff38e7b | bellard | ((s->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0 || |
249 | dff38e7b | bellard | s->cmos_data[RTC_MINUTES_ALARM] == s->buf_data[RTC_MINUTES]) && |
250 | dff38e7b | bellard | ((s->cmos_data[RTC_HOURS_ALARM] & 0xc0) == 0xc0 || |
251 | dff38e7b | bellard | s->cmos_data[RTC_HOURS_ALARM] == s->buf_data[RTC_HOURS])) { |
252 | dff38e7b | bellard | |
253 | dff38e7b | bellard | s->cmos_data[RTC_REG_C] |= 0xa0;
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254 | dff38e7b | bellard | pic_set_irq(s->irq, 1);
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255 | dff38e7b | bellard | } |
256 | dff38e7b | bellard | } |
257 | dff38e7b | bellard | |
258 | dff38e7b | bellard | /* update ended interrupt */
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259 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & REG_B_UIE) {
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260 | dff38e7b | bellard | s->cmos_data[RTC_REG_C] |= 0x90;
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261 | dff38e7b | bellard | pic_set_irq(s->irq, 1);
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262 | dff38e7b | bellard | } |
263 | dff38e7b | bellard | |
264 | dff38e7b | bellard | /* clear update in progress bit */
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265 | dff38e7b | bellard | s->cmos_data[RTC_REG_A] &= ~REG_A_UIP; |
266 | dff38e7b | bellard | |
267 | dff38e7b | bellard | s->next_second_time += ticks_per_sec; |
268 | dff38e7b | bellard | qemu_mod_timer(s->second_timer, s->next_second_time); |
269 | 80cabfad | bellard | } |
270 | 80cabfad | bellard | |
271 | b41a2cd1 | bellard | static uint32_t cmos_ioport_read(void *opaque, uint32_t addr) |
272 | 80cabfad | bellard | { |
273 | b41a2cd1 | bellard | RTCState *s = opaque; |
274 | 80cabfad | bellard | int ret;
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275 | 80cabfad | bellard | if ((addr & 1) == 0) { |
276 | 80cabfad | bellard | return 0xff; |
277 | 80cabfad | bellard | } else {
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278 | 80cabfad | bellard | switch(s->cmos_index) {
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279 | 80cabfad | bellard | case RTC_SECONDS:
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280 | 80cabfad | bellard | case RTC_MINUTES:
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281 | 80cabfad | bellard | case RTC_HOURS:
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282 | 80cabfad | bellard | case RTC_DAY_OF_WEEK:
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283 | 80cabfad | bellard | case RTC_DAY_OF_MONTH:
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284 | 80cabfad | bellard | case RTC_MONTH:
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285 | 80cabfad | bellard | case RTC_YEAR:
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286 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
287 | 80cabfad | bellard | break;
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288 | 80cabfad | bellard | case RTC_REG_A:
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289 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
290 | 80cabfad | bellard | break;
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291 | 80cabfad | bellard | case RTC_REG_C:
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292 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
293 | 80cabfad | bellard | pic_set_irq(s->irq, 0);
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294 | 80cabfad | bellard | s->cmos_data[RTC_REG_C] = 0x00;
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295 | 80cabfad | bellard | break;
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296 | 80cabfad | bellard | default:
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297 | 80cabfad | bellard | ret = s->cmos_data[s->cmos_index]; |
298 | 80cabfad | bellard | break;
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299 | 80cabfad | bellard | } |
300 | 80cabfad | bellard | #ifdef DEBUG_CMOS
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301 | 80cabfad | bellard | printf("cmos: read index=0x%02x val=0x%02x\n",
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302 | 80cabfad | bellard | s->cmos_index, ret); |
303 | 80cabfad | bellard | #endif
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304 | 80cabfad | bellard | return ret;
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305 | 80cabfad | bellard | } |
306 | 80cabfad | bellard | } |
307 | 80cabfad | bellard | |
308 | dff38e7b | bellard | static void rtc_set_date_buf(RTCState *s, const struct tm *tm) |
309 | 80cabfad | bellard | { |
310 | dff38e7b | bellard | s->buf_data[RTC_SECONDS] = to_bcd(s, tm->tm_sec); |
311 | dff38e7b | bellard | s->buf_data[RTC_MINUTES] = to_bcd(s, tm->tm_min); |
312 | dff38e7b | bellard | if (s->cmos_data[RTC_REG_B] & 0x02) { |
313 | dff38e7b | bellard | /* 24 hour format */
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314 | dff38e7b | bellard | s->buf_data[RTC_HOURS] = to_bcd(s, tm->tm_hour); |
315 | dff38e7b | bellard | } else {
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316 | dff38e7b | bellard | /* 12 hour format */
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317 | dff38e7b | bellard | s->buf_data[RTC_HOURS] = to_bcd(s, tm->tm_hour % 12);
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318 | dff38e7b | bellard | if (tm->tm_hour >= 12) |
319 | dff38e7b | bellard | s->buf_data[RTC_HOURS] |= 0x80;
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320 | 80cabfad | bellard | } |
321 | dff38e7b | bellard | s->buf_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday); |
322 | dff38e7b | bellard | s->buf_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday); |
323 | dff38e7b | bellard | s->buf_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1);
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324 | dff38e7b | bellard | s->buf_data[RTC_YEAR] = to_bcd(s, tm->tm_year % 100);
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325 | dff38e7b | bellard | } |
326 | dff38e7b | bellard | |
327 | dff38e7b | bellard | static void rtc_copy_date(RTCState *s) |
328 | dff38e7b | bellard | { |
329 | dff38e7b | bellard | s->cmos_data[RTC_SECONDS] = s->buf_data[RTC_SECONDS]; |
330 | dff38e7b | bellard | s->cmos_data[RTC_MINUTES] = s->buf_data[RTC_MINUTES]; |
331 | dff38e7b | bellard | s->cmos_data[RTC_HOURS] = s->buf_data[RTC_HOURS]; |
332 | dff38e7b | bellard | s->cmos_data[RTC_DAY_OF_WEEK] = s->buf_data[RTC_DAY_OF_WEEK]; |
333 | dff38e7b | bellard | s->cmos_data[RTC_DAY_OF_MONTH] = s->buf_data[RTC_DAY_OF_MONTH]; |
334 | dff38e7b | bellard | s->cmos_data[RTC_MONTH] = s->buf_data[RTC_MONTH]; |
335 | dff38e7b | bellard | s->cmos_data[RTC_YEAR] = s->buf_data[RTC_YEAR]; |
336 | dff38e7b | bellard | } |
337 | dff38e7b | bellard | |
338 | dff38e7b | bellard | void rtc_set_memory(RTCState *s, int addr, int val) |
339 | dff38e7b | bellard | { |
340 | dff38e7b | bellard | if (addr >= 0 && addr <= 127) |
341 | dff38e7b | bellard | s->cmos_data[addr] = val; |
342 | dff38e7b | bellard | } |
343 | dff38e7b | bellard | |
344 | dff38e7b | bellard | void rtc_set_date(RTCState *s, const struct tm *tm) |
345 | dff38e7b | bellard | { |
346 | dff38e7b | bellard | s->current_time = mktime((struct tm *)tm);
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347 | dff38e7b | bellard | rtc_set_date_buf(s, tm); |
348 | dff38e7b | bellard | rtc_copy_date(s); |
349 | dff38e7b | bellard | } |
350 | dff38e7b | bellard | |
351 | dff38e7b | bellard | static void rtc_save(QEMUFile *f, void *opaque) |
352 | dff38e7b | bellard | { |
353 | dff38e7b | bellard | RTCState *s = opaque; |
354 | dff38e7b | bellard | |
355 | dff38e7b | bellard | qemu_put_buffer(f, s->cmos_data, 128);
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356 | dff38e7b | bellard | qemu_put_8s(f, &s->cmos_index); |
357 | dff38e7b | bellard | qemu_put_be32s(f, &s->current_time); |
358 | dff38e7b | bellard | qemu_put_buffer(f, s->buf_data, 10);
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359 | dff38e7b | bellard | |
360 | dff38e7b | bellard | qemu_put_timer(f, s->periodic_timer); |
361 | dff38e7b | bellard | qemu_put_be64s(f, &s->next_periodic_time); |
362 | dff38e7b | bellard | |
363 | dff38e7b | bellard | qemu_put_be64s(f, &s->next_second_time); |
364 | dff38e7b | bellard | qemu_put_timer(f, s->second_timer); |
365 | dff38e7b | bellard | qemu_put_timer(f, s->second_timer2); |
366 | 80cabfad | bellard | } |
367 | 80cabfad | bellard | |
368 | dff38e7b | bellard | static int rtc_load(QEMUFile *f, void *opaque, int version_id) |
369 | 80cabfad | bellard | { |
370 | dff38e7b | bellard | RTCState *s = opaque; |
371 | dff38e7b | bellard | |
372 | dff38e7b | bellard | if (version_id != 1) |
373 | dff38e7b | bellard | return -EINVAL;
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374 | 80cabfad | bellard | |
375 | dff38e7b | bellard | qemu_get_buffer(f, s->cmos_data, 128);
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376 | dff38e7b | bellard | qemu_get_8s(f, &s->cmos_index); |
377 | dff38e7b | bellard | qemu_get_be32s(f, &s->current_time); |
378 | dff38e7b | bellard | qemu_get_buffer(f, s->buf_data, 10);
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379 | dff38e7b | bellard | |
380 | dff38e7b | bellard | qemu_get_timer(f, s->periodic_timer); |
381 | dff38e7b | bellard | qemu_get_be64s(f, &s->next_periodic_time); |
382 | dff38e7b | bellard | |
383 | dff38e7b | bellard | qemu_get_be64s(f, &s->next_second_time); |
384 | dff38e7b | bellard | qemu_get_timer(f, s->second_timer); |
385 | dff38e7b | bellard | qemu_get_timer(f, s->second_timer2); |
386 | dff38e7b | bellard | return 0; |
387 | dff38e7b | bellard | } |
388 | dff38e7b | bellard | |
389 | dff38e7b | bellard | RTCState *rtc_init(int base, int irq) |
390 | dff38e7b | bellard | { |
391 | dff38e7b | bellard | RTCState *s; |
392 | dff38e7b | bellard | |
393 | dff38e7b | bellard | s = qemu_mallocz(sizeof(RTCState));
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394 | dff38e7b | bellard | if (!s)
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395 | dff38e7b | bellard | return NULL; |
396 | 80cabfad | bellard | |
397 | 80cabfad | bellard | s->irq = irq; |
398 | 80cabfad | bellard | s->cmos_data[RTC_REG_A] = 0x26;
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399 | 80cabfad | bellard | s->cmos_data[RTC_REG_B] = 0x02;
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400 | 80cabfad | bellard | s->cmos_data[RTC_REG_C] = 0x00;
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401 | 80cabfad | bellard | s->cmos_data[RTC_REG_D] = 0x80;
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402 | 80cabfad | bellard | |
403 | dff38e7b | bellard | s->periodic_timer = qemu_new_timer(vm_clock, |
404 | dff38e7b | bellard | rtc_periodic_timer, s); |
405 | dff38e7b | bellard | s->second_timer = qemu_new_timer(vm_clock, |
406 | dff38e7b | bellard | rtc_update_second, s); |
407 | dff38e7b | bellard | s->second_timer2 = qemu_new_timer(vm_clock, |
408 | dff38e7b | bellard | rtc_update_second2, s); |
409 | dff38e7b | bellard | |
410 | dff38e7b | bellard | s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 100; |
411 | dff38e7b | bellard | qemu_mod_timer(s->second_timer2, s->next_second_time); |
412 | dff38e7b | bellard | |
413 | b41a2cd1 | bellard | register_ioport_write(base, 2, 1, cmos_ioport_write, s); |
414 | b41a2cd1 | bellard | register_ioport_read(base, 2, 1, cmos_ioport_read, s); |
415 | dff38e7b | bellard | |
416 | dff38e7b | bellard | register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s); |
417 | dff38e7b | bellard | return s;
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418 | 80cabfad | bellard | } |