root / hw / pflash_cfi01.c @ 487414f1
History | View | Annotate | Download (17.3 kB)
1 | 05ee37eb | balrog | /*
|
---|---|---|---|
2 | 05ee37eb | balrog | * CFI parallel flash with Intel command set emulation
|
3 | 05ee37eb | balrog | *
|
4 | 05ee37eb | balrog | * Copyright (c) 2006 Thorsten Zitterell
|
5 | 05ee37eb | balrog | * Copyright (c) 2005 Jocelyn Mayer
|
6 | 05ee37eb | balrog | *
|
7 | 05ee37eb | balrog | * This library is free software; you can redistribute it and/or
|
8 | 05ee37eb | balrog | * modify it under the terms of the GNU Lesser General Public
|
9 | 05ee37eb | balrog | * License as published by the Free Software Foundation; either
|
10 | 05ee37eb | balrog | * version 2 of the License, or (at your option) any later version.
|
11 | 05ee37eb | balrog | *
|
12 | 05ee37eb | balrog | * This library is distributed in the hope that it will be useful,
|
13 | 05ee37eb | balrog | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
14 | 05ee37eb | balrog | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
15 | 05ee37eb | balrog | * Lesser General Public License for more details.
|
16 | 05ee37eb | balrog | *
|
17 | 05ee37eb | balrog | * You should have received a copy of the GNU Lesser General Public
|
18 | 05ee37eb | balrog | * License along with this library; if not, write to the Free Software
|
19 | fad6cb1a | aurel32 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
|
20 | 05ee37eb | balrog | */
|
21 | 05ee37eb | balrog | |
22 | 05ee37eb | balrog | /*
|
23 | 05ee37eb | balrog | * For now, this code can emulate flashes of 1, 2 or 4 bytes width.
|
24 | 05ee37eb | balrog | * Supported commands/modes are:
|
25 | 05ee37eb | balrog | * - flash read
|
26 | 05ee37eb | balrog | * - flash write
|
27 | 05ee37eb | balrog | * - flash ID read
|
28 | 05ee37eb | balrog | * - sector erase
|
29 | 05ee37eb | balrog | * - CFI queries
|
30 | 05ee37eb | balrog | *
|
31 | 05ee37eb | balrog | * It does not support timings
|
32 | 05ee37eb | balrog | * It does not support flash interleaving
|
33 | 05ee37eb | balrog | * It does not implement software data protection as found in many real chips
|
34 | 05ee37eb | balrog | * It does not implement erase suspend/resume commands
|
35 | 05ee37eb | balrog | * It does not implement multiple sectors erase
|
36 | 05ee37eb | balrog | *
|
37 | 05ee37eb | balrog | * It does not implement much more ...
|
38 | 05ee37eb | balrog | */
|
39 | 05ee37eb | balrog | |
40 | 87ecb68b | pbrook | #include "hw.h" |
41 | 87ecb68b | pbrook | #include "flash.h" |
42 | 87ecb68b | pbrook | #include "block.h" |
43 | 87ecb68b | pbrook | #include "qemu-timer.h" |
44 | 05ee37eb | balrog | |
45 | 05ee37eb | balrog | #define PFLASH_BUG(fmt, args...) \
|
46 | 05ee37eb | balrog | do { \
|
47 | 05ee37eb | balrog | printf("PFLASH: Possible BUG - " fmt, ##args); \ |
48 | 05ee37eb | balrog | exit(1); \
|
49 | 05ee37eb | balrog | } while(0) |
50 | 05ee37eb | balrog | |
51 | 05ee37eb | balrog | /* #define PFLASH_DEBUG */
|
52 | 05ee37eb | balrog | #ifdef PFLASH_DEBUG
|
53 | 05ee37eb | balrog | #define DPRINTF(fmt, args...) \
|
54 | 05ee37eb | balrog | do { \
|
55 | 05ee37eb | balrog | printf("PFLASH: " fmt , ##args); \ |
56 | 05ee37eb | balrog | } while (0) |
57 | 05ee37eb | balrog | #else
|
58 | 05ee37eb | balrog | #define DPRINTF(fmt, args...) do { } while (0) |
59 | 05ee37eb | balrog | #endif
|
60 | 05ee37eb | balrog | |
61 | 05ee37eb | balrog | struct pflash_t {
|
62 | 05ee37eb | balrog | BlockDriverState *bs; |
63 | 05ee37eb | balrog | target_ulong base; |
64 | 05ee37eb | balrog | target_ulong sector_len; |
65 | 05ee37eb | balrog | target_ulong total_len; |
66 | 05ee37eb | balrog | int width;
|
67 | 05ee37eb | balrog | int wcycle; /* if 0, the flash is read normally */ |
68 | 05ee37eb | balrog | int bypass;
|
69 | 05ee37eb | balrog | int ro;
|
70 | 05ee37eb | balrog | uint8_t cmd; |
71 | 05ee37eb | balrog | uint8_t status; |
72 | 05ee37eb | balrog | uint16_t ident[4];
|
73 | 05ee37eb | balrog | uint8_t cfi_len; |
74 | 05ee37eb | balrog | uint8_t cfi_table[0x52];
|
75 | 05ee37eb | balrog | target_ulong counter; |
76 | 05ee37eb | balrog | QEMUTimer *timer; |
77 | 05ee37eb | balrog | ram_addr_t off; |
78 | 05ee37eb | balrog | int fl_mem;
|
79 | 05ee37eb | balrog | void *storage;
|
80 | 05ee37eb | balrog | }; |
81 | 05ee37eb | balrog | |
82 | 05ee37eb | balrog | static void pflash_timer (void *opaque) |
83 | 05ee37eb | balrog | { |
84 | 05ee37eb | balrog | pflash_t *pfl = opaque; |
85 | 05ee37eb | balrog | |
86 | 05ee37eb | balrog | DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);
|
87 | 05ee37eb | balrog | /* Reset flash */
|
88 | 05ee37eb | balrog | pfl->status ^= 0x80;
|
89 | 05ee37eb | balrog | if (pfl->bypass) {
|
90 | 05ee37eb | balrog | pfl->wcycle = 2;
|
91 | 05ee37eb | balrog | } else {
|
92 | 05ee37eb | balrog | cpu_register_physical_memory(pfl->base, pfl->total_len, |
93 | 05ee37eb | balrog | pfl->off | IO_MEM_ROMD | pfl->fl_mem); |
94 | 05ee37eb | balrog | pfl->wcycle = 0;
|
95 | 05ee37eb | balrog | } |
96 | 05ee37eb | balrog | pfl->cmd = 0;
|
97 | 05ee37eb | balrog | } |
98 | 05ee37eb | balrog | |
99 | 05ee37eb | balrog | static uint32_t pflash_read (pflash_t *pfl, target_ulong offset, int width) |
100 | 05ee37eb | balrog | { |
101 | 05ee37eb | balrog | target_ulong boff; |
102 | 05ee37eb | balrog | uint32_t ret; |
103 | 05ee37eb | balrog | uint8_t *p; |
104 | 05ee37eb | balrog | |
105 | 05ee37eb | balrog | ret = -1;
|
106 | 05ee37eb | balrog | boff = offset & 0xFF; /* why this here ?? */ |
107 | 05ee37eb | balrog | |
108 | 05ee37eb | balrog | if (pfl->width == 2) |
109 | 05ee37eb | balrog | boff = boff >> 1;
|
110 | 05ee37eb | balrog | else if (pfl->width == 4) |
111 | 05ee37eb | balrog | boff = boff >> 2;
|
112 | 05ee37eb | balrog | |
113 | 06adb549 | balrog | DPRINTF("%s: reading offset " TARGET_FMT_lx " under cmd %02x width %d\n", |
114 | 06adb549 | balrog | __func__, offset, pfl->cmd, width); |
115 | 05ee37eb | balrog | |
116 | 05ee37eb | balrog | switch (pfl->cmd) {
|
117 | 05ee37eb | balrog | case 0x00: |
118 | 05ee37eb | balrog | /* Flash area read */
|
119 | 05ee37eb | balrog | p = pfl->storage; |
120 | 05ee37eb | balrog | switch (width) {
|
121 | 05ee37eb | balrog | case 1: |
122 | 05ee37eb | balrog | ret = p[offset]; |
123 | c8b153d7 | ths | DPRINTF("%s: data offset " TARGET_FMT_lx " %02x\n", |
124 | c8b153d7 | ths | __func__, offset, ret); |
125 | 05ee37eb | balrog | break;
|
126 | 05ee37eb | balrog | case 2: |
127 | 05ee37eb | balrog | #if defined(TARGET_WORDS_BIGENDIAN)
|
128 | 05ee37eb | balrog | ret = p[offset] << 8;
|
129 | 05ee37eb | balrog | ret |= p[offset + 1];
|
130 | 05ee37eb | balrog | #else
|
131 | 05ee37eb | balrog | ret = p[offset]; |
132 | 05ee37eb | balrog | ret |= p[offset + 1] << 8; |
133 | 05ee37eb | balrog | #endif
|
134 | c8b153d7 | ths | DPRINTF("%s: data offset " TARGET_FMT_lx " %04x\n", |
135 | c8b153d7 | ths | __func__, offset, ret); |
136 | 05ee37eb | balrog | break;
|
137 | 05ee37eb | balrog | case 4: |
138 | 05ee37eb | balrog | #if defined(TARGET_WORDS_BIGENDIAN)
|
139 | 05ee37eb | balrog | ret = p[offset] << 24;
|
140 | 05ee37eb | balrog | ret |= p[offset + 1] << 16; |
141 | 05ee37eb | balrog | ret |= p[offset + 2] << 8; |
142 | 05ee37eb | balrog | ret |= p[offset + 3];
|
143 | 05ee37eb | balrog | #else
|
144 | 05ee37eb | balrog | ret = p[offset]; |
145 | 05ee37eb | balrog | ret |= p[offset + 1] << 8; |
146 | 05ee37eb | balrog | ret |= p[offset + 1] << 8; |
147 | 05ee37eb | balrog | ret |= p[offset + 2] << 16; |
148 | 05ee37eb | balrog | ret |= p[offset + 3] << 24; |
149 | 05ee37eb | balrog | #endif
|
150 | c8b153d7 | ths | DPRINTF("%s: data offset " TARGET_FMT_lx " %08x\n", |
151 | c8b153d7 | ths | __func__, offset, ret); |
152 | 05ee37eb | balrog | break;
|
153 | 05ee37eb | balrog | default:
|
154 | 05ee37eb | balrog | DPRINTF("BUG in %s\n", __func__);
|
155 | 05ee37eb | balrog | } |
156 | 05ee37eb | balrog | |
157 | 05ee37eb | balrog | break;
|
158 | 05ee37eb | balrog | case 0x20: /* Block erase */ |
159 | 05ee37eb | balrog | case 0x50: /* Clear status register */ |
160 | 05ee37eb | balrog | case 0x60: /* Block /un)lock */ |
161 | 05ee37eb | balrog | case 0x70: /* Status Register */ |
162 | 05ee37eb | balrog | case 0xe8: /* Write block */ |
163 | 05ee37eb | balrog | /* Status register read */
|
164 | 05ee37eb | balrog | ret = pfl->status; |
165 | 05ee37eb | balrog | DPRINTF("%s: status %x\n", __func__, ret);
|
166 | 05ee37eb | balrog | break;
|
167 | 05ee37eb | balrog | case 0x98: /* Query mode */ |
168 | 05ee37eb | balrog | if (boff > pfl->cfi_len)
|
169 | 05ee37eb | balrog | ret = 0;
|
170 | 05ee37eb | balrog | else
|
171 | 05ee37eb | balrog | ret = pfl->cfi_table[boff]; |
172 | 05ee37eb | balrog | break;
|
173 | 05ee37eb | balrog | default:
|
174 | 05ee37eb | balrog | /* This should never happen : reset state & treat it as a read */
|
175 | 05ee37eb | balrog | DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd);
|
176 | 05ee37eb | balrog | pfl->wcycle = 0;
|
177 | 05ee37eb | balrog | pfl->cmd = 0;
|
178 | 05ee37eb | balrog | } |
179 | 05ee37eb | balrog | return ret;
|
180 | 05ee37eb | balrog | } |
181 | 05ee37eb | balrog | |
182 | 05ee37eb | balrog | /* update flash content on disk */
|
183 | 05ee37eb | balrog | static void pflash_update(pflash_t *pfl, int offset, |
184 | 05ee37eb | balrog | int size)
|
185 | 05ee37eb | balrog | { |
186 | 05ee37eb | balrog | int offset_end;
|
187 | 05ee37eb | balrog | if (pfl->bs) {
|
188 | 05ee37eb | balrog | offset_end = offset + size; |
189 | 05ee37eb | balrog | /* round to sectors */
|
190 | 05ee37eb | balrog | offset = offset >> 9;
|
191 | 05ee37eb | balrog | offset_end = (offset_end + 511) >> 9; |
192 | 05ee37eb | balrog | bdrv_write(pfl->bs, offset, pfl->storage + (offset << 9),
|
193 | 05ee37eb | balrog | offset_end - offset); |
194 | 05ee37eb | balrog | } |
195 | 05ee37eb | balrog | } |
196 | 05ee37eb | balrog | |
197 | d361be25 | balrog | static void inline pflash_data_write(pflash_t *pfl, target_ulong offset, |
198 | d361be25 | balrog | uint32_t value, int width)
|
199 | d361be25 | balrog | { |
200 | d361be25 | balrog | uint8_t *p = pfl->storage; |
201 | d361be25 | balrog | |
202 | d361be25 | balrog | DPRINTF("%s: block write offset " TARGET_FMT_lx
|
203 | d361be25 | balrog | " value %x counter " TARGET_FMT_lx "\n", |
204 | d361be25 | balrog | __func__, offset, value, pfl->counter); |
205 | d361be25 | balrog | switch (width) {
|
206 | d361be25 | balrog | case 1: |
207 | d361be25 | balrog | p[offset] = value; |
208 | d361be25 | balrog | pflash_update(pfl, offset, 1);
|
209 | d361be25 | balrog | break;
|
210 | d361be25 | balrog | case 2: |
211 | d361be25 | balrog | #if defined(TARGET_WORDS_BIGENDIAN)
|
212 | d361be25 | balrog | p[offset] = value >> 8;
|
213 | d361be25 | balrog | p[offset + 1] = value;
|
214 | d361be25 | balrog | #else
|
215 | d361be25 | balrog | p[offset] = value; |
216 | d361be25 | balrog | p[offset + 1] = value >> 8; |
217 | d361be25 | balrog | #endif
|
218 | d361be25 | balrog | pflash_update(pfl, offset, 2);
|
219 | d361be25 | balrog | break;
|
220 | d361be25 | balrog | case 4: |
221 | d361be25 | balrog | #if defined(TARGET_WORDS_BIGENDIAN)
|
222 | d361be25 | balrog | p[offset] = value >> 24;
|
223 | d361be25 | balrog | p[offset + 1] = value >> 16; |
224 | d361be25 | balrog | p[offset + 2] = value >> 8; |
225 | d361be25 | balrog | p[offset + 3] = value;
|
226 | d361be25 | balrog | #else
|
227 | d361be25 | balrog | p[offset] = value; |
228 | d361be25 | balrog | p[offset + 1] = value >> 8; |
229 | d361be25 | balrog | p[offset + 2] = value >> 16; |
230 | d361be25 | balrog | p[offset + 3] = value >> 24; |
231 | d361be25 | balrog | #endif
|
232 | d361be25 | balrog | pflash_update(pfl, offset, 4);
|
233 | d361be25 | balrog | break;
|
234 | d361be25 | balrog | } |
235 | d361be25 | balrog | |
236 | d361be25 | balrog | } |
237 | d361be25 | balrog | |
238 | 05ee37eb | balrog | static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, |
239 | 05ee37eb | balrog | int width)
|
240 | 05ee37eb | balrog | { |
241 | 05ee37eb | balrog | target_ulong boff; |
242 | 05ee37eb | balrog | uint8_t *p; |
243 | 05ee37eb | balrog | uint8_t cmd; |
244 | 05ee37eb | balrog | |
245 | 05ee37eb | balrog | cmd = value; |
246 | 05ee37eb | balrog | |
247 | 06adb549 | balrog | DPRINTF("%s: writing offset " TARGET_FMT_lx " value %08x width %d wcycle 0x%x\n", |
248 | c8b153d7 | ths | __func__, offset, value, width, pfl->wcycle); |
249 | 05ee37eb | balrog | |
250 | 05ee37eb | balrog | /* Set the device in I/O access mode */
|
251 | 05ee37eb | balrog | cpu_register_physical_memory(pfl->base, pfl->total_len, pfl->fl_mem); |
252 | 05ee37eb | balrog | boff = offset & (pfl->sector_len - 1);
|
253 | 05ee37eb | balrog | |
254 | 05ee37eb | balrog | if (pfl->width == 2) |
255 | 05ee37eb | balrog | boff = boff >> 1;
|
256 | 05ee37eb | balrog | else if (pfl->width == 4) |
257 | 05ee37eb | balrog | boff = boff >> 2;
|
258 | 05ee37eb | balrog | |
259 | 05ee37eb | balrog | switch (pfl->wcycle) {
|
260 | 05ee37eb | balrog | case 0: |
261 | 05ee37eb | balrog | /* read mode */
|
262 | 05ee37eb | balrog | switch (cmd) {
|
263 | 05ee37eb | balrog | case 0x00: /* ??? */ |
264 | 05ee37eb | balrog | goto reset_flash;
|
265 | d361be25 | balrog | case 0x10: /* Single Byte Program */ |
266 | d361be25 | balrog | case 0x40: /* Single Byte Program */ |
267 | d361be25 | balrog | DPRINTF(stderr, "%s: Single Byte Program\n", __func__);
|
268 | d361be25 | balrog | break;
|
269 | 05ee37eb | balrog | case 0x20: /* Block erase */ |
270 | 05ee37eb | balrog | p = pfl->storage; |
271 | 05ee37eb | balrog | offset &= ~(pfl->sector_len - 1);
|
272 | 05ee37eb | balrog | |
273 | c8b153d7 | ths | DPRINTF("%s: block erase at " TARGET_FMT_lx " bytes " |
274 | c8b153d7 | ths | TARGET_FMT_lx "\n",
|
275 | c8b153d7 | ths | __func__, offset, pfl->sector_len); |
276 | 05ee37eb | balrog | |
277 | 05ee37eb | balrog | memset(p + offset, 0xff, pfl->sector_len);
|
278 | 05ee37eb | balrog | pflash_update(pfl, offset, pfl->sector_len); |
279 | 05ee37eb | balrog | pfl->status |= 0x80; /* Ready! */ |
280 | 05ee37eb | balrog | break;
|
281 | 05ee37eb | balrog | case 0x50: /* Clear status bits */ |
282 | 05ee37eb | balrog | DPRINTF("%s: Clear status bits\n", __func__);
|
283 | 05ee37eb | balrog | pfl->status = 0x0;
|
284 | 05ee37eb | balrog | goto reset_flash;
|
285 | 05ee37eb | balrog | case 0x60: /* Block (un)lock */ |
286 | 05ee37eb | balrog | DPRINTF("%s: Block unlock\n", __func__);
|
287 | 05ee37eb | balrog | break;
|
288 | 05ee37eb | balrog | case 0x70: /* Status Register */ |
289 | 05ee37eb | balrog | DPRINTF("%s: Read status register\n", __func__);
|
290 | 05ee37eb | balrog | pfl->cmd = cmd; |
291 | 05ee37eb | balrog | return;
|
292 | 05ee37eb | balrog | case 0x98: /* CFI query */ |
293 | 05ee37eb | balrog | DPRINTF("%s: CFI query\n", __func__);
|
294 | 05ee37eb | balrog | break;
|
295 | 05ee37eb | balrog | case 0xe8: /* Write to buffer */ |
296 | 05ee37eb | balrog | DPRINTF("%s: Write to buffer\n", __func__);
|
297 | 05ee37eb | balrog | pfl->status |= 0x80; /* Ready! */ |
298 | 05ee37eb | balrog | break;
|
299 | 05ee37eb | balrog | case 0xff: /* Read array mode */ |
300 | 05ee37eb | balrog | DPRINTF("%s: Read array mode\n", __func__);
|
301 | 05ee37eb | balrog | goto reset_flash;
|
302 | 05ee37eb | balrog | default:
|
303 | 05ee37eb | balrog | goto error_flash;
|
304 | 05ee37eb | balrog | } |
305 | 05ee37eb | balrog | pfl->wcycle++; |
306 | 05ee37eb | balrog | pfl->cmd = cmd; |
307 | 05ee37eb | balrog | return;
|
308 | 05ee37eb | balrog | case 1: |
309 | 05ee37eb | balrog | switch (pfl->cmd) {
|
310 | d361be25 | balrog | case 0x10: /* Single Byte Program */ |
311 | d361be25 | balrog | case 0x40: /* Single Byte Program */ |
312 | d361be25 | balrog | DPRINTF("%s: Single Byte Program\n", __func__);
|
313 | d361be25 | balrog | pflash_data_write(pfl, offset, value, width); |
314 | d361be25 | balrog | pfl->status |= 0x80; /* Ready! */ |
315 | d361be25 | balrog | pfl->wcycle = 0;
|
316 | d361be25 | balrog | break;
|
317 | 05ee37eb | balrog | case 0x20: /* Block erase */ |
318 | 05ee37eb | balrog | case 0x28: |
319 | 05ee37eb | balrog | if (cmd == 0xd0) { /* confirm */ |
320 | 3656744c | balrog | pfl->wcycle = 0;
|
321 | 05ee37eb | balrog | pfl->status |= 0x80;
|
322 | 9248f413 | aurel32 | } else if (cmd == 0xff) { /* read array mode */ |
323 | 05ee37eb | balrog | goto reset_flash;
|
324 | 05ee37eb | balrog | } else
|
325 | 05ee37eb | balrog | goto error_flash;
|
326 | 05ee37eb | balrog | |
327 | 05ee37eb | balrog | break;
|
328 | 05ee37eb | balrog | case 0xe8: |
329 | 71fb2348 | balrog | DPRINTF("%s: block write of %x bytes\n", __func__, value);
|
330 | 71fb2348 | balrog | pfl->counter = value; |
331 | 05ee37eb | balrog | pfl->wcycle++; |
332 | 05ee37eb | balrog | break;
|
333 | 05ee37eb | balrog | case 0x60: |
334 | 05ee37eb | balrog | if (cmd == 0xd0) { |
335 | 05ee37eb | balrog | pfl->wcycle = 0;
|
336 | 05ee37eb | balrog | pfl->status |= 0x80;
|
337 | 05ee37eb | balrog | } else if (cmd == 0x01) { |
338 | 05ee37eb | balrog | pfl->wcycle = 0;
|
339 | 05ee37eb | balrog | pfl->status |= 0x80;
|
340 | 05ee37eb | balrog | } else if (cmd == 0xff) { |
341 | 05ee37eb | balrog | goto reset_flash;
|
342 | 05ee37eb | balrog | } else {
|
343 | 05ee37eb | balrog | DPRINTF("%s: Unknown (un)locking command\n", __func__);
|
344 | 05ee37eb | balrog | goto reset_flash;
|
345 | 05ee37eb | balrog | } |
346 | 05ee37eb | balrog | break;
|
347 | 05ee37eb | balrog | case 0x98: |
348 | 05ee37eb | balrog | if (cmd == 0xff) { |
349 | 05ee37eb | balrog | goto reset_flash;
|
350 | 05ee37eb | balrog | } else {
|
351 | 05ee37eb | balrog | DPRINTF("%s: leaving query mode\n", __func__);
|
352 | 05ee37eb | balrog | } |
353 | 05ee37eb | balrog | break;
|
354 | 05ee37eb | balrog | default:
|
355 | 05ee37eb | balrog | goto error_flash;
|
356 | 05ee37eb | balrog | } |
357 | 05ee37eb | balrog | return;
|
358 | 05ee37eb | balrog | case 2: |
359 | 05ee37eb | balrog | switch (pfl->cmd) {
|
360 | 05ee37eb | balrog | case 0xe8: /* Block write */ |
361 | d361be25 | balrog | pflash_data_write(pfl, offset, value, width); |
362 | 05ee37eb | balrog | |
363 | 05ee37eb | balrog | pfl->status |= 0x80;
|
364 | 05ee37eb | balrog | |
365 | 05ee37eb | balrog | if (!pfl->counter) {
|
366 | 05ee37eb | balrog | DPRINTF("%s: block write finished\n", __func__);
|
367 | 05ee37eb | balrog | pfl->wcycle++; |
368 | 05ee37eb | balrog | } |
369 | 05ee37eb | balrog | |
370 | 05ee37eb | balrog | pfl->counter--; |
371 | 05ee37eb | balrog | break;
|
372 | 7317b8ca | balrog | default:
|
373 | 7317b8ca | balrog | goto error_flash;
|
374 | 05ee37eb | balrog | } |
375 | 05ee37eb | balrog | return;
|
376 | 05ee37eb | balrog | case 3: /* Confirm mode */ |
377 | 05ee37eb | balrog | switch (pfl->cmd) {
|
378 | 05ee37eb | balrog | case 0xe8: /* Block write */ |
379 | 05ee37eb | balrog | if (cmd == 0xd0) { |
380 | 05ee37eb | balrog | pfl->wcycle = 0;
|
381 | 05ee37eb | balrog | pfl->status |= 0x80;
|
382 | 05ee37eb | balrog | } else {
|
383 | 05ee37eb | balrog | DPRINTF("%s: unknown command for \"write block\"\n", __func__);
|
384 | 05ee37eb | balrog | PFLASH_BUG("Write block confirm");
|
385 | 7317b8ca | balrog | goto reset_flash;
|
386 | 05ee37eb | balrog | } |
387 | 7317b8ca | balrog | break;
|
388 | 7317b8ca | balrog | default:
|
389 | 7317b8ca | balrog | goto error_flash;
|
390 | 05ee37eb | balrog | } |
391 | 05ee37eb | balrog | return;
|
392 | 05ee37eb | balrog | default:
|
393 | 05ee37eb | balrog | /* Should never happen */
|
394 | 05ee37eb | balrog | DPRINTF("%s: invalid write state\n", __func__);
|
395 | 05ee37eb | balrog | goto reset_flash;
|
396 | 05ee37eb | balrog | } |
397 | 05ee37eb | balrog | return;
|
398 | 05ee37eb | balrog | |
399 | 05ee37eb | balrog | error_flash:
|
400 | 05ee37eb | balrog | printf("%s: Unimplemented flash cmd sequence "
|
401 | 547012f4 | ths | "(offset " TARGET_FMT_lx ", wcycle 0x%x cmd 0x%x value 0x%x)\n", |
402 | c8b153d7 | ths | __func__, offset, pfl->wcycle, pfl->cmd, value); |
403 | 05ee37eb | balrog | |
404 | 05ee37eb | balrog | reset_flash:
|
405 | 05ee37eb | balrog | cpu_register_physical_memory(pfl->base, pfl->total_len, |
406 | 05ee37eb | balrog | pfl->off | IO_MEM_ROMD | pfl->fl_mem); |
407 | 05ee37eb | balrog | |
408 | 05ee37eb | balrog | pfl->bypass = 0;
|
409 | 05ee37eb | balrog | pfl->wcycle = 0;
|
410 | 05ee37eb | balrog | pfl->cmd = 0;
|
411 | 05ee37eb | balrog | return;
|
412 | 05ee37eb | balrog | } |
413 | 05ee37eb | balrog | |
414 | 05ee37eb | balrog | |
415 | 05ee37eb | balrog | static uint32_t pflash_readb (void *opaque, target_phys_addr_t addr) |
416 | 05ee37eb | balrog | { |
417 | 05ee37eb | balrog | return pflash_read(opaque, addr, 1); |
418 | 05ee37eb | balrog | } |
419 | 05ee37eb | balrog | |
420 | 05ee37eb | balrog | static uint32_t pflash_readw (void *opaque, target_phys_addr_t addr) |
421 | 05ee37eb | balrog | { |
422 | 05ee37eb | balrog | pflash_t *pfl = opaque; |
423 | 05ee37eb | balrog | |
424 | 05ee37eb | balrog | return pflash_read(pfl, addr, 2); |
425 | 05ee37eb | balrog | } |
426 | 05ee37eb | balrog | |
427 | 05ee37eb | balrog | static uint32_t pflash_readl (void *opaque, target_phys_addr_t addr) |
428 | 05ee37eb | balrog | { |
429 | 05ee37eb | balrog | pflash_t *pfl = opaque; |
430 | 05ee37eb | balrog | |
431 | 05ee37eb | balrog | return pflash_read(pfl, addr, 4); |
432 | 05ee37eb | balrog | } |
433 | 05ee37eb | balrog | |
434 | 05ee37eb | balrog | static void pflash_writeb (void *opaque, target_phys_addr_t addr, |
435 | 05ee37eb | balrog | uint32_t value) |
436 | 05ee37eb | balrog | { |
437 | 05ee37eb | balrog | pflash_write(opaque, addr, value, 1);
|
438 | 05ee37eb | balrog | } |
439 | 05ee37eb | balrog | |
440 | 05ee37eb | balrog | static void pflash_writew (void *opaque, target_phys_addr_t addr, |
441 | 05ee37eb | balrog | uint32_t value) |
442 | 05ee37eb | balrog | { |
443 | 05ee37eb | balrog | pflash_t *pfl = opaque; |
444 | 05ee37eb | balrog | |
445 | 05ee37eb | balrog | pflash_write(pfl, addr, value, 2);
|
446 | 05ee37eb | balrog | } |
447 | 05ee37eb | balrog | |
448 | 05ee37eb | balrog | static void pflash_writel (void *opaque, target_phys_addr_t addr, |
449 | 05ee37eb | balrog | uint32_t value) |
450 | 05ee37eb | balrog | { |
451 | 05ee37eb | balrog | pflash_t *pfl = opaque; |
452 | 05ee37eb | balrog | |
453 | 05ee37eb | balrog | pflash_write(pfl, addr, value, 4);
|
454 | 05ee37eb | balrog | } |
455 | 05ee37eb | balrog | |
456 | 05ee37eb | balrog | static CPUWriteMemoryFunc *pflash_write_ops[] = {
|
457 | 05ee37eb | balrog | &pflash_writeb, |
458 | 05ee37eb | balrog | &pflash_writew, |
459 | 05ee37eb | balrog | &pflash_writel, |
460 | 05ee37eb | balrog | }; |
461 | 05ee37eb | balrog | |
462 | 05ee37eb | balrog | static CPUReadMemoryFunc *pflash_read_ops[] = {
|
463 | 05ee37eb | balrog | &pflash_readb, |
464 | 05ee37eb | balrog | &pflash_readw, |
465 | 05ee37eb | balrog | &pflash_readl, |
466 | 05ee37eb | balrog | }; |
467 | 05ee37eb | balrog | |
468 | 05ee37eb | balrog | /* Count trailing zeroes of a 32 bits quantity */
|
469 | 05ee37eb | balrog | static int ctz32 (uint32_t n) |
470 | 05ee37eb | balrog | { |
471 | 05ee37eb | balrog | int ret;
|
472 | 05ee37eb | balrog | |
473 | 05ee37eb | balrog | ret = 0;
|
474 | 05ee37eb | balrog | if (!(n & 0xFFFF)) { |
475 | 05ee37eb | balrog | ret += 16;
|
476 | 05ee37eb | balrog | n = n >> 16;
|
477 | 05ee37eb | balrog | } |
478 | 05ee37eb | balrog | if (!(n & 0xFF)) { |
479 | 05ee37eb | balrog | ret += 8;
|
480 | 05ee37eb | balrog | n = n >> 8;
|
481 | 05ee37eb | balrog | } |
482 | 05ee37eb | balrog | if (!(n & 0xF)) { |
483 | 05ee37eb | balrog | ret += 4;
|
484 | 05ee37eb | balrog | n = n >> 4;
|
485 | 05ee37eb | balrog | } |
486 | 05ee37eb | balrog | if (!(n & 0x3)) { |
487 | 05ee37eb | balrog | ret += 2;
|
488 | 05ee37eb | balrog | n = n >> 2;
|
489 | 05ee37eb | balrog | } |
490 | 05ee37eb | balrog | if (!(n & 0x1)) { |
491 | 05ee37eb | balrog | ret++; |
492 | 05ee37eb | balrog | n = n >> 1;
|
493 | 05ee37eb | balrog | } |
494 | 05ee37eb | balrog | #if 0 /* This is not necessary as n is never 0 */
|
495 | 05ee37eb | balrog | if (!n)
|
496 | 05ee37eb | balrog | ret++;
|
497 | 05ee37eb | balrog | #endif
|
498 | 05ee37eb | balrog | |
499 | 05ee37eb | balrog | return ret;
|
500 | 05ee37eb | balrog | } |
501 | 05ee37eb | balrog | |
502 | 88eeee0a | balrog | pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, |
503 | c8b153d7 | ths | BlockDriverState *bs, uint32_t sector_len, |
504 | 88eeee0a | balrog | int nb_blocs, int width, |
505 | 88eeee0a | balrog | uint16_t id0, uint16_t id1, |
506 | 88eeee0a | balrog | uint16_t id2, uint16_t id3) |
507 | 05ee37eb | balrog | { |
508 | 05ee37eb | balrog | pflash_t *pfl; |
509 | 05ee37eb | balrog | target_long total_len; |
510 | 05ee37eb | balrog | |
511 | 05ee37eb | balrog | total_len = sector_len * nb_blocs; |
512 | 05ee37eb | balrog | |
513 | 05ee37eb | balrog | /* XXX: to be fixed */
|
514 | c8b153d7 | ths | #if 0
|
515 | 05ee37eb | balrog | if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) &&
|
516 | 05ee37eb | balrog | total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024))
|
517 | 05ee37eb | balrog | return NULL;
|
518 | c8b153d7 | ths | #endif
|
519 | 05ee37eb | balrog | |
520 | 05ee37eb | balrog | pfl = qemu_mallocz(sizeof(pflash_t));
|
521 | 05ee37eb | balrog | |
522 | 05ee37eb | balrog | pfl->storage = phys_ram_base + off; |
523 | 05ee37eb | balrog | pfl->fl_mem = cpu_register_io_memory(0,
|
524 | 05ee37eb | balrog | pflash_read_ops, pflash_write_ops, pfl); |
525 | 05ee37eb | balrog | pfl->off = off; |
526 | 05ee37eb | balrog | cpu_register_physical_memory(base, total_len, |
527 | 05ee37eb | balrog | off | pfl->fl_mem | IO_MEM_ROMD); |
528 | 05ee37eb | balrog | |
529 | 05ee37eb | balrog | pfl->bs = bs; |
530 | 05ee37eb | balrog | if (pfl->bs) {
|
531 | 05ee37eb | balrog | /* read the initial flash content */
|
532 | 05ee37eb | balrog | bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9); |
533 | 05ee37eb | balrog | } |
534 | 05ee37eb | balrog | #if 0 /* XXX: there should be a bit to set up read-only,
|
535 | 05ee37eb | balrog | * the same way the hardware does (with WP pin).
|
536 | 05ee37eb | balrog | */
|
537 | 05ee37eb | balrog | pfl->ro = 1;
|
538 | 05ee37eb | balrog | #else
|
539 | 05ee37eb | balrog | pfl->ro = 0;
|
540 | 05ee37eb | balrog | #endif
|
541 | 05ee37eb | balrog | pfl->timer = qemu_new_timer(vm_clock, pflash_timer, pfl); |
542 | 05ee37eb | balrog | pfl->base = base; |
543 | 05ee37eb | balrog | pfl->sector_len = sector_len; |
544 | 05ee37eb | balrog | pfl->total_len = total_len; |
545 | 05ee37eb | balrog | pfl->width = width; |
546 | 05ee37eb | balrog | pfl->wcycle = 0;
|
547 | 05ee37eb | balrog | pfl->cmd = 0;
|
548 | 05ee37eb | balrog | pfl->status = 0;
|
549 | 05ee37eb | balrog | pfl->ident[0] = id0;
|
550 | 05ee37eb | balrog | pfl->ident[1] = id1;
|
551 | 05ee37eb | balrog | pfl->ident[2] = id2;
|
552 | 05ee37eb | balrog | pfl->ident[3] = id3;
|
553 | 05ee37eb | balrog | /* Hardcoded CFI table */
|
554 | 05ee37eb | balrog | pfl->cfi_len = 0x52;
|
555 | 05ee37eb | balrog | /* Standard "QRY" string */
|
556 | 05ee37eb | balrog | pfl->cfi_table[0x10] = 'Q'; |
557 | 05ee37eb | balrog | pfl->cfi_table[0x11] = 'R'; |
558 | 05ee37eb | balrog | pfl->cfi_table[0x12] = 'Y'; |
559 | 05ee37eb | balrog | /* Command set (Intel) */
|
560 | 05ee37eb | balrog | pfl->cfi_table[0x13] = 0x01; |
561 | 05ee37eb | balrog | pfl->cfi_table[0x14] = 0x00; |
562 | 05ee37eb | balrog | /* Primary extended table address (none) */
|
563 | 05ee37eb | balrog | pfl->cfi_table[0x15] = 0x31; |
564 | 05ee37eb | balrog | pfl->cfi_table[0x16] = 0x00; |
565 | 05ee37eb | balrog | /* Alternate command set (none) */
|
566 | 05ee37eb | balrog | pfl->cfi_table[0x17] = 0x00; |
567 | 05ee37eb | balrog | pfl->cfi_table[0x18] = 0x00; |
568 | 05ee37eb | balrog | /* Alternate extended table (none) */
|
569 | 05ee37eb | balrog | pfl->cfi_table[0x19] = 0x00; |
570 | 05ee37eb | balrog | pfl->cfi_table[0x1A] = 0x00; |
571 | 05ee37eb | balrog | /* Vcc min */
|
572 | 05ee37eb | balrog | pfl->cfi_table[0x1B] = 0x45; |
573 | 05ee37eb | balrog | /* Vcc max */
|
574 | 05ee37eb | balrog | pfl->cfi_table[0x1C] = 0x55; |
575 | 05ee37eb | balrog | /* Vpp min (no Vpp pin) */
|
576 | 05ee37eb | balrog | pfl->cfi_table[0x1D] = 0x00; |
577 | 05ee37eb | balrog | /* Vpp max (no Vpp pin) */
|
578 | 05ee37eb | balrog | pfl->cfi_table[0x1E] = 0x00; |
579 | 05ee37eb | balrog | /* Reserved */
|
580 | 05ee37eb | balrog | pfl->cfi_table[0x1F] = 0x07; |
581 | 05ee37eb | balrog | /* Timeout for min size buffer write */
|
582 | 05ee37eb | balrog | pfl->cfi_table[0x20] = 0x07; |
583 | 05ee37eb | balrog | /* Typical timeout for block erase */
|
584 | 05ee37eb | balrog | pfl->cfi_table[0x21] = 0x0a; |
585 | 05ee37eb | balrog | /* Typical timeout for full chip erase (4096 ms) */
|
586 | 05ee37eb | balrog | pfl->cfi_table[0x22] = 0x00; |
587 | 05ee37eb | balrog | /* Reserved */
|
588 | 05ee37eb | balrog | pfl->cfi_table[0x23] = 0x04; |
589 | 05ee37eb | balrog | /* Max timeout for buffer write */
|
590 | 05ee37eb | balrog | pfl->cfi_table[0x24] = 0x04; |
591 | 05ee37eb | balrog | /* Max timeout for block erase */
|
592 | 05ee37eb | balrog | pfl->cfi_table[0x25] = 0x04; |
593 | 05ee37eb | balrog | /* Max timeout for chip erase */
|
594 | 05ee37eb | balrog | pfl->cfi_table[0x26] = 0x00; |
595 | 05ee37eb | balrog | /* Device size */
|
596 | 05ee37eb | balrog | pfl->cfi_table[0x27] = ctz32(total_len); // + 1; |
597 | 05ee37eb | balrog | /* Flash device interface (8 & 16 bits) */
|
598 | 05ee37eb | balrog | pfl->cfi_table[0x28] = 0x02; |
599 | 05ee37eb | balrog | pfl->cfi_table[0x29] = 0x00; |
600 | 05ee37eb | balrog | /* Max number of bytes in multi-bytes write */
|
601 | 71fb2348 | balrog | pfl->cfi_table[0x2A] = 0x0B; |
602 | 05ee37eb | balrog | pfl->cfi_table[0x2B] = 0x00; |
603 | 05ee37eb | balrog | /* Number of erase block regions (uniform) */
|
604 | 05ee37eb | balrog | pfl->cfi_table[0x2C] = 0x01; |
605 | 05ee37eb | balrog | /* Erase block region 1 */
|
606 | 05ee37eb | balrog | pfl->cfi_table[0x2D] = nb_blocs - 1; |
607 | 05ee37eb | balrog | pfl->cfi_table[0x2E] = (nb_blocs - 1) >> 8; |
608 | 05ee37eb | balrog | pfl->cfi_table[0x2F] = sector_len >> 8; |
609 | 05ee37eb | balrog | pfl->cfi_table[0x30] = sector_len >> 16; |
610 | 05ee37eb | balrog | |
611 | 05ee37eb | balrog | /* Extended */
|
612 | 05ee37eb | balrog | pfl->cfi_table[0x31] = 'P'; |
613 | 05ee37eb | balrog | pfl->cfi_table[0x32] = 'R'; |
614 | 05ee37eb | balrog | pfl->cfi_table[0x33] = 'I'; |
615 | 05ee37eb | balrog | |
616 | 05ee37eb | balrog | pfl->cfi_table[0x34] = '1'; |
617 | 05ee37eb | balrog | pfl->cfi_table[0x35] = '1'; |
618 | 05ee37eb | balrog | |
619 | 05ee37eb | balrog | pfl->cfi_table[0x36] = 0x00; |
620 | 05ee37eb | balrog | pfl->cfi_table[0x37] = 0x00; |
621 | 05ee37eb | balrog | pfl->cfi_table[0x38] = 0x00; |
622 | 05ee37eb | balrog | pfl->cfi_table[0x39] = 0x00; |
623 | 05ee37eb | balrog | |
624 | 05ee37eb | balrog | pfl->cfi_table[0x3a] = 0x00; |
625 | 05ee37eb | balrog | |
626 | 05ee37eb | balrog | pfl->cfi_table[0x3b] = 0x00; |
627 | 05ee37eb | balrog | pfl->cfi_table[0x3c] = 0x00; |
628 | 05ee37eb | balrog | |
629 | 05ee37eb | balrog | return pfl;
|
630 | 05ee37eb | balrog | } |