root / hw / spapr.c @ 4be403c8
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 8d90ad90 | David Gibson | #include "net.h" |
31 | 6e270446 | Ben Herrenschmidt | #include "blockdev.h" |
32 | e97c3636 | David Gibson | #include "cpus.h" |
33 | e97c3636 | David Gibson | #include "kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
43 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
44 | 0ee2c058 | Alexey Kardashevskiy | #include "hw/msi.h" |
45 | 9fdf0c29 | David Gibson | |
46 | f61b4bed | Alexander Graf | #include "kvm.h" |
47 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
48 | 3384f95c | David Gibson | #include "pci.h" |
49 | f28359d8 | zhlcindy@gmail.com | #include "vga-pci.h" |
50 | f61b4bed | Alexander Graf | |
51 | 890c2b77 | Avi Kivity | #include "exec-memory.h" |
52 | 35139a59 | David Gibson | #include "hw/usb.h" |
53 | 890c2b77 | Avi Kivity | |
54 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
55 | 9fdf0c29 | David Gibson | |
56 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF memory layout:
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57 | 4d8d5467 | Benjamin Herrenschmidt | *
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58 | 4d8d5467 | Benjamin Herrenschmidt | * SLOF raw image loaded at 0, copies its romfs right below the flat
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59 | 4d8d5467 | Benjamin Herrenschmidt | * device-tree, then position SLOF itself 31M below that
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60 | 4d8d5467 | Benjamin Herrenschmidt | *
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61 | 4d8d5467 | Benjamin Herrenschmidt | * So we set FW_OVERHEAD to 40MB which should account for all of that
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62 | 4d8d5467 | Benjamin Herrenschmidt | * and more
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63 | 4d8d5467 | Benjamin Herrenschmidt | *
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64 | 4d8d5467 | Benjamin Herrenschmidt | * We load our kernel at 4M, leaving space for SLOF initial image
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65 | 4d8d5467 | Benjamin Herrenschmidt | */
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66 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
67 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
68 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
69 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
70 | 4d8d5467 | Benjamin Herrenschmidt | #define FW_OVERHEAD 0x2800000 |
71 | 4d8d5467 | Benjamin Herrenschmidt | #define KERNEL_LOAD_ADDR FW_MAX_SIZE
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72 | a9f8ad8f | David Gibson | |
73 | 4d8d5467 | Benjamin Herrenschmidt | #define MIN_RMA_SLOF 128UL |
74 | 9fdf0c29 | David Gibson | |
75 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
76 | 9fdf0c29 | David Gibson | |
77 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
78 | 4d8d5467 | Benjamin Herrenschmidt | #define XICS_IRQS 1024 |
79 | 9fdf0c29 | David Gibson | |
80 | 3384f95c | David Gibson | #define SPAPR_PCI_BUID 0x800000020000001ULL |
81 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_ADDR (0x10000000000ULL + 0xA0000000) |
82 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_SIZE 0x20000000 |
83 | 3384f95c | David Gibson | #define SPAPR_PCI_IO_WIN_ADDR (0x10000000000ULL + 0x80000000) |
84 | 0ee2c058 | Alexey Kardashevskiy | #define SPAPR_PCI_MSI_WIN_ADDR (0x10000000000ULL + 0x90000000) |
85 | 3384f95c | David Gibson | |
86 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
87 | 0c103f8e | David Gibson | |
88 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
89 | 9fdf0c29 | David Gibson | |
90 | a307d594 | Alexey Kardashevskiy | int spapr_allocate_irq(int hint, enum xics_irq_type type) |
91 | e6c866d4 | David Gibson | { |
92 | a307d594 | Alexey Kardashevskiy | int irq;
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93 | e6c866d4 | David Gibson | |
94 | e6c866d4 | David Gibson | if (hint) {
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95 | e6c866d4 | David Gibson | irq = hint; |
96 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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97 | e6c866d4 | David Gibson | } else {
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98 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
99 | e6c866d4 | David Gibson | } |
100 | e6c866d4 | David Gibson | |
101 | a307d594 | Alexey Kardashevskiy | /* Configure irq type */
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102 | a307d594 | Alexey Kardashevskiy | if (!xics_get_qirq(spapr->icp, irq)) {
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103 | a307d594 | Alexey Kardashevskiy | return 0; |
104 | e6c866d4 | David Gibson | } |
105 | e6c866d4 | David Gibson | |
106 | a307d594 | Alexey Kardashevskiy | xics_set_irq_type(spapr->icp, irq, type); |
107 | e6c866d4 | David Gibson | |
108 | a307d594 | Alexey Kardashevskiy | return irq;
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109 | e6c866d4 | David Gibson | } |
110 | e6c866d4 | David Gibson | |
111 | f4b9523b | Alexey Kardashevskiy | /* Allocate block of consequtive IRQs, returns a number of the first */
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112 | f4b9523b | Alexey Kardashevskiy | int spapr_allocate_irq_block(int num, enum xics_irq_type type) |
113 | f4b9523b | Alexey Kardashevskiy | { |
114 | f4b9523b | Alexey Kardashevskiy | int first = -1; |
115 | f4b9523b | Alexey Kardashevskiy | int i;
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116 | f4b9523b | Alexey Kardashevskiy | |
117 | f4b9523b | Alexey Kardashevskiy | for (i = 0; i < num; ++i) { |
118 | f4b9523b | Alexey Kardashevskiy | int irq;
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119 | f4b9523b | Alexey Kardashevskiy | |
120 | f4b9523b | Alexey Kardashevskiy | irq = spapr_allocate_irq(0, type);
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121 | f4b9523b | Alexey Kardashevskiy | if (!irq) {
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122 | f4b9523b | Alexey Kardashevskiy | return -1; |
123 | f4b9523b | Alexey Kardashevskiy | } |
124 | f4b9523b | Alexey Kardashevskiy | |
125 | f4b9523b | Alexey Kardashevskiy | if (0 == i) { |
126 | f4b9523b | Alexey Kardashevskiy | first = irq; |
127 | f4b9523b | Alexey Kardashevskiy | } |
128 | f4b9523b | Alexey Kardashevskiy | |
129 | f4b9523b | Alexey Kardashevskiy | /* If the above doesn't create a consecutive block then that's
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130 | f4b9523b | Alexey Kardashevskiy | * an internal bug */
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131 | f4b9523b | Alexey Kardashevskiy | assert(irq == (first + i)); |
132 | f4b9523b | Alexey Kardashevskiy | } |
133 | f4b9523b | Alexey Kardashevskiy | |
134 | f4b9523b | Alexey Kardashevskiy | return first;
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135 | f4b9523b | Alexey Kardashevskiy | } |
136 | f4b9523b | Alexey Kardashevskiy | |
137 | 6e806cc3 | Bharata B Rao | static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr) |
138 | 6e806cc3 | Bharata B Rao | { |
139 | 6e806cc3 | Bharata B Rao | int ret = 0, offset; |
140 | e2684c0b | Andreas Färber | CPUPPCState *env; |
141 | 6e806cc3 | Bharata B Rao | char cpu_model[32]; |
142 | 6e806cc3 | Bharata B Rao | int smt = kvmppc_smt_threads();
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143 | 6e806cc3 | Bharata B Rao | |
144 | 6e806cc3 | Bharata B Rao | assert(spapr->cpu_model); |
145 | 6e806cc3 | Bharata B Rao | |
146 | 6e806cc3 | Bharata B Rao | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
147 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x5),
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148 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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149 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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150 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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151 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->numa_node), |
152 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->cpu_index)}; |
153 | 6e806cc3 | Bharata B Rao | |
154 | 6e806cc3 | Bharata B Rao | if ((env->cpu_index % smt) != 0) { |
155 | 6e806cc3 | Bharata B Rao | continue;
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156 | 6e806cc3 | Bharata B Rao | } |
157 | 6e806cc3 | Bharata B Rao | |
158 | 6e806cc3 | Bharata B Rao | snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, |
159 | 6e806cc3 | Bharata B Rao | env->cpu_index); |
160 | 6e806cc3 | Bharata B Rao | |
161 | 6e806cc3 | Bharata B Rao | offset = fdt_path_offset(fdt, cpu_model); |
162 | 6e806cc3 | Bharata B Rao | if (offset < 0) { |
163 | 6e806cc3 | Bharata B Rao | return offset;
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164 | 6e806cc3 | Bharata B Rao | } |
165 | 6e806cc3 | Bharata B Rao | |
166 | 6e806cc3 | Bharata B Rao | ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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167 | 6e806cc3 | Bharata B Rao | sizeof(associativity));
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168 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
169 | 6e806cc3 | Bharata B Rao | return ret;
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170 | 6e806cc3 | Bharata B Rao | } |
171 | 6e806cc3 | Bharata B Rao | } |
172 | 6e806cc3 | Bharata B Rao | return ret;
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173 | 6e806cc3 | Bharata B Rao | } |
174 | 6e806cc3 | Bharata B Rao | |
175 | 5af9873d | Benjamin Herrenschmidt | |
176 | 5af9873d | Benjamin Herrenschmidt | static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
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177 | 5af9873d | Benjamin Herrenschmidt | size_t maxsize) |
178 | 5af9873d | Benjamin Herrenschmidt | { |
179 | 5af9873d | Benjamin Herrenschmidt | size_t maxcells = maxsize / sizeof(uint32_t);
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180 | 5af9873d | Benjamin Herrenschmidt | int i, j, count;
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181 | 5af9873d | Benjamin Herrenschmidt | uint32_t *p = prop; |
182 | 5af9873d | Benjamin Herrenschmidt | |
183 | 5af9873d | Benjamin Herrenschmidt | for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) { |
184 | 5af9873d | Benjamin Herrenschmidt | struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
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185 | 5af9873d | Benjamin Herrenschmidt | |
186 | 5af9873d | Benjamin Herrenschmidt | if (!sps->page_shift) {
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187 | 5af9873d | Benjamin Herrenschmidt | break;
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188 | 5af9873d | Benjamin Herrenschmidt | } |
189 | 5af9873d | Benjamin Herrenschmidt | for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) { |
190 | 5af9873d | Benjamin Herrenschmidt | if (sps->enc[count].page_shift == 0) { |
191 | 5af9873d | Benjamin Herrenschmidt | break;
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192 | 5af9873d | Benjamin Herrenschmidt | } |
193 | 5af9873d | Benjamin Herrenschmidt | } |
194 | 5af9873d | Benjamin Herrenschmidt | if ((p - prop) >= (maxcells - 3 - count * 2)) { |
195 | 5af9873d | Benjamin Herrenschmidt | break;
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196 | 5af9873d | Benjamin Herrenschmidt | } |
197 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->page_shift); |
198 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->slb_enc); |
199 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(count); |
200 | 5af9873d | Benjamin Herrenschmidt | for (j = 0; j < count; j++) { |
201 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].page_shift); |
202 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].pte_enc); |
203 | 5af9873d | Benjamin Herrenschmidt | } |
204 | 5af9873d | Benjamin Herrenschmidt | } |
205 | 5af9873d | Benjamin Herrenschmidt | |
206 | 5af9873d | Benjamin Herrenschmidt | return (p - prop) * sizeof(uint32_t); |
207 | 5af9873d | Benjamin Herrenschmidt | } |
208 | 5af9873d | Benjamin Herrenschmidt | |
209 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
210 | 354ac20a | David Gibson | target_phys_addr_t rma_size, |
211 | a3467baa | David Gibson | target_phys_addr_t initrd_base, |
212 | a3467baa | David Gibson | target_phys_addr_t initrd_size, |
213 | 4d8d5467 | Benjamin Herrenschmidt | target_phys_addr_t kernel_size, |
214 | a3467baa | David Gibson | const char *boot_device, |
215 | a3467baa | David Gibson | const char *kernel_cmdline, |
216 | a3467baa | David Gibson | long hash_shift)
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217 | 9fdf0c29 | David Gibson | { |
218 | 9fdf0c29 | David Gibson | void *fdt;
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219 | e2684c0b | Andreas Färber | CPUPPCState *env; |
220 | 6e806cc3 | Bharata B Rao | uint64_t mem_reg_property[2];
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221 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
222 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
223 | f43e3525 | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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224 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
225 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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226 | c73e3771 | Benjamin Herrenschmidt | char qemu_hypertas_prop[] = "hcall-memop1"; |
227 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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228 | 9fdf0c29 | David Gibson | int i;
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229 | 9fdf0c29 | David Gibson | char *modelname;
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230 | e97c3636 | David Gibson | int smt = kvmppc_smt_threads();
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231 | 6e806cc3 | Bharata B Rao | unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; |
232 | 6e806cc3 | Bharata B Rao | uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; |
233 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0), |
234 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0), cpu_to_be32(0x0), |
235 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0)};
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236 | 6e806cc3 | Bharata B Rao | char mem_name[32]; |
237 | 6e806cc3 | Bharata B Rao | target_phys_addr_t node0_size, mem_start; |
238 | 9fdf0c29 | David Gibson | |
239 | 9fdf0c29 | David Gibson | #define _FDT(exp) \
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240 | 9fdf0c29 | David Gibson | do { \
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241 | 9fdf0c29 | David Gibson | int ret = (exp); \
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242 | 9fdf0c29 | David Gibson | if (ret < 0) { \ |
243 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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244 | 9fdf0c29 | David Gibson | #exp, fdt_strerror(ret)); \
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245 | 9fdf0c29 | David Gibson | exit(1); \
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246 | 9fdf0c29 | David Gibson | } \ |
247 | 9fdf0c29 | David Gibson | } while (0) |
248 | 9fdf0c29 | David Gibson | |
249 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
250 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
251 | 9fdf0c29 | David Gibson | |
252 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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253 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size))); |
254 | 4d8d5467 | Benjamin Herrenschmidt | } |
255 | 4d8d5467 | Benjamin Herrenschmidt | if (initrd_size) {
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256 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size))); |
257 | 4d8d5467 | Benjamin Herrenschmidt | } |
258 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
259 | 9fdf0c29 | David Gibson | |
260 | 9fdf0c29 | David Gibson | /* Root node */
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261 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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262 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
263 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
264 | 9fdf0c29 | David Gibson | |
265 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
266 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
267 | 9fdf0c29 | David Gibson | |
268 | 9fdf0c29 | David Gibson | /* /chosen */
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269 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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270 | 9fdf0c29 | David Gibson | |
271 | 6e806cc3 | Bharata B Rao | /* Set Form1_affinity */
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272 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5)))); |
273 | 6e806cc3 | Bharata B Rao | |
274 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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275 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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276 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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277 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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278 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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279 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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280 | 4d8d5467 | Benjamin Herrenschmidt | uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
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281 | 4d8d5467 | Benjamin Herrenschmidt | cpu_to_be64(kernel_size) }; |
282 | 9fdf0c29 | David Gibson | |
283 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop)))); |
284 | 4d8d5467 | Benjamin Herrenschmidt | } |
285 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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286 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
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287 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
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288 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
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289 | 3384f95c | David Gibson | |
290 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
291 | 9fdf0c29 | David Gibson | |
292 | 354ac20a | David Gibson | /* memory node(s) */
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293 | 6e806cc3 | Bharata B Rao | node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size; |
294 | 6e806cc3 | Bharata B Rao | if (rma_size > node0_size) {
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295 | 6e806cc3 | Bharata B Rao | rma_size = node0_size; |
296 | 6e806cc3 | Bharata B Rao | } |
297 | 9fdf0c29 | David Gibson | |
298 | 6e806cc3 | Bharata B Rao | /* RMA */
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299 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = 0; |
300 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(rma_size);
|
301 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, "memory@0")));
|
302 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
303 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
|
304 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
|
305 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
|
306 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
|
307 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
308 | 9fdf0c29 | David Gibson | |
309 | 6e806cc3 | Bharata B Rao | /* RAM: Node 0 */
|
310 | 6e806cc3 | Bharata B Rao | if (node0_size > rma_size) {
|
311 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(rma_size);
|
312 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node0_size - rma_size);
|
313 | 354ac20a | David Gibson | |
314 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, rma_size);
|
315 | 354ac20a | David Gibson | _FDT((fdt_begin_node(fdt, mem_name))); |
316 | 354ac20a | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
317 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
|
318 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
|
319 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
|
320 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
|
321 | 354ac20a | David Gibson | _FDT((fdt_end_node(fdt))); |
322 | 354ac20a | David Gibson | } |
323 | 354ac20a | David Gibson | |
324 | 6e806cc3 | Bharata B Rao | /* RAM: Node 1 and beyond */
|
325 | 6e806cc3 | Bharata B Rao | mem_start = node0_size; |
326 | 6e806cc3 | Bharata B Rao | for (i = 1; i < nb_numa_nodes; i++) { |
327 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(mem_start);
|
328 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node_mem[i]);
|
329 | 6e806cc3 | Bharata B Rao | associativity[3] = associativity[4] = cpu_to_be32(i); |
330 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
|
331 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, mem_name))); |
332 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
333 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
|
334 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
|
335 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
|
336 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
|
337 | 6e806cc3 | Bharata B Rao | _FDT((fdt_end_node(fdt))); |
338 | 6e806cc3 | Bharata B Rao | mem_start += node_mem[i]; |
339 | 6e806cc3 | Bharata B Rao | } |
340 | 6e806cc3 | Bharata B Rao | |
341 | 9fdf0c29 | David Gibson | /* cpus */
|
342 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
|
343 | 9fdf0c29 | David Gibson | |
344 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
345 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
346 | 9fdf0c29 | David Gibson | |
347 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
348 | 9fdf0c29 | David Gibson | |
349 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
350 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
351 | 9fdf0c29 | David Gibson | } |
352 | 9fdf0c29 | David Gibson | |
353 | 6e806cc3 | Bharata B Rao | /* This is needed during FDT finalization */
|
354 | 6e806cc3 | Bharata B Rao | spapr->cpu_model = g_strdup(modelname); |
355 | 6e806cc3 | Bharata B Rao | |
356 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
357 | c7a5c0c9 | David Gibson | int index = env->cpu_index;
|
358 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
359 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
|
360 | 9fdf0c29 | David Gibson | char *nodename;
|
361 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
362 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
363 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
364 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
365 | 5af9873d | Benjamin Herrenschmidt | uint32_t page_sizes_prop[64];
|
366 | 5af9873d | Benjamin Herrenschmidt | size_t page_sizes_prop_size; |
367 | 9fdf0c29 | David Gibson | |
368 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
369 | e97c3636 | David Gibson | continue;
|
370 | e97c3636 | David Gibson | } |
371 | e97c3636 | David Gibson | |
372 | c7a5c0c9 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, index) < 0) { |
373 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
|
374 | 9fdf0c29 | David Gibson | exit(1);
|
375 | 9fdf0c29 | David Gibson | } |
376 | 9fdf0c29 | David Gibson | |
377 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
378 | 9fdf0c29 | David Gibson | |
379 | 9fdf0c29 | David Gibson | free(nodename); |
380 | 9fdf0c29 | David Gibson | |
381 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
|
382 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
383 | 9fdf0c29 | David Gibson | |
384 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
385 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
|
386 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
387 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
|
388 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
389 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
390 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
391 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
392 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,pft-size",
|
393 | f43e3525 | David Gibson | pft_size_prop, sizeof(pft_size_prop))));
|
394 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
395 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
396 | e97c3636 | David Gibson | |
397 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
|
398 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
399 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
400 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
|
401 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
|
402 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
403 | e97c3636 | David Gibson | } |
404 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
405 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
|
406 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
407 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
|
408 | 9fdf0c29 | David Gibson | |
409 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
410 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
411 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
|
412 | 9fdf0c29 | David Gibson | } |
413 | 9fdf0c29 | David Gibson | |
414 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
|
415 | 6659394f | David Gibson | * 0 / no property == no vector extensions
|
416 | 6659394f | David Gibson | * 1 == VMX / Altivec available
|
417 | 6659394f | David Gibson | * 2 == VSX available */
|
418 | a7342588 | David Gibson | if (env->insns_flags & PPC_ALTIVEC) {
|
419 | a7342588 | David Gibson | uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; |
420 | a7342588 | David Gibson | |
421 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
422 | 6659394f | David Gibson | } |
423 | 6659394f | David Gibson | |
424 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
|
425 | 6659394f | David Gibson | * 0 / no property == no DFP
|
426 | 6659394f | David Gibson | * 1 == DFP available */
|
427 | a7342588 | David Gibson | if (env->insns_flags2 & PPC2_DFP) {
|
428 | a7342588 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); |
429 | 6659394f | David Gibson | } |
430 | 6659394f | David Gibson | |
431 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop, |
432 | 5af9873d | Benjamin Herrenschmidt | sizeof(page_sizes_prop));
|
433 | 5af9873d | Benjamin Herrenschmidt | if (page_sizes_prop_size) {
|
434 | 5af9873d | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
|
435 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop, page_sizes_prop_size))); |
436 | 5af9873d | Benjamin Herrenschmidt | } |
437 | 5af9873d | Benjamin Herrenschmidt | |
438 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
439 | 9fdf0c29 | David Gibson | } |
440 | 9fdf0c29 | David Gibson | |
441 | 7267c094 | Anthony Liguori | g_free(modelname); |
442 | 9fdf0c29 | David Gibson | |
443 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
444 | 9fdf0c29 | David Gibson | |
445 | f43e3525 | David Gibson | /* RTAS */
|
446 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
|
447 | f43e3525 | David Gibson | |
448 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
449 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
|
450 | c73e3771 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
|
451 | c73e3771 | Benjamin Herrenschmidt | sizeof(qemu_hypertas_prop))));
|
452 | f43e3525 | David Gibson | |
453 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
454 | 6e806cc3 | Bharata B Rao | refpoints, sizeof(refpoints))));
|
455 | 6e806cc3 | Bharata B Rao | |
456 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
457 | f43e3525 | David Gibson | |
458 | b5cec4c5 | David Gibson | /* interrupt controller */
|
459 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
460 | b5cec4c5 | David Gibson | |
461 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
|
462 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
|
463 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
464 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
465 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
466 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
467 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
|
468 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
469 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
470 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
471 | b5cec4c5 | David Gibson | |
472 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
473 | b5cec4c5 | David Gibson | |
474 | 4040ab72 | David Gibson | /* vdevice */
|
475 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
|
476 | 4040ab72 | David Gibson | |
477 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
478 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
479 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
480 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
481 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
482 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
483 | 4040ab72 | David Gibson | |
484 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
485 | 4040ab72 | David Gibson | |
486 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
|
487 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
488 | 9fdf0c29 | David Gibson | |
489 | a3467baa | David Gibson | return fdt;
|
490 | a3467baa | David Gibson | } |
491 | a3467baa | David Gibson | |
492 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
493 | a3467baa | David Gibson | target_phys_addr_t fdt_addr, |
494 | a3467baa | David Gibson | target_phys_addr_t rtas_addr, |
495 | a3467baa | David Gibson | target_phys_addr_t rtas_size) |
496 | a3467baa | David Gibson | { |
497 | a3467baa | David Gibson | int ret;
|
498 | a3467baa | David Gibson | void *fdt;
|
499 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
500 | a3467baa | David Gibson | |
501 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
502 | a3467baa | David Gibson | |
503 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
504 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
505 | 4040ab72 | David Gibson | |
506 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
507 | 4040ab72 | David Gibson | if (ret < 0) { |
508 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
509 | 4040ab72 | David Gibson | exit(1);
|
510 | 4040ab72 | David Gibson | } |
511 | 4040ab72 | David Gibson | |
512 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
513 | e0fdbd7c | Alexey Kardashevskiy | ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt); |
514 | 3384f95c | David Gibson | } |
515 | 3384f95c | David Gibson | |
516 | 3384f95c | David Gibson | if (ret < 0) { |
517 | 3384f95c | David Gibson | fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
518 | 3384f95c | David Gibson | exit(1);
|
519 | 3384f95c | David Gibson | } |
520 | 3384f95c | David Gibson | |
521 | 39ac8455 | David Gibson | /* RTAS */
|
522 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
523 | 39ac8455 | David Gibson | if (ret < 0) { |
524 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
525 | 39ac8455 | David Gibson | } |
526 | 39ac8455 | David Gibson | |
527 | 6e806cc3 | Bharata B Rao | /* Advertise NUMA via ibm,associativity */
|
528 | 6e806cc3 | Bharata B Rao | if (nb_numa_nodes > 1) { |
529 | 6e806cc3 | Bharata B Rao | ret = spapr_set_associativity(fdt, spapr); |
530 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
531 | 6e806cc3 | Bharata B Rao | fprintf(stderr, "Couldn't set up NUMA device tree properties\n");
|
532 | 6e806cc3 | Bharata B Rao | } |
533 | 6e806cc3 | Bharata B Rao | } |
534 | 6e806cc3 | Bharata B Rao | |
535 | 3fc5acde | Alexander Graf | if (!spapr->has_graphics) {
|
536 | f28359d8 | zhlcindy@gmail.com | spapr_populate_chosen_stdout(fdt, spapr->vio_bus); |
537 | f28359d8 | zhlcindy@gmail.com | } |
538 | 68f3a94c | David Gibson | |
539 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
540 | 4040ab72 | David Gibson | |
541 | 4d8d5467 | Benjamin Herrenschmidt | if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
542 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
543 | 4d8d5467 | Benjamin Herrenschmidt | fdt_totalsize(fdt), FDT_MAX_SIZE); |
544 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
545 | 4d8d5467 | Benjamin Herrenschmidt | } |
546 | 4d8d5467 | Benjamin Herrenschmidt | |
547 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
548 | 9fdf0c29 | David Gibson | |
549 | 7267c094 | Anthony Liguori | g_free(fdt); |
550 | 9fdf0c29 | David Gibson | } |
551 | 9fdf0c29 | David Gibson | |
552 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
553 | 9fdf0c29 | David Gibson | { |
554 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
555 | 9fdf0c29 | David Gibson | } |
556 | 9fdf0c29 | David Gibson | |
557 | e2684c0b | Andreas Färber | static void emulate_spapr_hypercall(CPUPPCState *env) |
558 | 9fdf0c29 | David Gibson | { |
559 | 9fdf0c29 | David Gibson | env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
560 | 9fdf0c29 | David Gibson | } |
561 | 9fdf0c29 | David Gibson | |
562 | a3467baa | David Gibson | static void spapr_reset(void *opaque) |
563 | a3467baa | David Gibson | { |
564 | a3467baa | David Gibson | sPAPREnvironment *spapr = (sPAPREnvironment *)opaque; |
565 | a3467baa | David Gibson | |
566 | a3467baa | David Gibson | /* flush out the hash table */
|
567 | a3467baa | David Gibson | memset(spapr->htab, 0, spapr->htab_size);
|
568 | a3467baa | David Gibson | |
569 | a3467baa | David Gibson | /* Load the fdt */
|
570 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
571 | a3467baa | David Gibson | spapr->rtas_size); |
572 | a3467baa | David Gibson | |
573 | a3467baa | David Gibson | /* Set up the entry state */
|
574 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
575 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
576 | a3467baa | David Gibson | first_cpu->halted = 0;
|
577 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
578 | a3467baa | David Gibson | |
579 | a3467baa | David Gibson | } |
580 | a3467baa | David Gibson | |
581 | 1bba0dc9 | Andreas Färber | static void spapr_cpu_reset(void *opaque) |
582 | 1bba0dc9 | Andreas Färber | { |
583 | 5b2038e0 | Andreas Färber | PowerPCCPU *cpu = opaque; |
584 | 1bba0dc9 | Andreas Färber | |
585 | 5b2038e0 | Andreas Färber | cpu_reset(CPU(cpu)); |
586 | 1bba0dc9 | Andreas Färber | } |
587 | 1bba0dc9 | Andreas Färber | |
588 | 8c57b867 | Alexander Graf | /* Returns whether we want to use VGA or not */
|
589 | f28359d8 | zhlcindy@gmail.com | static int spapr_vga_init(PCIBus *pci_bus) |
590 | f28359d8 | zhlcindy@gmail.com | { |
591 | 8c57b867 | Alexander Graf | switch (vga_interface_type) {
|
592 | 8c57b867 | Alexander Graf | case VGA_STD:
|
593 | f28359d8 | zhlcindy@gmail.com | pci_vga_init(pci_bus); |
594 | 8c57b867 | Alexander Graf | return 1; |
595 | 8c57b867 | Alexander Graf | case VGA_NONE:
|
596 | 8c57b867 | Alexander Graf | return 0; |
597 | 8c57b867 | Alexander Graf | default:
|
598 | f28359d8 | zhlcindy@gmail.com | fprintf(stderr, "This vga model is not supported,"
|
599 | f28359d8 | zhlcindy@gmail.com | "currently it only supports -vga std\n");
|
600 | 8c57b867 | Alexander Graf | exit(0);
|
601 | 8c57b867 | Alexander Graf | break;
|
602 | f28359d8 | zhlcindy@gmail.com | } |
603 | f28359d8 | zhlcindy@gmail.com | } |
604 | f28359d8 | zhlcindy@gmail.com | |
605 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
606 | 9fdf0c29 | David Gibson | static void ppc_spapr_init(ram_addr_t ram_size, |
607 | 9fdf0c29 | David Gibson | const char *boot_device, |
608 | 9fdf0c29 | David Gibson | const char *kernel_filename, |
609 | 9fdf0c29 | David Gibson | const char *kernel_cmdline, |
610 | 9fdf0c29 | David Gibson | const char *initrd_filename, |
611 | 9fdf0c29 | David Gibson | const char *cpu_model) |
612 | 9fdf0c29 | David Gibson | { |
613 | 05769733 | Andreas Färber | PowerPCCPU *cpu; |
614 | e2684c0b | Andreas Färber | CPUPPCState *env; |
615 | 8c9f64df | Andreas Färber | PCIHostState *phb; |
616 | 9fdf0c29 | David Gibson | int i;
|
617 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
618 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
619 | 354ac20a | David Gibson | target_phys_addr_t rma_alloc_size, rma_size; |
620 | 4d8d5467 | Benjamin Herrenschmidt | uint32_t initrd_base = 0;
|
621 | 4d8d5467 | Benjamin Herrenschmidt | long kernel_size = 0, initrd_size = 0; |
622 | 4d8d5467 | Benjamin Herrenschmidt | long load_limit, rtas_limit, fw_size;
|
623 | f43e3525 | David Gibson | long pteg_shift = 17; |
624 | 39ac8455 | David Gibson | char *filename;
|
625 | 9fdf0c29 | David Gibson | |
626 | 0ee2c058 | Alexey Kardashevskiy | msi_supported = true;
|
627 | 0ee2c058 | Alexey Kardashevskiy | |
628 | d43b45e2 | David Gibson | spapr = g_malloc0(sizeof(*spapr));
|
629 | d43b45e2 | David Gibson | QLIST_INIT(&spapr->phbs); |
630 | d43b45e2 | David Gibson | |
631 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
632 | 9fdf0c29 | David Gibson | |
633 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
634 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
635 | 354ac20a | David Gibson | |
636 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
637 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
638 | 354ac20a | David Gibson | exit(1);
|
639 | 354ac20a | David Gibson | } |
640 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
641 | 354ac20a | David Gibson | rma_size = rma_alloc_size; |
642 | 354ac20a | David Gibson | } else {
|
643 | 354ac20a | David Gibson | rma_size = ram_size; |
644 | 354ac20a | David Gibson | } |
645 | 354ac20a | David Gibson | |
646 | 4d8d5467 | Benjamin Herrenschmidt | /* We place the device tree and RTAS just below either the top of the RMA,
|
647 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
648 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
649 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit = MIN(rma_size, 0x80000000);
|
650 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE; |
651 | 4d8d5467 | Benjamin Herrenschmidt | spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE; |
652 | 4d8d5467 | Benjamin Herrenschmidt | load_limit = spapr->fdt_addr - FW_OVERHEAD; |
653 | 9fdf0c29 | David Gibson | |
654 | 9fdf0c29 | David Gibson | /* init CPUs */
|
655 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
656 | 6b7a2cf6 | David Gibson | cpu_model = kvm_enabled() ? "host" : "POWER7"; |
657 | 9fdf0c29 | David Gibson | } |
658 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
659 | 05769733 | Andreas Färber | cpu = cpu_ppc_init(cpu_model); |
660 | 05769733 | Andreas Färber | if (cpu == NULL) { |
661 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
662 | 9fdf0c29 | David Gibson | exit(1);
|
663 | 9fdf0c29 | David Gibson | } |
664 | 05769733 | Andreas Färber | env = &cpu->env; |
665 | 05769733 | Andreas Färber | |
666 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
667 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
668 | 5b2038e0 | Andreas Färber | qemu_register_reset(spapr_cpu_reset, cpu); |
669 | 9fdf0c29 | David Gibson | |
670 | 9fdf0c29 | David Gibson | env->hreset_vector = 0x60;
|
671 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
672 | c7a5c0c9 | David Gibson | env->gpr[3] = env->cpu_index;
|
673 | 9fdf0c29 | David Gibson | } |
674 | 9fdf0c29 | David Gibson | |
675 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
676 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
677 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
678 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
679 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
680 | 354ac20a | David Gibson | |
681 | c5705a77 | Avi Kivity | memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
|
682 | c5705a77 | Avi Kivity | vmstate_register_ram_global(ram); |
683 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
684 | 354ac20a | David Gibson | } |
685 | 9fdf0c29 | David Gibson | |
686 | f43e3525 | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
687 | f43e3525 | David Gibson | * later we should probably make it scale to the size of guest
|
688 | f43e3525 | David Gibson | * RAM */
|
689 | a3467baa | David Gibson | spapr->htab_size = 1ULL << (pteg_shift + 7); |
690 | f61b4bed | Alexander Graf | spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size); |
691 | f43e3525 | David Gibson | |
692 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
693 | a3467baa | David Gibson | env->external_htab = spapr->htab; |
694 | c7a5c0c9 | David Gibson | env->htab_base = -1;
|
695 | a3467baa | David Gibson | env->htab_mask = spapr->htab_size - 1;
|
696 | f61b4bed | Alexander Graf | |
697 | f61b4bed | Alexander Graf | /* Tell KVM that we're in PAPR mode */
|
698 | f61b4bed | Alexander Graf | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
699 | f61b4bed | Alexander Graf | ((pteg_shift + 7) - 18); |
700 | f61b4bed | Alexander Graf | env->spr[SPR_HIOR] = 0;
|
701 | f61b4bed | Alexander Graf | |
702 | f61b4bed | Alexander Graf | if (kvm_enabled()) {
|
703 | f61b4bed | Alexander Graf | kvmppc_set_papr(env); |
704 | f61b4bed | Alexander Graf | } |
705 | f43e3525 | David Gibson | } |
706 | f43e3525 | David Gibson | |
707 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
708 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
709 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit - spapr->rtas_addr); |
710 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
711 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
712 | 39ac8455 | David Gibson | exit(1);
|
713 | 39ac8455 | David Gibson | } |
714 | 4d8d5467 | Benjamin Herrenschmidt | if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
715 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
716 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_size, RTAS_MAX_SIZE); |
717 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
718 | 4d8d5467 | Benjamin Herrenschmidt | } |
719 | 7267c094 | Anthony Liguori | g_free(filename); |
720 | 39ac8455 | David Gibson | |
721 | 4d8d5467 | Benjamin Herrenschmidt | |
722 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
723 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
724 | e6c866d4 | David Gibson | spapr->next_irq = 16;
|
725 | b5cec4c5 | David Gibson | |
726 | ad0ebb91 | David Gibson | /* Set up IOMMU */
|
727 | ad0ebb91 | David Gibson | spapr_iommu_init(); |
728 | ad0ebb91 | David Gibson | |
729 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
730 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
731 | 4040ab72 | David Gibson | |
732 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
733 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
734 | d601fac4 | David Gibson | spapr_vty_create(spapr->vio_bus, serial_hds[i]); |
735 | 4040ab72 | David Gibson | } |
736 | 4040ab72 | David Gibson | } |
737 | 9fdf0c29 | David Gibson | |
738 | 3384f95c | David Gibson | /* Set up PCI */
|
739 | fa28f71b | Alexey Kardashevskiy | spapr_pci_rtas_init(); |
740 | fa28f71b | Alexey Kardashevskiy | |
741 | 3384f95c | David Gibson | spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
|
742 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_ADDR, |
743 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_SIZE, |
744 | 0ee2c058 | Alexey Kardashevskiy | SPAPR_PCI_IO_WIN_ADDR, |
745 | 0ee2c058 | Alexey Kardashevskiy | SPAPR_PCI_MSI_WIN_ADDR); |
746 | 8558d942 | Andreas Färber | phb = PCI_HOST_BRIDGE(QLIST_FIRST(&spapr->phbs)); |
747 | 3384f95c | David Gibson | |
748 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
749 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
750 | 8d90ad90 | David Gibson | |
751 | 8d90ad90 | David Gibson | if (!nd->model) {
|
752 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
753 | 8d90ad90 | David Gibson | } |
754 | 8d90ad90 | David Gibson | |
755 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
756 | d601fac4 | David Gibson | spapr_vlan_create(spapr->vio_bus, nd); |
757 | 8d90ad90 | David Gibson | } else {
|
758 | 3384f95c | David Gibson | pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
759 | 8d90ad90 | David Gibson | } |
760 | 8d90ad90 | David Gibson | } |
761 | 8d90ad90 | David Gibson | |
762 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
763 | d601fac4 | David Gibson | spapr_vscsi_create(spapr->vio_bus); |
764 | 6e270446 | Ben Herrenschmidt | } |
765 | 6e270446 | Ben Herrenschmidt | |
766 | f28359d8 | zhlcindy@gmail.com | /* Graphics */
|
767 | 8c9f64df | Andreas Färber | if (spapr_vga_init(phb->bus)) {
|
768 | 3fc5acde | Alexander Graf | spapr->has_graphics = true;
|
769 | f28359d8 | zhlcindy@gmail.com | } |
770 | f28359d8 | zhlcindy@gmail.com | |
771 | 35139a59 | David Gibson | if (usb_enabled) {
|
772 | 8c9f64df | Andreas Färber | pci_create_simple(phb->bus, -1, "pci-ohci"); |
773 | 35139a59 | David Gibson | if (spapr->has_graphics) {
|
774 | 35139a59 | David Gibson | usbdevice_create("keyboard");
|
775 | 35139a59 | David Gibson | usbdevice_create("mouse");
|
776 | 35139a59 | David Gibson | } |
777 | 35139a59 | David Gibson | } |
778 | 35139a59 | David Gibson | |
779 | 4d8d5467 | Benjamin Herrenschmidt | if (rma_size < (MIN_RMA_SLOF << 20)) { |
780 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
781 | 4d8d5467 | Benjamin Herrenschmidt | "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
782 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
783 | 4d8d5467 | Benjamin Herrenschmidt | } |
784 | 4d8d5467 | Benjamin Herrenschmidt | |
785 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
786 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
787 | 9fdf0c29 | David Gibson | |
788 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
789 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
790 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
791 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
792 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
793 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - KERNEL_LOAD_ADDR); |
794 | 9fdf0c29 | David Gibson | } |
795 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
796 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
797 | 9fdf0c29 | David Gibson | kernel_filename); |
798 | 9fdf0c29 | David Gibson | exit(1);
|
799 | 9fdf0c29 | David Gibson | } |
800 | 9fdf0c29 | David Gibson | |
801 | 9fdf0c29 | David Gibson | /* load initrd */
|
802 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
803 | 4d8d5467 | Benjamin Herrenschmidt | /* Try to locate the initrd in the gap between the kernel
|
804 | 4d8d5467 | Benjamin Herrenschmidt | * and the firmware. Add a bit of space just in case
|
805 | 4d8d5467 | Benjamin Herrenschmidt | */
|
806 | 4d8d5467 | Benjamin Herrenschmidt | initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff; |
807 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
808 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - initrd_base); |
809 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
810 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
811 | 9fdf0c29 | David Gibson | initrd_filename); |
812 | 9fdf0c29 | David Gibson | exit(1);
|
813 | 9fdf0c29 | David Gibson | } |
814 | 9fdf0c29 | David Gibson | } else {
|
815 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
816 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
817 | 9fdf0c29 | David Gibson | } |
818 | 4d8d5467 | Benjamin Herrenschmidt | } |
819 | a3467baa | David Gibson | |
820 | 4d8d5467 | Benjamin Herrenschmidt | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
821 | 4d8d5467 | Benjamin Herrenschmidt | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
822 | 4d8d5467 | Benjamin Herrenschmidt | if (fw_size < 0) { |
823 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
824 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
825 | 4d8d5467 | Benjamin Herrenschmidt | } |
826 | 4d8d5467 | Benjamin Herrenschmidt | g_free(filename); |
827 | 4d8d5467 | Benjamin Herrenschmidt | |
828 | 4d8d5467 | Benjamin Herrenschmidt | spapr->entry_point = 0x100;
|
829 | 4d8d5467 | Benjamin Herrenschmidt | |
830 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF will startup the secondary CPUs using RTAS */
|
831 | 4d8d5467 | Benjamin Herrenschmidt | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
832 | 4d8d5467 | Benjamin Herrenschmidt | env->halted = 1;
|
833 | 9fdf0c29 | David Gibson | } |
834 | 9fdf0c29 | David Gibson | |
835 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
836 | 354ac20a | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size, |
837 | a3467baa | David Gibson | initrd_base, initrd_size, |
838 | 4d8d5467 | Benjamin Herrenschmidt | kernel_size, |
839 | a3467baa | David Gibson | boot_device, kernel_cmdline, |
840 | a3467baa | David Gibson | pteg_shift + 7);
|
841 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
842 | 9fdf0c29 | David Gibson | |
843 | a3467baa | David Gibson | qemu_register_reset(spapr_reset, spapr); |
844 | 9fdf0c29 | David Gibson | } |
845 | 9fdf0c29 | David Gibson | |
846 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
847 | 9fdf0c29 | David Gibson | .name = "pseries",
|
848 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
|
849 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
850 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
851 | 9fdf0c29 | David Gibson | .no_parallel = 1,
|
852 | 6e270446 | Ben Herrenschmidt | .use_scsi = 1,
|
853 | 9fdf0c29 | David Gibson | }; |
854 | 9fdf0c29 | David Gibson | |
855 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
856 | 9fdf0c29 | David Gibson | { |
857 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
858 | 9fdf0c29 | David Gibson | } |
859 | 9fdf0c29 | David Gibson | |
860 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |