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Introduce reset notifier order
Add the parameter 'order' to qemu_register_reset and sort callbacks onregistration. On system reset, callbacks with lower order will beinvoked before those with higher order. Update all existing users to thestandard order 0....
Yet more phys_ram_base elimination.
Signed-off-by: Paul Brook <paul@cofdesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7067 c046a42c-6fe2-441c-8c8c-71466251a162
hw: remove error handling from qemu_malloc() callers (Avi Kivity)
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevelglobal variables to use the new qemu_log*() macros.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.
This patch doesn't try to merge logging macros from different files,but just unify the debugging code #ifdefs onto a macro on each file. Afurther cleanup can unify the debugging macros on a common header, later...
target-ppc: create a helper function to allow more flexible RAM allocation for PPC 4xx
The 4xx SDRAM controller supports a small number of banks, and each bank mustbe one of a small set of sizes. The number of banks and the supported sizesvaries by SoC....
target-ppc: rename ppc405_sdram_init() to ppc4xx_sdram_init()
The SDRAM controller is shared across almost all 405 and 440 embeddedprocessors, with some slight differences such as the sizes supported for eachmemory bank.
Rename only; no functional changes....
target-ppc: move PPC4xx SDRAM controller emulation from ppc405_uc.c to ppc4xx_devs.c
Code movement only; no functional changes....
Change MMIO callbacks to use offsets, not absolute addresses.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
Use qemu-log.h
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5413 c046a42c-6fe2-441c-8c8c-71466251a162
Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
Move CPU save/load registration to common code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
Remember the state of level-triggered interrupts
(Hollis Blanchard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4330 c046a42c-6fe2-441c-8c8c-71466251a162
PPC UIC: Remove interrupt polarity code
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4329 c046a42c-6fe2-441c-8c8c-71466251a162
qemu ppc uic: Order IRQ bit number as described in the UIC documentation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4273 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC debug print fixes - hardware emulation pass.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3726 c046a42c-6fe2-441c-8c8c-71466251a162
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
Share devices that might be useful for all PowerPC 40x & 440 implementations (mostly CPU registration and UIC, for now).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3340 c046a42c-6fe2-441c-8c8c-71466251a162