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/*
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 *  i386 execution defines
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 *
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "config.h"
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#include "dyngen-exec.h"
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/* XXX: factorize this mess */
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#ifdef TARGET_X86_64
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#define TARGET_LONG_BITS 64
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#else
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#define TARGET_LONG_BITS 32
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#endif
29

    
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#include "cpu-defs.h"
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/* at least 4 register variables are defined */
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register struct CPUX86State *env asm(AREG0);
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#ifndef CPU_NO_GLOBAL_REGS
36

    
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#if TARGET_LONG_BITS > HOST_LONG_BITS
38

    
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/* no registers can be used */
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#define T0 (env->t0)
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#define T1 (env->t1)
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#define T2 (env->t2)
43

    
44
#else
45

    
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/* XXX: use unsigned long instead of target_ulong - better code will
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   be generated for 64 bit CPUs */
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register target_ulong T0 asm(AREG1);
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register target_ulong T1 asm(AREG2);
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register target_ulong T2 asm(AREG3);
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#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
53

    
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#endif /* ! CPU_NO_GLOBAL_REGS */
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#define A0 T2
57

    
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extern FILE *logfile;
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extern int loglevel;
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#ifndef reg_EAX
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#define EAX (env->regs[R_EAX])
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#endif
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#ifndef reg_ECX
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#define ECX (env->regs[R_ECX])
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#endif
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#ifndef reg_EDX
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#define EDX (env->regs[R_EDX])
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#endif
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#ifndef reg_EBX
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#define EBX (env->regs[R_EBX])
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#endif
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#ifndef reg_ESP
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#define ESP (env->regs[R_ESP])
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#endif
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#ifndef reg_EBP
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#define EBP (env->regs[R_EBP])
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#endif
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#ifndef reg_ESI
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#define ESI (env->regs[R_ESI])
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#endif
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#ifndef reg_EDI
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#define EDI (env->regs[R_EDI])
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#endif
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#define EIP  (env->eip)
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#define DF  (env->df)
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#define CC_SRC (env->cc_src)
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#define CC_DST (env->cc_dst)
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#define CC_OP  (env->cc_op)
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/* float macros */
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#define FT0    (env->ft0)
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#define ST0    (env->fpregs[env->fpstt].d)
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#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
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#define ST1    ST(1)
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98
#ifdef USE_FP_CONVERT
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#define FP_CONVERT  (env->fp_convert)
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#endif
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102
#include "cpu.h"
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#include "exec-all.h"
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105
typedef struct CCTable {
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    int (*compute_all)(void); /* return all the flags */
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    int (*compute_c)(void);  /* return the C flag */
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} CCTable;
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extern CCTable cc_table[];
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void load_seg(int seg_reg, int selector);
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void helper_ljmp_protected_T0_T1(int next_eip);
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void helper_lcall_real_T0_T1(int shift, int next_eip);
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void helper_lcall_protected_T0_T1(int shift, int next_eip);
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void helper_iret_real(int shift);
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void helper_iret_protected(int shift, int next_eip);
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void helper_lret_protected(int shift, int addend);
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void helper_lldt_T0(void);
120
void helper_ltr_T0(void);
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void helper_movl_crN_T0(int reg);
122
void helper_movl_drN_T0(int reg);
123
void helper_invlpg(target_ulong addr);
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void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
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void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
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void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
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void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
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int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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                             int is_write, int mmu_idx, int is_softmmu);
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void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
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              void *retaddr);
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void __hidden cpu_lock(void);
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void __hidden cpu_unlock(void);
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void do_interrupt(int intno, int is_int, int error_code,
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                  target_ulong next_eip, int is_hw);
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void do_interrupt_user(int intno, int is_int, int error_code,
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                       target_ulong next_eip);
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void raise_interrupt(int intno, int is_int, int error_code,
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                     int next_eip_addend);
140
void raise_exception_err(int exception_index, int error_code);
141
void raise_exception(int exception_index);
142
void do_smm_enter(void);
143
void __hidden cpu_loop_exit(void);
144

    
145
void OPPROTO op_movl_eflags_T0(void);
146
void OPPROTO op_movl_T0_eflags(void);
147

    
148
#include "helper.h"
149

    
150
void helper_mulq_EAX_T0(void);
151
void helper_imulq_EAX_T0(void);
152
void helper_imulq_T0_T1(void);
153
void helper_divq_EAX_T0(void);
154
void helper_idivq_EAX_T0(void);
155
void helper_bswapq_T0(void);
156
void helper_cmpxchg8b(void);
157
void helper_single_step(void);
158
void helper_cpuid(void);
159
void helper_enter_level(int level, int data32);
160
void helper_enter64_level(int level, int data64);
161
void helper_sysenter(void);
162
void helper_sysexit(void);
163
void helper_syscall(int next_eip_addend);
164
void helper_sysret(int dflag);
165
void helper_rdtsc(void);
166
void helper_rdpmc(void);
167
void helper_rdmsr(void);
168
void helper_wrmsr(void);
169
void helper_lsl(void);
170
void helper_lar(void);
171
void helper_verr(void);
172
void helper_verw(void);
173
void helper_rsm(void);
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void check_iob_T0(void);
176
void check_iow_T0(void);
177
void check_iol_T0(void);
178
void check_iob_DX(void);
179
void check_iow_DX(void);
180
void check_iol_DX(void);
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182
#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
185

    
186
static inline double ldfq(target_ulong ptr)
187
{
188
    union {
189
        double d;
190
        uint64_t i;
191
    } u;
192
    u.i = ldq(ptr);
193
    return u.d;
194
}
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static inline void stfq(target_ulong ptr, double v)
197
{
198
    union {
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        double d;
200
        uint64_t i;
201
    } u;
202
    u.d = v;
203
    stq(ptr, u.i);
204
}
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206
static inline float ldfl(target_ulong ptr)
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{
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    union {
209
        float f;
210
        uint32_t i;
211
    } u;
212
    u.i = ldl(ptr);
213
    return u.f;
214
}
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static inline void stfl(target_ulong ptr, float v)
217
{
218
    union {
219
        float f;
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        uint32_t i;
221
    } u;
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    u.f = v;
223
    stl(ptr, u.i);
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}
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#endif /* !defined(CONFIG_USER_ONLY) */
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#ifdef USE_X86LDOUBLE
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/* use long double functions */
230
#define floatx_to_int32 floatx80_to_int32
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#define floatx_to_int64 floatx80_to_int64
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#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
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#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
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#define floatx_abs floatx80_abs
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#define floatx_chs floatx80_chs
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#define floatx_round_to_int floatx80_round_to_int
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#define floatx_compare floatx80_compare
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#define floatx_compare_quiet floatx80_compare_quiet
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#define sin sinl
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#define cos cosl
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#define sqrt sqrtl
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#define pow powl
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#define log logl
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#define tan tanl
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#define atan2 atan2l
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#define floor floorl
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#define ceil ceill
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#define ldexp ldexpl
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#else
250
#define floatx_to_int32 float64_to_int32
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#define floatx_to_int64 float64_to_int64
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#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
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#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
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#define floatx_abs float64_abs
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#define floatx_chs float64_chs
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#define floatx_round_to_int float64_round_to_int
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#define floatx_compare float64_compare
258
#define floatx_compare_quiet float64_compare_quiet
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#endif
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261
extern CPU86_LDouble sin(CPU86_LDouble x);
262
extern CPU86_LDouble cos(CPU86_LDouble x);
263
extern CPU86_LDouble sqrt(CPU86_LDouble x);
264
extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
265
extern CPU86_LDouble log(CPU86_LDouble x);
266
extern CPU86_LDouble tan(CPU86_LDouble x);
267
extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
268
extern CPU86_LDouble floor(CPU86_LDouble x);
269
extern CPU86_LDouble ceil(CPU86_LDouble x);
270

    
271
#define RC_MASK         0xc00
272
#define RC_NEAR                0x000
273
#define RC_DOWN                0x400
274
#define RC_UP                0x800
275
#define RC_CHOP                0xc00
276

    
277
#define MAXTAN 9223372036854775808.0
278

    
279
#ifdef USE_X86LDOUBLE
280

    
281
/* only for x86 */
282
typedef union {
283
    long double d;
284
    struct {
285
        unsigned long long lower;
286
        unsigned short upper;
287
    } l;
288
} CPU86_LDoubleU;
289

    
290
/* the following deal with x86 long double-precision numbers */
291
#define MAXEXPD 0x7fff
292
#define EXPBIAS 16383
293
#define EXPD(fp)        (fp.l.upper & 0x7fff)
294
#define SIGND(fp)        ((fp.l.upper) & 0x8000)
295
#define MANTD(fp)       (fp.l.lower)
296
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
297

    
298
#else
299

    
300
/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
301
typedef union {
302
    double d;
303
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
304
    struct {
305
        uint32_t lower;
306
        int32_t upper;
307
    } l;
308
#else
309
    struct {
310
        int32_t upper;
311
        uint32_t lower;
312
    } l;
313
#endif
314
#ifndef __arm__
315
    int64_t ll;
316
#endif
317
} CPU86_LDoubleU;
318

    
319
/* the following deal with IEEE double-precision numbers */
320
#define MAXEXPD 0x7ff
321
#define EXPBIAS 1023
322
#define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
323
#define SIGND(fp)        ((fp.l.upper) & 0x80000000)
324
#ifdef __arm__
325
#define MANTD(fp)        (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
326
#else
327
#define MANTD(fp)        (fp.ll & ((1LL << 52) - 1))
328
#endif
329
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
330
#endif
331

    
332
static inline void fpush(void)
333
{
334
    env->fpstt = (env->fpstt - 1) & 7;
335
    env->fptags[env->fpstt] = 0; /* validate stack entry */
336
}
337

    
338
static inline void fpop(void)
339
{
340
    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
341
    env->fpstt = (env->fpstt + 1) & 7;
342
}
343

    
344
#ifndef USE_X86LDOUBLE
345
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
346
{
347
    CPU86_LDoubleU temp;
348
    int upper, e;
349
    uint64_t ll;
350

    
351
    /* mantissa */
352
    upper = lduw(ptr + 8);
353
    /* XXX: handle overflow ? */
354
    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
355
    e |= (upper >> 4) & 0x800; /* sign */
356
    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
357
#ifdef __arm__
358
    temp.l.upper = (e << 20) | (ll >> 32);
359
    temp.l.lower = ll;
360
#else
361
    temp.ll = ll | ((uint64_t)e << 52);
362
#endif
363
    return temp.d;
364
}
365

    
366
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
367
{
368
    CPU86_LDoubleU temp;
369
    int e;
370

    
371
    temp.d = f;
372
    /* mantissa */
373
    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
374
    /* exponent + sign */
375
    e = EXPD(temp) - EXPBIAS + 16383;
376
    e |= SIGND(temp) >> 16;
377
    stw(ptr + 8, e);
378
}
379
#else
380

    
381
/* XXX: same endianness assumed */
382

    
383
#ifdef CONFIG_USER_ONLY
384

    
385
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
386
{
387
    return *(CPU86_LDouble *)(unsigned long)ptr;
388
}
389

    
390
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
391
{
392
    *(CPU86_LDouble *)(unsigned long)ptr = f;
393
}
394

    
395
#else
396

    
397
/* we use memory access macros */
398

    
399
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
400
{
401
    CPU86_LDoubleU temp;
402

    
403
    temp.l.lower = ldq(ptr);
404
    temp.l.upper = lduw(ptr + 8);
405
    return temp.d;
406
}
407

    
408
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
409
{
410
    CPU86_LDoubleU temp;
411

    
412
    temp.d = f;
413
    stq(ptr, temp.l.lower);
414
    stw(ptr + 8, temp.l.upper);
415
}
416

    
417
#endif /* !CONFIG_USER_ONLY */
418

    
419
#endif /* USE_X86LDOUBLE */
420

    
421
#define FPUS_IE (1 << 0)
422
#define FPUS_DE (1 << 1)
423
#define FPUS_ZE (1 << 2)
424
#define FPUS_OE (1 << 3)
425
#define FPUS_UE (1 << 4)
426
#define FPUS_PE (1 << 5)
427
#define FPUS_SF (1 << 6)
428
#define FPUS_SE (1 << 7)
429
#define FPUS_B  (1 << 15)
430

    
431
#define FPUC_EM 0x3f
432

    
433
extern const CPU86_LDouble f15rk[7];
434

    
435
void helper_fldt_ST0_A0(void);
436
void helper_fstt_ST0_A0(void);
437
void fpu_raise_exception(void);
438
CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
439
void helper_fbld_ST0_A0(void);
440
void helper_fbst_ST0_A0(void);
441
void helper_f2xm1(void);
442
void helper_fyl2x(void);
443
void helper_fptan(void);
444
void helper_fpatan(void);
445
void helper_fxtract(void);
446
void helper_fprem1(void);
447
void helper_fprem(void);
448
void helper_fyl2xp1(void);
449
void helper_fsqrt(void);
450
void helper_fsincos(void);
451
void helper_frndint(void);
452
void helper_fscale(void);
453
void helper_fsin(void);
454
void helper_fcos(void);
455
void helper_fxam_ST0(void);
456
void helper_fstenv(target_ulong ptr, int data32);
457
void helper_fldenv(target_ulong ptr, int data32);
458
void helper_fsave(target_ulong ptr, int data32);
459
void helper_frstor(target_ulong ptr, int data32);
460
void helper_fxsave(target_ulong ptr, int data64);
461
void helper_fxrstor(target_ulong ptr, int data64);
462
void restore_native_fp_state(CPUState *env);
463
void save_native_fp_state(CPUState *env);
464
float approx_rsqrt(float a);
465
float approx_rcp(float a);
466
void update_fp_status(void);
467
void helper_hlt(void);
468
void helper_monitor(void);
469
void helper_mwait(void);
470
void helper_vmrun(target_ulong addr);
471
void helper_vmmcall(void);
472
void helper_vmload(target_ulong addr);
473
void helper_vmsave(target_ulong addr);
474
void helper_stgi(void);
475
void helper_clgi(void);
476
void helper_skinit(void);
477
void helper_invlpga(void);
478
void vmexit(uint64_t exit_code, uint64_t exit_info_1);
479

    
480
extern const uint8_t parity_table[256];
481
extern const uint8_t rclw_table[32];
482
extern const uint8_t rclb_table[32];
483

    
484
static inline uint32_t compute_eflags(void)
485
{
486
    return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
487
}
488

    
489
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
490
static inline void load_eflags(int eflags, int update_mask)
491
{
492
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
493
    DF = 1 - (2 * ((eflags >> 10) & 1));
494
    env->eflags = (env->eflags & ~update_mask) |
495
        (eflags & update_mask);
496
}
497

    
498
static inline void env_to_regs(void)
499
{
500
#ifdef reg_EAX
501
    EAX = env->regs[R_EAX];
502
#endif
503
#ifdef reg_ECX
504
    ECX = env->regs[R_ECX];
505
#endif
506
#ifdef reg_EDX
507
    EDX = env->regs[R_EDX];
508
#endif
509
#ifdef reg_EBX
510
    EBX = env->regs[R_EBX];
511
#endif
512
#ifdef reg_ESP
513
    ESP = env->regs[R_ESP];
514
#endif
515
#ifdef reg_EBP
516
    EBP = env->regs[R_EBP];
517
#endif
518
#ifdef reg_ESI
519
    ESI = env->regs[R_ESI];
520
#endif
521
#ifdef reg_EDI
522
    EDI = env->regs[R_EDI];
523
#endif
524
}
525

    
526
static inline void regs_to_env(void)
527
{
528
#ifdef reg_EAX
529
    env->regs[R_EAX] = EAX;
530
#endif
531
#ifdef reg_ECX
532
    env->regs[R_ECX] = ECX;
533
#endif
534
#ifdef reg_EDX
535
    env->regs[R_EDX] = EDX;
536
#endif
537
#ifdef reg_EBX
538
    env->regs[R_EBX] = EBX;
539
#endif
540
#ifdef reg_ESP
541
    env->regs[R_ESP] = ESP;
542
#endif
543
#ifdef reg_EBP
544
    env->regs[R_EBP] = EBP;
545
#endif
546
#ifdef reg_ESI
547
    env->regs[R_ESI] = ESI;
548
#endif
549
#ifdef reg_EDI
550
    env->regs[R_EDI] = EDI;
551
#endif
552
}
553

    
554
static inline int cpu_halted(CPUState *env) {
555
    /* handle exit of HALTED state */
556
    if (!(env->hflags & HF_HALTED_MASK))
557
        return 0;
558
    /* disable halt condition */
559
    if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
560
         (env->eflags & IF_MASK)) ||
561
        (env->interrupt_request & CPU_INTERRUPT_NMI)) {
562
        env->hflags &= ~HF_HALTED_MASK;
563
        return 0;
564
    }
565
    return EXCP_HALTED;
566
}
567