tcg-ppc64: More use of TAI and SAI helper macros
Finish conversion of all memory operations.
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-ppc64: Use TCG_REG_Rn constants
Instead of bare N, for clarity. The only (intentional) exception madeis for insns that encode R|0, i.e. when R0 encoded into the insn isinterpreted as zero not the contents of the register.
tcg-ppc64: Use tcg_out64
tcg-ppc: Avoid code for nop move
While these are rare from code that's been through the optimizer,it's not uncommon within the tcg backend.
tcg-ppc: Cleanup tcg_out_qemu_ld/st_slow_path
Coding style fixes. Use TCGReg enumeration values instead of rawnumbers. Don't needlessly pull the whole TCGLabelQemuLdst structinto local variables. Less conditional compilation.
No functional changes....
tcg-ppc: Use conditional branch and link to slow path
Saves one insn per slow path. Note that we can no longer usea tail call into the store helper.
tcg-ppc: Fix and cleanup tcg_out_tlb_check
The fix is that sparc has so many mmu modes that the last one overflowedthe 16-bit signed offset we assumed would fit. Handle this, and checkthe new assumption at compile time.
Load the tlb addend earlier for the fast path....
tcg-ppc64: Reformat tcg-target.c
Whitespace and brace changes only.
tcg-ppc: use new return-argument ld/st helpers
These use a 32-bit load-of-immediate to save a mflr+addi+mtlr sequence.Tested with a Windows 98 guest (pretty much the most recent thing Icould run on my PPC machine) and kvm-unit-tests's sieve.flat. Thespeed up for sieve.flat is as high as 10% for qemu-system-i386, 25%...
tcg-ppc: fix qemu_ld/qemu_st for AIX ABI
For the AIX ABI, the function pointer and small area pointer needto be loaded in the trampoline. The trampoline instead is calledwith a normal BL instruction.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>...
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