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root / target-mips @ 6ea219d0

Name Size
TODO 1.9 kB
cpu.h 18 kB
exec.h 2.8 kB
helper.c 20.6 kB
helper.h 8.4 kB
machine.c 10.6 kB
mips-defs.h 1.8 kB
op_helper.c 92.8 kB
translate.c 254.9 kB
translate_init.c 21.1 kB

Latest revisions

# Date Author Comment
6ea219d0 12/13/2009 09:20 pm Nathan Froyd

target-mips: add enums for MIPS16 opcodes

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>
79ef2c4c 12/13/2009 09:20 pm Nathan Froyd

target-mips: add new HFLAGs for JALX and 16/32-bit delay slots

We create separate masks for the "basic" branch hflags and the
"extended" branch hflags and define MIPS_HFLAG_BMASK as the logical or
of those two. This is done to avoid churning the codebase in lots of...
32188a03 12/13/2009 09:20 pm Nathan Froyd

target-mips: change interrupt bits to be mips16-aware

We need to stash the operating mode into the low bit of the error PC and
restore it on return from interrupts.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>
ea63e2c3 12/13/2009 09:20 pm Nathan Froyd

target-mips: move ROTR and ROTRV inside gen_shift_{imm, }

It's easier to implement mips16 shift instructions if we're not
examining the opcode inside gen_shift_{imm,}. So move ROTR and ROTRV
and do the special-case handling of SRL and SRLV inside decode_opc....
7dca4ad0 12/13/2009 09:20 pm Nathan Froyd

target-mips: make gen_compute_branch 16/32-bit-aware

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>
662d7485 12/13/2009 09:20 pm Nathan Froyd

target-mips: add gen_base_offset_addr

This is a common pattern in existing code. We'll also use it to
implement the mips16 SAVE/RESTORE instructions.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>
c9602061 12/13/2009 09:20 pm Nathan Froyd

target-mips: split out delay slot handling

Move delay slot handling to common code whose invocation can be
controlled from gen_intermediate_code_internal.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>
e7139c44 11/30/2009 05:18 pm Aurelien Jarno

target-mips: use physical address in lladdr

Currently the ll/sc instructions use the virtual address in both
user and system mode. Use the physical address insteead in system
mode.

Signed-off-by: Aurelien Jarno <>
25b91e32 11/30/2009 05:10 pm Aurelien Jarno

target-mips: add a function to do virtual -> physical translations

Signed-off-by: Aurelien Jarno <>
1147e189 11/30/2009 05:10 pm Aurelien Jarno

target-mips: split code raising MMU exception in a separate function

Signed-off-by: Aurelien Jarno <>

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