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# Date Author Comment
8e33944f 02/01/2013 02:52 am Alexander Graf

PPC: Unify dcbzl code path

The bit that makes a dcbz instruction a dcbzl instruction was declared as
reserved in ppc32 ISAs. However, hardware simply ignores the bit, making
code valid if it simply invokes dcbzl instead of dcbz even on 750 and G4.

Thus, mark the bit as unreserved so that we properly emulate a simple dcbz...
1de7afc9 12/19/2012 09:32 am Paolo Bonzini

misc: move include files to include/qemu/

Signed-off-by: Paolo Bonzini <>
022c62cb 12/19/2012 09:31 am Paolo Bonzini

exec: move include files to include/exec/

Signed-off-by: Paolo Bonzini <>
a8a826a3 12/16/2012 10:35 am Blue Swirl

exec: refactor cpu_restore_state

Refactor common code around calls to cpu_restore_state().

tb_find_pc() has now no external users, make it static.

Signed-off-by: Blue Swirl <>
e42a61f1 06/24/2012 02:04 am Alexander Graf

PPC: Add support for MSR_CM

The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to
support running 64bit code with MSR_CM set.

Signed-off-by: Alexander Graf <>
2f5a189c 06/24/2012 02:04 am Blue Swirl

ppc: Move load and store helpers, switch to AREG0 free mode

Add an explicit CPUPPCState parameter instead of relying on AREG0
and rename op_helper.c (which only contains load and store helpers)
to mem_helper.c. Remove AREG0 swapping in
tlb_fill().

Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation...