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softfloat: Implement fused multiply-add
Implement fused multiply-add as a softfloat primitive. This implements"a+b*c" as a single step without any intermediate rounding; it isspecified in IEEE 754-2008 and implemented in a number of CPUs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
softfloat: change default nan definitions to variables
Most definitions in softfloat.h are really target-independent, but thefile is not because it includes definitions of the default NaN values.Change those to variables to allow including softfloat.h from files that...
softfloat: always enable floatx80 and float128 support
Now that softfloat-native is gone, there is no real point on not alwaysenabling floatx80 and float128 support.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
softfloat: fix floatx80 handling of NaN
The floatx80 format uses an explicit bit that should be taken into accountwhen converting to and from commonNaN format.
When converting to commonNaN, the explicit bit should be removed if it isa 1, and a default NaN should be used if it is 0....
unicore32: necessary modifications for other files to support unicore32
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t
They are defined with the same semantics as the POSIX types,so prefer those for consistency. Suggested by Peter Maydell.
Cc: Peter Maydell <peter.maydell@linaro.org>Cc: Aurelien Jarno <aurelien@aurel32.net>...
softfloat: Prepend QEMU-style header with derivation notice
The SoftFloat license requires "prominent notice that the workis derivative". Having added features like improved 16-bit supportfor arm already, add such a notice to the sources.
softfloat-native.[ch] are not under the SoftFloat license...
softfloat: move all default NaN definitions to softfloat.h.
These special values are needed to implement some helper functions,which return/use these values in some cases.
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
softfloat: Correctly handle NaNs in float16_to_float32()
Correctly handle NaNs in float16_to_float32(), by defining andusing a float16ToCommonNaN() function, as we do with the other formats.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
softfloat: Fix single-to-half precision float conversions
Fix various bugs in the single-to-half-precision conversion code: * input NaNs not correctly converted in IEEE mode (fixed by defining and using a commonNaNToFloat16()) * wrong values returned when converting NaN/Inf into non-IEEE...
softfloat: Honour default_nan_mode for float-to-float conversions
Honour the default_nan_mode flag when doing conversions betweendifferent floating point formats, as well as when returning a NaN froma two-operand floating point function. This corrects the behaviour...
softfloat: Add float16 type and float16 NaN handling functions
Add a float16 type to softfloat, rather than using bits16 directly.Also add the missing functions float16_is_quiet_nan(),float16_is_signaling_nan() and float16_maybe_silence_nan(),which are needed for the float16 conversion routines....
softfloat: fix floatx80_is_{quiet,signaling}_nan()
floatx80_is_{quiet,signaling}_nan() functions are incorrectly detectingthe type of NaN, depending on SNAN_BIT_IS_ONE, one of the two isreturning the correct value, and the other true for any kind of NaN....
softfloat: SH4 has the sNaN bit set
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
softfloat: fix default-NaN mode
When the default-NaN mode is enabled, it should return the default NaNvalue, but it should anyway raise the invalid operation flag if one ofthe operand is an sNaN.
I have checked that this behavior matches the ARM and SH4 manuals, as...
target-ppc: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for PowerPC targets byproviding an appropriate pickNaN function.
Also fix the #ifdef tests for default NaN definition, the correct nameis TARGET_PPC instead of TARGET_POWERPC....
target-mips: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for MIPS targets byproviding an appropriate pickNaN function.
softfloat: use float{32,64,x80,128}_maybe_silence_nan()
Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling thesNaN bit manually. This allow per target implementation of sNaN to qNaNconversion.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
softfloat: add float{x80,128}_maybe_silence_nan()
Add float{x80,128}_maybe_silence_nan() functions, they will be need bypropagateFloat{x80,128}NaN().
softfloat: fix float{32,64}_maybe_silence_nan() for MIPS
On targets that define sNaN with the sNaN bit as one, simply clearingthis bit may correspond to an infinite value.
Convert it to a default NaN if SNAN_BIT_IS_ONE, as it corresponds tothe MIPS implementation, the only emulated CPU with SNAN_BIT_IS_ONE....
softfloat: rename *IsNaN variables to *IsQuietNaN
Similarly to what has been done in commit185698715dfb18c82ad2a5dbc169908602d43e81 rename the misnamed *IsNaNvariables into *IsQuietNaN.
softfloat: remove HPPA specific code
We don't have any HPPA target, so let's remove HPPA specific code. Itcan be re-added when someone adds an HPPA target.
This has been blessed by Stuart Brady <sdb@zubnet.me.uk>, author of thetarget-hppa fork.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-arm: Implement correct NaN propagation rules
Implement the correct NaN propagation rules for ARM targets byproviding an appropriate pickNaN function.
softfloat: abstract out target-specific NaN propagation rules
IEEE754 doesn't specify precisely what NaN should be returned asthe result of an operation on two input NaNs. This is thereforetarget-specific. Abstract out the code in propagateFloat*NaN()which was implementing the x87 propagation rules, so that it...
softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()
The softfloat functions float*_is_nan() were badly misnamed,because they return true only for quiet NaNs, not for all NaNs.Rename them to float*_is_quiet_nan() to more accurately reflect...
softfloat: Add float*_maybe_silence_nan() functions
Add functions float*_maybe_silence_nan() which ensure that avalue is not a signaling NaN by turning it into a quiet NaN.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
target-alpha: Enable softfloat.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Sparse fixes: dubious mixing of bitwise and logical operations
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6741 c046a42c-6fe2-441c-8c8c-71466251a162
Implement default-NaN mode.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6106 c046a42c-6fe2-441c-8c8c-71466251a162
Fix ARM default NaN.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5618 c046a42c-6fe2-441c-8c8c-71466251a162
Fix undeclared symbol warnings from sparse
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
Assortment of soft-float fixes, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3860 c046a42c-6fe2-441c-8c8c-71466251a162
Add strict checking mode for softfp code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
Fix NaN handling for MIPS and HPPA.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3655 c046a42c-6fe2-441c-8c8c-71466251a162
Fix softfloat NaN handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2805 c046a42c-6fe2-441c-8c8c-71466251a162
avoid using char when it is not necessary
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2204 c046a42c-6fe2-441c-8c8c-71466251a162
soft float support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1332 c046a42c-6fe2-441c-8c8c-71466251a162