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tcg-hppa: Fix typo in brcond2
Reported-by: Stuart Brady <sdb@zubnet.me.uk>Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
exec: move include files to include/exec/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
tcg: Add TCG_COND_NEVER, TCG_COND_ALWAYS
There are several cases that can be handled easier inside bothtranslators and code generators if we have out-of-band valuesfor conditions. It's easy enough to handle ALWAYS and NEVER inthe natural way inside the tcg middle-end....
tcg: Add tcg_high_cond
The table that was recently added for hppa is generally usable.And with the renumbering of the TCG_COND constants it's not toodifficult to compute rather than have a table.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: remove obsolete jmp op
The TCG jmp operation doesn't really make sense in the QEMU context, itis unused, it is not implemented by some targets, and it is wronglyimplemented by some others.
This patch simply removes it.
Reviewed-by: Richard Henderson <rth@twiddle.net>...
tcg: Remove tcg_target_get_call_iarg_regs_count
The TCG targets no longer need individual implementations.
Since commit 6a18ae2d2947532d5c26439548afa0481c4529f9,'flags' is no longer used in tcg_target_get_call_iarg_regs_count.
The remaining tcg_target_get_call_iarg_regs_count is trivial and only...
tcg-hppa: Implement movcond
tcg-hppa: Fix broken load/store helpers
The CONFIG_TCG_PASS_AREG0 code for calling ld/st helperswas not respecting the ABI requirement for 64-bit valuesbeing aligned in registers.
Mirror the ARM port in use of helper functions to marshalarguments into the correct registers....
tcg-hppa: Fix brcond2 and setcond2
Neither of these functions were performing double-wordcompares properly.
Remove unused CONFIG_TCG_PASS_AREG0 and dead code
Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets,remove dead code and support for !CONFIG_TCG_PASS_AREG0 case.
Remove dyngen-exec.h and all references to it. Although included byhw/spapr_hcall.c, it does not seem to use it....
tcg-hppa: Add debug_frame support.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
softmmu templates: optionally pass CPUState to memory access functions
Optionally, make memory access helpers take a parameter for CPUStateinstead of relying on global env.
On most targets, perform simple moves to reorder registers. On i386,switch from regparm(3) calling convention to standard stack-based...
Rename CPUState -> CPUArchState
Scripted conversion: for file in .[hc] hw/.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done...
tcg: Improve tcg_out_label and fix its usage for w64
tcg_out_label is always called with a third argument of pointer typewhich was casted to tcg_target_long.
These casts can be avoided by changing the prototype of tcg_out_label.
There was also a cast to long. For most hosts with...
tcg: Use TCGReg for standard tcg-target entry points.
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi.
Signed-off-by: Richard Henderson <rth@twiddle.net>Reviewed-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Stefan Weil <sw@weilnetz.de>...
tcg-hppa: Fix CPU_TEMP_BUF_NLONGS oversight.
tcg-hppa: Support deposit opcode.
TCG/HPPA: use stack for TCG temps
Use stack instead of temp_buf array in CPUState for TCG temps.
TCG/HPPA: use TCG_REG_CALL_STACK instead of TCG_REG_SP
Use TCG_REG_CALL_STACK instead of TCG_REG_SP for consistency.
Acked-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Delegate setup of TCG temporaries to targets
Delegate TCG temp_buf setup to targets, so that they can use a stackframe later instead.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
cpu-exec.c: avoid AREG0 use
Make functions take a parameter for CPUState instead of relyingon global env. Pass CPUState pointer to TCG prologue, which movesit to AREG0.
Thanks to Peter Maydell and Laurent Desnogues for the ARM prologuechange.
Revert the hacks to avoid AREG0 use on Sparc hosts....
tcg: Make some tcg-target.c routines static.
Both tcg_target_init and tcg_target_qemu_prologueare unused outside of tcg.c.
tcg: Add TYPE parameter to tcg_out_mov.
Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64to perform the move at the proper width, which may elide a REX prefix.
Introduce a TCG_TYPE_REG enumerator to represent the "native width" of the host register, and to distinguish the usage from "pointer data"...
tcg-hppa: Load GUEST_BASE as an immediate.
Now that the prologue is generated after GUEST_BASE is fixed,we can load it as an immediate, and also avoid reserving theregister if it isn't necessary.
tcg-hppa: Remove automatically implemented opcodes.
Remove neg, ext8u, ext16u, as requested.
tcg-hppa: Constrain immediate inputs to and_i32, or_i32, andc_i32.
Define "M" constraint for and_mask_p and "O" constraint for or_mask_p.Assume that inputs are correct in tcg_out_ori and tcg_out_andi.
tcg-hppa: Fix GUEST_BASE initialization in prologue.
Load from the guest_base variable rather than embed a constant.Always reserve TCG_GUEST_BASE_REG if guest base support enabled.
tcg-hppa: Fix softmmu loads and stores.
Along the tlb hit path, we were modifying the variables holding the inputregister numbers, which lead to incorrect expansion of the tlb miss path.Fix this by extracting the tlb hit path to separate functions with their...
tcg-hppa: Schedule the address masking after the TLB load.
Issue the tlb load as early as possible and perform the addressmasking while the load is completing.
tcg-hppa: Fix branch offset during retranslation.
Branch offsets should only be overwritten during relocation,to support partial retranslation.
tcg-hppa: Don't try to calls to non-constant addresses.
PA-RISC uses procedure descriptors. We'd need to emit a call tothe millicode routine $$dyncall. However, this situation doesn'tactually arise, since we always have the descriptor available atTCG code generation time....
tcg-hppa: Fix in/out register overlap in add2/sub2.
Handle the output log part overlapping the input high parts.Also, improve sub2 to handle some constants the second input low part.
tcg-hppa: Finish the port.
Delete inline functions from tcg-target.h that don't need to be there,move the others to tcg-target.c. Add 'Z', 'I', 'J' constraints for0, signed 11-bit, and signed 5-bit respectively. Add GUEST_BASE supportsimilar to ppc64, with the value stored in a register. Add missing...
tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operandssign-extended in 64-bit registers (regardless of the "real" signof the operand). For that, we need to be able to distinguishbetween a 32-bit load with a 32-bit result and a 32-bit load with...
tcg: Name the opcode enumeration.
Give the enumeration formed from tcg-opc.h a name: TCGOpcode.Use that enumeration type instead of "int" whereever appropriate.
tcg: fix build on 32-bit hppa, ppc and sparc hosts
The qemu_ld32s op is only defined if TCG_TARGET_REG_BITS == 64.
Signed-off-by: Jay Foad <jay.foad@gmail.com>Signed-off-by: malc <av1474@comtv.ru>
Suppress some variants of English in comments
Replace surpress, supress by suppress.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add some missing static and const qualifiers, reg_names only used if NDEBUG set
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162
Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
HPPA (PA-RISC) host support
(Stuart Brady)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162