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root / target-ppc @ 7820dbf3

Name Size
STATUS 10.6 kB
cpu.h 51.1 kB
exec.h 3.5 kB
helper.c 94.9 kB
helper_regs.h 3.8 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op.c 50.6 kB
op_helper.c 76.3 kB
op_helper.h 9.8 kB
op_helper_mem.h 13.8 kB
op_mem.h 41.6 kB
op_template.h 4.1 kB
translate.c 218.4 kB
translate_init.c 266.7 kB

Latest revisions

# Date Author Comment
7820dbf3 11/17/2007 04:16 am j_mayer

Make the PowerPC MMU model, exception model and input bus model
typedefed enums.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3660 c046a42c-6fe2-441c-8c8c-71466251a162
7b62a955 11/17/2007 04:04 am j_mayer

Add missing definition for number of input pins for the PowerPC 970 bus.
Use proper INPUT_NB definitions to allocate PowerPC input pins structure,
fixing a buffer overflow in the 6xx bus case.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3659 c046a42c-6fe2-441c-8c8c-71466251a162
b172c56a 11/17/2007 03:37 am j_mayer

Always make all PowerPC exception definitions visible.
Always make the hypervisor timers available.
Remove all TARGET_PPC64H checks, keeping a few if (0) tests for cases
that cannot be properly handled with the current PowerPC CPU definition.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3656 c046a42c-6fe2-441c-8c8c-71466251a162
7863667f 11/16/2007 04:11 pm j_mayer

Always make PowerPC hypervisor mode memory accesses and instructions
available for full system emulation, then removing all #if TARGET_PPC64H
from micro-ops and code translator.
Add new macros to dramatically simplify memory access tables definitions
in target-ppc/translate.c....
57c26279 11/14/2007 08:45 pm j_mayer

Fix PowerPC targets compilation on 32 bits hosts:
now that the SPE extension is available for all targets,
we always need to have some 64 bits temporary registers.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3647 c046a42c-6fe2-441c-8c8c-71466251a162
271a916e 11/14/2007 07:26 am j_mayer

Fix invalid PowerPC 64 rldimi optimized case.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3638 c046a42c-6fe2-441c-8c8c-71466251a162
1b413d55 11/14/2007 03:08 am j_mayer

Reorganize PowerPC instructions categories, add icbi separate case.
Fix frsqrtes instruction opcode.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3636 c046a42c-6fe2-441c-8c8c-71466251a162
c3e36823 11/13/2007 01:40 am j_mayer

Add PVR and SPR definition for most embedded PowerPC from Freescale.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3632 c046a42c-6fe2-441c-8c8c-71466251a162
65d6c0f3 11/13/2007 01:29 am j_mayer

PowerPC SPE extension fix: must always preserve GPR high bits when
running in 32 bits mode.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3631 c046a42c-6fe2-441c-8c8c-71466251a162
3cd7d1dd 11/12/2007 03:56 am j_mayer

Allow use of SPE extension by all PowerPC targets,
adding gprh registers to store GPR MSBs when GPRs are 32 bits.
Remove not-needed-anymore ppcemb-linux-user target.
Keep ppcemb-softmmu target, which provides 1kB pages support
and 36 bits physical address space....

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