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/*
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 *  CRIS emulation micro-operations for qemu.
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 *
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 *  Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include "exec.h"
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#include "host-utils.h"
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#define REGNAME r0
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#define REG (env->regs[0])
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#include "op_template.h"
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#define REGNAME r1
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#define REG (env->regs[1])
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#include "op_template.h"
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#define REGNAME r2
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#define REG (env->regs[2])
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#include "op_template.h"
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#define REGNAME r3
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#define REG (env->regs[3])
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#include "op_template.h"
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#define REGNAME r4
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#define REG (env->regs[4])
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#include "op_template.h"
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#define REGNAME r5
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#define REG (env->regs[5])
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#include "op_template.h"
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#define REGNAME r6
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#define REG (env->regs[6])
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#include "op_template.h"
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#define REGNAME r7
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#define REG (env->regs[7])
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#include "op_template.h"
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#define REGNAME r8
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#define REG (env->regs[8])
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#include "op_template.h"
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#define REGNAME r9
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#define REG (env->regs[9])
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#include "op_template.h"
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#define REGNAME r10
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#define REG (env->regs[10])
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#include "op_template.h"
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#define REGNAME r11
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#define REG (env->regs[11])
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#include "op_template.h"
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#define REGNAME r12
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#define REG (env->regs[12])
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#include "op_template.h"
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#define REGNAME r13
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#define REG (env->regs[13])
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#include "op_template.h"
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#define REGNAME r14
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#define REG (env->regs[14])
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#include "op_template.h"
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#define REGNAME r15
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#define REG (env->regs[15])
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#include "op_template.h"
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#define REGNAME p0
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#define REG (env->pregs[0])
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#include "op_template.h"
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#define REGNAME p1
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#define REG (env->pregs[1])
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#include "op_template.h"
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#define REGNAME p2
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#define REG (env->pregs[2])
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#include "op_template.h"
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#define REGNAME p3
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#define REG (env->pregs[3])
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#include "op_template.h"
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#define REGNAME p4
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#define REG (env->pregs[4])
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#include "op_template.h"
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#define REGNAME p5
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#define REG (env->pregs[5])
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#include "op_template.h"
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#define REGNAME p6
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#define REG (env->pregs[6])
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#include "op_template.h"
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#define REGNAME p7
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#define REG (env->pregs[7])
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#include "op_template.h"
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#define REGNAME p8
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#define REG (env->pregs[8])
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#include "op_template.h"
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#define REGNAME p9
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#define REG (env->pregs[9])
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#include "op_template.h"
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#define REGNAME p10
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#define REG (env->pregs[10])
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#include "op_template.h"
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#define REGNAME p11
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#define REG (env->pregs[11])
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#include "op_template.h"
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#define REGNAME p12
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#define REG (env->pregs[12])
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#include "op_template.h"
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#define REGNAME p13
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#define REG (env->pregs[13])
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#include "op_template.h"
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#define REGNAME p14
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#define REG (env->pregs[14])
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#include "op_template.h"
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#define REGNAME p15
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#define REG (env->pregs[15])
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#include "op_template.h"
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/* Microcode.  */
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void OPPROTO op_break_im(void)
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{
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        env->trap_vector = PARAM1;
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        env->exception_index = EXCP_BREAK;
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        cpu_loop_exit();
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}
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void OPPROTO op_debug(void)
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{
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        env->exception_index = EXCP_DEBUG;
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        cpu_loop_exit();
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}
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void OPPROTO op_exec_insn(void)
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{
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        env->stats.exec_insns++;
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        RETURN();
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}
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void OPPROTO op_exec_load(void)
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{
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        env->stats.exec_loads++;
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        RETURN();
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}
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void OPPROTO op_exec_store(void)
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{
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        env->stats.exec_stores++;
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        RETURN();
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}
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void OPPROTO op_ccs_lshift (void)
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{
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        uint32_t ccs;
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        /* Apply the ccs shift.  */
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        ccs = env->pregs[PR_CCS];
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        ccs = (ccs & 0xc0000000) | ((ccs << 12) >> 2);
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        env->pregs[PR_CCS] = ccs;
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        RETURN();
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}
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void OPPROTO op_ccs_rshift (void)
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{
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        uint32_t ccs;
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        /* Apply the ccs shift.  */
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        ccs = env->pregs[PR_CCS];
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        ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
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        env->pregs[PR_CCS] = ccs;
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        RETURN();
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}
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void OPPROTO op_setf (void)
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{
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        env->pregs[PR_CCS] |= PARAM1;
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        RETURN();
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}
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void OPPROTO op_clrf (void)
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{
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        env->pregs[PR_CCS] &= ~PARAM1;
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        RETURN();
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}
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void OPPROTO op_movl_debug1_T0 (void)
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{
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        env->debug1 = T0;
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        RETURN();
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}
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void OPPROTO op_movl_debug2_T0 (void)
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{
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        env->debug2 = T0;
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        RETURN();
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}
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void OPPROTO op_movl_debug3_T0 (void)
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{
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        env->debug3 = T0;
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        RETURN();
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}
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void OPPROTO op_movl_debug1_T1 (void)
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{
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        env->debug1 = T1;
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        RETURN();
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}
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void OPPROTO op_movl_debug2_T1 (void)
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{
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        env->debug2 = T1;
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        RETURN();
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}
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void OPPROTO op_movl_debug3_T1 (void)
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{
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        env->debug3 = T1;
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        RETURN();
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}
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void OPPROTO op_movl_debug3_im (void)
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{
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        env->debug3 = PARAM1;
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        RETURN();
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}
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void OPPROTO op_movl_T0_flags (void)
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{
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        T0 = env->pregs[PR_CCS];
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        RETURN();
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}
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void OPPROTO op_movl_flags_T0 (void)
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{
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        env->pregs[PR_CCS] = T0;
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        RETURN();
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}
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void OPPROTO op_movl_sreg_T0 (void)
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{
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        env->sregs[env->pregs[PR_SRS]][PARAM1] = T0;
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        RETURN();
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}
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void OPPROTO op_movl_tlb_hi_T0 (void)
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{
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        uint32_t srs;
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        srs = env->pregs[PR_SRS];
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        if (srs == 1 || srs == 2)
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        {
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                /* Writes to tlb-hi write to mm_cause as a side effect.  */
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                env->sregs[SFR_RW_MM_TLB_HI] = T0;
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                env->sregs[SFR_R_MM_CAUSE] = T0;
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        }
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        RETURN();
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}
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void OPPROTO op_movl_tlb_lo_T0 (void)
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{
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        uint32_t srs;
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        srs = env->pregs[PR_SRS];
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        if (srs == 1 || srs == 2)
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        {
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                uint32_t set;
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                uint32_t idx;
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                uint32_t lo, hi;
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                idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
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                set >>= 4;
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                set &= 3;
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                idx &= 15;
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                /* We've just made a write to tlb_lo.  */
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                lo = env->sregs[SFR_RW_MM_TLB_LO];
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                /* Writes are done via r_mm_cause.  */
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                hi = env->sregs[SFR_R_MM_CAUSE];
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                env->tlbsets[srs - 1][set][idx].lo = lo;
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                env->tlbsets[srs - 1][set][idx].hi = hi;
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        }
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        RETURN();
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}
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void OPPROTO op_movl_T0_sreg (void)
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{
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        T0 = env->sregs[env->pregs[PR_SRS]][PARAM1];
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        RETURN();
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}
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void OPPROTO op_update_cc (void)
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{
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        env->cc_op = PARAM1;
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        env->cc_dest = PARAM2;
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        env->cc_src = PARAM3;
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        RETURN();
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}
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void OPPROTO op_update_cc_op (void)
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{
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        env->cc_op = PARAM1;
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        RETURN();
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}
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void OPPROTO op_update_cc_mask (void)
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{
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        env->cc_mask = PARAM1;
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        RETURN();
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}
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void OPPROTO op_update_cc_dest_T0 (void)
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{
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        env->cc_dest = T0;
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        RETURN();
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}
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void OPPROTO op_update_cc_result_T0 (void)
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{
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        env->cc_result = T0;
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        RETURN();
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}
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void OPPROTO op_update_cc_size_im (void)
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{
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        env->cc_size = PARAM1;
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        RETURN();
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}
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void OPPROTO op_update_cc_src_T1 (void)
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{
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        env->cc_src = T1;
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        RETURN();
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}
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void OPPROTO op_update_cc_x (void)
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{
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        env->cc_x_live = PARAM1;
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        env->cc_x = PARAM2;
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        RETURN();
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}
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/* FIXME: is this allowed?  */
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extern inline void evaluate_flags_writeback(uint32_t flags)
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{
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        int x;
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        /* Extended arithmetics, leave the z flag alone.  */
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        env->debug3 = env->pregs[PR_CCS];
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        if (env->cc_x_live)
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                x = env->cc_x;
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        else
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                x = env->pregs[PR_CCS] & X_FLAG;
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        if ((x || env->cc_op == CC_OP_ADDC)
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            && flags & Z_FLAG)
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                env->cc_mask &= ~Z_FLAG;
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        /* all insn clear the x-flag except setf or clrf.  */
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        env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG);
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        flags &= env->cc_mask;
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        env->pregs[PR_CCS] |= flags;
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        RETURN();
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}
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void OPPROTO op_evaluate_flags_muls(void)
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{
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        uint32_t src;
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        uint32_t dst;
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        uint32_t res;
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        uint32_t flags = 0;
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        /* were gonna have to redo the muls.  */
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        int64_t tmp, t0 ,t1;
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        int32_t mof;
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        int dneg;
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        src = env->cc_src;
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        dst = env->cc_dest;
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        res = env->cc_result;
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        /* cast into signed values to make GCC sign extend.  */
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        t0 = (int32_t)src;
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        t1 = (int32_t)dst;
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        dneg = ((int32_t)res) < 0;
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        tmp = t0 * t1;
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        mof = tmp >> 32;
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        if (tmp == 0)
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                flags |= Z_FLAG;
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        else if (tmp < 0)
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                flags |= N_FLAG;
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        if ((dneg && mof != -1)
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            || (!dneg && mof != 0))
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                flags |= V_FLAG;
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        evaluate_flags_writeback(flags);
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        RETURN();
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}
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void OPPROTO op_evaluate_flags_mulu(void)
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{
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        uint32_t src;
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        uint32_t dst;
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        uint32_t res;
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        uint32_t flags = 0;
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        /* were gonna have to redo the muls.  */
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        uint64_t tmp, t0 ,t1;
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        uint32_t mof;
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        src = env->cc_src;
435 4fa551d7 ths
        dst = env->cc_dest;
436 4fa551d7 ths
        res = env->cc_result;
437 4fa551d7 ths
438 4fa551d7 ths
439 4fa551d7 ths
        /* cast into signed values to make GCC sign extend.  */
440 4fa551d7 ths
        t0 = src;
441 4fa551d7 ths
        t1 = dst;
442 4fa551d7 ths
443 4fa551d7 ths
        tmp = t0 * t1;
444 4fa551d7 ths
        mof = tmp >> 32;
445 4fa551d7 ths
        if (tmp == 0)
446 4fa551d7 ths
                flags |= Z_FLAG;
447 4fa551d7 ths
        else if (tmp >> 63)
448 4fa551d7 ths
                flags |= N_FLAG;
449 4fa551d7 ths
        if (mof)
450 4fa551d7 ths
                flags |= V_FLAG;
451 4fa551d7 ths
452 4fa551d7 ths
        evaluate_flags_writeback(flags);
453 4fa551d7 ths
        RETURN();
454 4fa551d7 ths
}
455 4fa551d7 ths
456 4fa551d7 ths
void OPPROTO op_evaluate_flags_mcp(void)
457 4fa551d7 ths
{
458 4fa551d7 ths
        uint32_t src;
459 4fa551d7 ths
        uint32_t dst;
460 4fa551d7 ths
        uint32_t res;
461 4fa551d7 ths
        uint32_t flags = 0;
462 4fa551d7 ths
463 4fa551d7 ths
        src = env->cc_src;
464 4fa551d7 ths
        dst = env->cc_dest;
465 4fa551d7 ths
        res = env->cc_result;
466 4fa551d7 ths
467 4fa551d7 ths
        if ((res & 0x80000000L) != 0L)
468 4fa551d7 ths
        {
469 4fa551d7 ths
                flags |= N_FLAG;
470 4fa551d7 ths
                if (((src & 0x80000000L) == 0L)
471 4fa551d7 ths
                    && ((dst & 0x80000000L) == 0L))
472 4fa551d7 ths
                {
473 4fa551d7 ths
                        flags |= V_FLAG;
474 4fa551d7 ths
                }
475 4fa551d7 ths
                else if (((src & 0x80000000L) != 0L) &&
476 4fa551d7 ths
                         ((dst & 0x80000000L) != 0L))
477 4fa551d7 ths
                {
478 4fa551d7 ths
                        flags |= R_FLAG;
479 4fa551d7 ths
                }
480 4fa551d7 ths
        }
481 4fa551d7 ths
        else
482 4fa551d7 ths
        {
483 4fa551d7 ths
                if (res == 0L)
484 4fa551d7 ths
                        flags |= Z_FLAG;
485 4fa551d7 ths
                if (((src & 0x80000000L) != 0L)
486 4fa551d7 ths
                    && ((dst & 0x80000000L) != 0L))
487 4fa551d7 ths
                        flags |= V_FLAG;
488 4fa551d7 ths
                if ((dst & 0x80000000L) != 0L
489 4fa551d7 ths
                    || (src & 0x80000000L) != 0L)
490 4fa551d7 ths
                        flags |= R_FLAG;
491 4fa551d7 ths
        }
492 4fa551d7 ths
493 4fa551d7 ths
        evaluate_flags_writeback(flags);
494 4fa551d7 ths
        RETURN();
495 4fa551d7 ths
}
496 4fa551d7 ths
497 4fa551d7 ths
void OPPROTO op_evaluate_flags_alu_4(void)
498 4fa551d7 ths
{
499 4fa551d7 ths
        uint32_t src;
500 4fa551d7 ths
        uint32_t dst;
501 4fa551d7 ths
        uint32_t res;
502 4fa551d7 ths
        uint32_t flags = 0;
503 4fa551d7 ths
504 4fa551d7 ths
        src = env->cc_src;
505 4fa551d7 ths
        dst = env->cc_dest;
506 4fa551d7 ths
        res = env->cc_result;
507 4fa551d7 ths
508 4fa551d7 ths
        if ((res & 0x80000000L) != 0L)
509 4fa551d7 ths
        {
510 4fa551d7 ths
                flags |= N_FLAG;
511 4fa551d7 ths
                if (((src & 0x80000000L) == 0L)
512 4fa551d7 ths
                    && ((dst & 0x80000000L) == 0L))
513 4fa551d7 ths
                {
514 4fa551d7 ths
                        flags |= V_FLAG;
515 4fa551d7 ths
                }
516 4fa551d7 ths
                else if (((src & 0x80000000L) != 0L) &&
517 4fa551d7 ths
                         ((dst & 0x80000000L) != 0L))
518 4fa551d7 ths
                {
519 4fa551d7 ths
                        flags |= C_FLAG;
520 4fa551d7 ths
                }
521 4fa551d7 ths
        }
522 4fa551d7 ths
        else
523 4fa551d7 ths
        {
524 4fa551d7 ths
                if (res == 0L)
525 4fa551d7 ths
                        flags |= Z_FLAG;
526 4fa551d7 ths
                if (((src & 0x80000000L) != 0L)
527 4fa551d7 ths
                    && ((dst & 0x80000000L) != 0L))
528 4fa551d7 ths
                        flags |= V_FLAG;
529 4fa551d7 ths
                if ((dst & 0x80000000L) != 0L
530 4fa551d7 ths
                    || (src & 0x80000000L) != 0L)
531 4fa551d7 ths
                        flags |= C_FLAG;
532 4fa551d7 ths
        }
533 4fa551d7 ths
534 4fa551d7 ths
        if (env->cc_op == CC_OP_SUB
535 4fa551d7 ths
            || env->cc_op == CC_OP_CMP) {
536 4fa551d7 ths
                flags ^= C_FLAG;
537 4fa551d7 ths
        }
538 4fa551d7 ths
        evaluate_flags_writeback(flags);
539 4fa551d7 ths
        RETURN();
540 4fa551d7 ths
}
541 4fa551d7 ths
542 4fa551d7 ths
void OPPROTO op_evaluate_flags_move_4 (void)
543 4fa551d7 ths
{
544 4fa551d7 ths
        uint32_t src;
545 4fa551d7 ths
        uint32_t res;
546 4fa551d7 ths
        uint32_t flags = 0;
547 4fa551d7 ths
548 4fa551d7 ths
        src = env->cc_src;
549 4fa551d7 ths
        res = env->cc_result;
550 4fa551d7 ths
551 4fa551d7 ths
        if ((int32_t)res < 0)
552 4fa551d7 ths
                flags |= N_FLAG;
553 4fa551d7 ths
        else if (res == 0L)
554 4fa551d7 ths
                flags |= Z_FLAG;
555 4fa551d7 ths
556 4fa551d7 ths
        evaluate_flags_writeback(flags);
557 4fa551d7 ths
        RETURN();
558 4fa551d7 ths
}
559 4fa551d7 ths
void OPPROTO op_evaluate_flags_move_2 (void)
560 4fa551d7 ths
{
561 4fa551d7 ths
        uint32_t src;
562 4fa551d7 ths
        uint32_t flags = 0;
563 4fa551d7 ths
        uint16_t res;
564 4fa551d7 ths
565 4fa551d7 ths
        src = env->cc_src;
566 4fa551d7 ths
        res = env->cc_result;
567 4fa551d7 ths
568 4fa551d7 ths
        if ((int16_t)res < 0L)
569 4fa551d7 ths
                flags |= N_FLAG;
570 4fa551d7 ths
        else if (res == 0)
571 4fa551d7 ths
                flags |= Z_FLAG;
572 4fa551d7 ths
573 4fa551d7 ths
        evaluate_flags_writeback(flags);
574 4fa551d7 ths
        RETURN();
575 4fa551d7 ths
}
576 4fa551d7 ths
577 4fa551d7 ths
/* TODO: This is expensive. We could split things up and only evaluate part of
578 4fa551d7 ths
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
579 4fa551d7 ths
void OPPROTO op_evaluate_flags (void)
580 4fa551d7 ths
{
581 4fa551d7 ths
        uint32_t src;
582 4fa551d7 ths
        uint32_t dst;
583 4fa551d7 ths
        uint32_t res;
584 4fa551d7 ths
        uint32_t flags = 0;
585 4fa551d7 ths
586 4fa551d7 ths
        src = env->cc_src;
587 4fa551d7 ths
        dst = env->cc_dest;
588 4fa551d7 ths
        res = env->cc_result;
589 4fa551d7 ths
590 4fa551d7 ths
591 4fa551d7 ths
        /* Now, evaluate the flags. This stuff is based on
592 4fa551d7 ths
           Per Zander's CRISv10 simulator.  */
593 4fa551d7 ths
        switch (env->cc_size)
594 4fa551d7 ths
        {
595 4fa551d7 ths
                case 1:
596 4fa551d7 ths
                        if ((res & 0x80L) != 0L)
597 4fa551d7 ths
                        {
598 4fa551d7 ths
                                flags |= N_FLAG;
599 4fa551d7 ths
                                if (((src & 0x80L) == 0L)
600 4fa551d7 ths
                                    && ((dst & 0x80L) == 0L))
601 4fa551d7 ths
                                {
602 4fa551d7 ths
                                        flags |= V_FLAG;
603 4fa551d7 ths
                                }
604 4fa551d7 ths
                                else if (((src & 0x80L) != 0L)
605 4fa551d7 ths
                                         && ((dst & 0x80L) != 0L))
606 4fa551d7 ths
                                {
607 4fa551d7 ths
                                        flags |= C_FLAG;
608 4fa551d7 ths
                                }
609 4fa551d7 ths
                        }
610 4fa551d7 ths
                        else
611 4fa551d7 ths
                        {
612 4fa551d7 ths
                                if ((res & 0xFFL) == 0L)
613 4fa551d7 ths
                                {
614 4fa551d7 ths
                                        flags |= Z_FLAG;
615 4fa551d7 ths
                                }
616 4fa551d7 ths
                                if (((src & 0x80L) != 0L)
617 4fa551d7 ths
                                    && ((dst & 0x80L) != 0L))
618 4fa551d7 ths
                                {
619 4fa551d7 ths
                                        flags |= V_FLAG;
620 4fa551d7 ths
                                }
621 4fa551d7 ths
                                if ((dst & 0x80L) != 0L
622 4fa551d7 ths
                                    || (src & 0x80L) != 0L)
623 4fa551d7 ths
                                {
624 4fa551d7 ths
                                        flags |= C_FLAG;
625 4fa551d7 ths
                                }
626 4fa551d7 ths
                        }
627 4fa551d7 ths
                        break;
628 4fa551d7 ths
                case 2:
629 4fa551d7 ths
                        if ((res & 0x8000L) != 0L)
630 4fa551d7 ths
                        {
631 4fa551d7 ths
                                flags |= N_FLAG;
632 4fa551d7 ths
                                if (((src & 0x8000L) == 0L)
633 4fa551d7 ths
                                    && ((dst & 0x8000L) == 0L))
634 4fa551d7 ths
                                {
635 4fa551d7 ths
                                        flags |= V_FLAG;
636 4fa551d7 ths
                                }
637 4fa551d7 ths
                                else if (((src & 0x8000L) != 0L)
638 4fa551d7 ths
                                         && ((dst & 0x8000L) != 0L))
639 4fa551d7 ths
                                {
640 4fa551d7 ths
                                        flags |= C_FLAG;
641 4fa551d7 ths
                                }
642 4fa551d7 ths
                        }
643 4fa551d7 ths
                        else
644 4fa551d7 ths
                        {
645 4fa551d7 ths
                                if ((res & 0xFFFFL) == 0L)
646 4fa551d7 ths
                                {
647 4fa551d7 ths
                                        flags |= Z_FLAG;
648 4fa551d7 ths
                                }
649 4fa551d7 ths
                                if (((src & 0x8000L) != 0L)
650 4fa551d7 ths
                                    && ((dst & 0x8000L) != 0L))
651 4fa551d7 ths
                                {
652 4fa551d7 ths
                                        flags |= V_FLAG;
653 4fa551d7 ths
                                }
654 4fa551d7 ths
                                if ((dst & 0x8000L) != 0L
655 4fa551d7 ths
                                    || (src & 0x8000L) != 0L)
656 4fa551d7 ths
                                {
657 4fa551d7 ths
                                        flags |= C_FLAG;
658 4fa551d7 ths
                                }
659 4fa551d7 ths
                        }
660 4fa551d7 ths
                        break;
661 4fa551d7 ths
                case 4:
662 4fa551d7 ths
                        if ((res & 0x80000000L) != 0L)
663 4fa551d7 ths
                        {
664 4fa551d7 ths
                                flags |= N_FLAG;
665 4fa551d7 ths
                                if (((src & 0x80000000L) == 0L)
666 4fa551d7 ths
                                    && ((dst & 0x80000000L) == 0L))
667 4fa551d7 ths
                                {
668 4fa551d7 ths
                                        flags |= V_FLAG;
669 4fa551d7 ths
                                }
670 4fa551d7 ths
                                else if (((src & 0x80000000L) != 0L) &&
671 4fa551d7 ths
                                         ((dst & 0x80000000L) != 0L))
672 4fa551d7 ths
                                {
673 4fa551d7 ths
                                        flags |= C_FLAG;
674 4fa551d7 ths
                                }
675 4fa551d7 ths
                        }
676 4fa551d7 ths
                        else
677 4fa551d7 ths
                        {
678 4fa551d7 ths
                                if (res == 0L)
679 4fa551d7 ths
                                        flags |= Z_FLAG;
680 4fa551d7 ths
                                if (((src & 0x80000000L) != 0L)
681 4fa551d7 ths
                                    && ((dst & 0x80000000L) != 0L))
682 4fa551d7 ths
                                        flags |= V_FLAG;
683 4fa551d7 ths
                                if ((dst & 0x80000000L) != 0L
684 4fa551d7 ths
                                    || (src & 0x80000000L) != 0L)
685 4fa551d7 ths
                                        flags |= C_FLAG;
686 4fa551d7 ths
                        }
687 4fa551d7 ths
                        break;
688 4fa551d7 ths
                default:
689 4fa551d7 ths
                        break;
690 4fa551d7 ths
        }
691 4fa551d7 ths
692 4fa551d7 ths
        if (env->cc_op == CC_OP_SUB
693 4fa551d7 ths
            || env->cc_op == CC_OP_CMP) {
694 4fa551d7 ths
                flags ^= C_FLAG;
695 4fa551d7 ths
        }
696 4fa551d7 ths
        evaluate_flags_writeback(flags);
697 4fa551d7 ths
        RETURN();
698 4fa551d7 ths
}
699 4fa551d7 ths
700 4fa551d7 ths
void OPPROTO op_extb_T0_T0 (void)
701 4fa551d7 ths
{
702 4fa551d7 ths
        T0 = ((int8_t)T0);
703 4fa551d7 ths
        RETURN();
704 4fa551d7 ths
}
705 4fa551d7 ths
void OPPROTO op_extb_T1_T0 (void)
706 4fa551d7 ths
{
707 4fa551d7 ths
        T1 = ((int8_t)T0);
708 4fa551d7 ths
        RETURN();
709 4fa551d7 ths
}
710 4fa551d7 ths
void OPPROTO op_extb_T1_T1 (void)
711 4fa551d7 ths
{
712 4fa551d7 ths
        T1 = ((int8_t)T1);
713 4fa551d7 ths
        RETURN();
714 4fa551d7 ths
}
715 4fa551d7 ths
void OPPROTO op_zextb_T0_T0 (void)
716 4fa551d7 ths
{
717 4fa551d7 ths
        T0 = ((uint8_t)T0);
718 4fa551d7 ths
        RETURN();
719 4fa551d7 ths
}
720 4fa551d7 ths
void OPPROTO op_zextb_T1_T0 (void)
721 4fa551d7 ths
{
722 4fa551d7 ths
        T1 = ((uint8_t)T0);
723 4fa551d7 ths
        RETURN();
724 4fa551d7 ths
}
725 4fa551d7 ths
void OPPROTO op_zextb_T1_T1 (void)
726 4fa551d7 ths
{
727 4fa551d7 ths
        T1 = ((uint8_t)T1);
728 4fa551d7 ths
        RETURN();
729 4fa551d7 ths
}
730 4fa551d7 ths
void OPPROTO op_extw_T0_T0 (void)
731 4fa551d7 ths
{
732 4fa551d7 ths
        T0 = ((int16_t)T0);
733 4fa551d7 ths
        RETURN();
734 4fa551d7 ths
}
735 4fa551d7 ths
void OPPROTO op_extw_T1_T0 (void)
736 4fa551d7 ths
{
737 4fa551d7 ths
        T1 = ((int16_t)T0);
738 4fa551d7 ths
        RETURN();
739 4fa551d7 ths
}
740 4fa551d7 ths
void OPPROTO op_extw_T1_T1 (void)
741 4fa551d7 ths
{
742 4fa551d7 ths
        T1 = ((int16_t)T1);
743 4fa551d7 ths
        RETURN();
744 4fa551d7 ths
}
745 4fa551d7 ths
746 4fa551d7 ths
void OPPROTO op_zextw_T0_T0 (void)
747 4fa551d7 ths
{
748 4fa551d7 ths
        T0 = ((uint16_t)T0);
749 4fa551d7 ths
        RETURN();
750 4fa551d7 ths
}
751 4fa551d7 ths
void OPPROTO op_zextw_T1_T0 (void)
752 4fa551d7 ths
{
753 4fa551d7 ths
        T1 = ((uint16_t)T0);
754 4fa551d7 ths
        RETURN();
755 4fa551d7 ths
}
756 4fa551d7 ths
757 4fa551d7 ths
void OPPROTO op_zextw_T1_T1 (void)
758 4fa551d7 ths
{
759 4fa551d7 ths
        T1 = ((uint16_t)T1);
760 4fa551d7 ths
        RETURN();
761 4fa551d7 ths
}
762 4fa551d7 ths
763 4fa551d7 ths
void OPPROTO op_movl_T0_im (void)
764 4fa551d7 ths
{
765 4fa551d7 ths
        T0 = PARAM1;
766 4fa551d7 ths
        RETURN();
767 4fa551d7 ths
}
768 4fa551d7 ths
void OPPROTO op_movl_T1_im (void)
769 4fa551d7 ths
{
770 4fa551d7 ths
        T1 = PARAM1;
771 4fa551d7 ths
        RETURN();
772 4fa551d7 ths
}
773 4fa551d7 ths
774 4fa551d7 ths
void OPPROTO op_addl_T0_im (void)
775 4fa551d7 ths
{
776 4fa551d7 ths
        T0 += PARAM1;
777 4fa551d7 ths
        RETURN();
778 4fa551d7 ths
}
779 4fa551d7 ths
780 4fa551d7 ths
void OPPROTO op_addl_T1_im (void)
781 4fa551d7 ths
{
782 4fa551d7 ths
        T1 += PARAM1;
783 4fa551d7 ths
        RETURN();
784 4fa551d7 ths
785 4fa551d7 ths
}
786 4fa551d7 ths
void OPPROTO op_subl_T0_im (void)
787 4fa551d7 ths
{
788 4fa551d7 ths
        T0 -= PARAM1;
789 4fa551d7 ths
        RETURN();
790 4fa551d7 ths
}
791 4fa551d7 ths
792 4fa551d7 ths
void OPPROTO op_addxl_T0_C (void)
793 4fa551d7 ths
{
794 9004627f edgar_igl
        if (env->pregs[PR_CCS] & X_FLAG)
795 9004627f edgar_igl
                T0 += !!(env->pregs[PR_CCS] & C_FLAG);
796 4fa551d7 ths
        RETURN();
797 4fa551d7 ths
}
798 4fa551d7 ths
void OPPROTO op_subxl_T0_C (void)
799 4fa551d7 ths
{
800 9004627f edgar_igl
        if (env->pregs[PR_CCS] & X_FLAG)
801 9004627f edgar_igl
                T0 -= !!(env->pregs[PR_CCS] & C_FLAG);
802 4fa551d7 ths
        RETURN();
803 4fa551d7 ths
}
804 4fa551d7 ths
void OPPROTO op_addl_T0_C (void)
805 4fa551d7 ths
{
806 9004627f edgar_igl
        T0 += !!(env->pregs[PR_CCS] & C_FLAG);
807 4fa551d7 ths
        RETURN();
808 4fa551d7 ths
}
809 4fa551d7 ths
void OPPROTO op_addl_T0_R (void)
810 4fa551d7 ths
{
811 9004627f edgar_igl
        T0 += !!(env->pregs[PR_CCS] & R_FLAG);
812 4fa551d7 ths
        RETURN();
813 4fa551d7 ths
}
814 4fa551d7 ths
815 4fa551d7 ths
void OPPROTO op_clr_R (void)
816 4fa551d7 ths
{
817 9004627f edgar_igl
        env->pregs[PR_CCS] &= ~R_FLAG;
818 4fa551d7 ths
        RETURN();
819 4fa551d7 ths
}
820 4fa551d7 ths
821 4fa551d7 ths
822 4fa551d7 ths
void OPPROTO op_andl_T0_im (void)
823 4fa551d7 ths
{
824 4fa551d7 ths
        T0 &= PARAM1;
825 4fa551d7 ths
        RETURN();
826 4fa551d7 ths
}
827 4fa551d7 ths
828 4fa551d7 ths
void OPPROTO op_andl_T1_im (void)
829 4fa551d7 ths
{
830 4fa551d7 ths
        T1 &= PARAM1;
831 4fa551d7 ths
        RETURN();
832 4fa551d7 ths
}
833 4fa551d7 ths
834 4fa551d7 ths
void OPPROTO op_movl_T0_T1 (void)
835 4fa551d7 ths
{
836 4fa551d7 ths
        T0 = T1;
837 4fa551d7 ths
        RETURN();
838 4fa551d7 ths
}
839 4fa551d7 ths
840 4fa551d7 ths
void OPPROTO op_swp_T0_T1 (void)
841 4fa551d7 ths
{
842 4fa551d7 ths
        T0 ^= T1;
843 4fa551d7 ths
        T1 ^= T0;
844 4fa551d7 ths
        T0 ^= T1;
845 4fa551d7 ths
        RETURN();
846 4fa551d7 ths
}
847 4fa551d7 ths
848 4fa551d7 ths
void OPPROTO op_movl_T1_T0 (void)
849 4fa551d7 ths
{
850 4fa551d7 ths
        T1 = T0;
851 4fa551d7 ths
        RETURN();
852 4fa551d7 ths
}
853 4fa551d7 ths
854 4fa551d7 ths
void OPPROTO op_movl_pc_T0 (void)
855 4fa551d7 ths
{
856 4fa551d7 ths
        env->pc = T0;
857 4fa551d7 ths
        RETURN();
858 4fa551d7 ths
}
859 4fa551d7 ths
860 4fa551d7 ths
void OPPROTO op_movl_T0_0 (void)
861 4fa551d7 ths
{
862 4fa551d7 ths
        T0 = 0;
863 4fa551d7 ths
        RETURN();
864 4fa551d7 ths
}
865 4fa551d7 ths
866 4fa551d7 ths
void OPPROTO op_addl_T0_T1 (void)
867 4fa551d7 ths
{
868 4fa551d7 ths
        T0 += T1;
869 4fa551d7 ths
        RETURN();
870 4fa551d7 ths
}
871 4fa551d7 ths
872 4fa551d7 ths
void OPPROTO op_subl_T0_T1 (void)
873 4fa551d7 ths
{
874 4fa551d7 ths
        T0 -= T1;
875 4fa551d7 ths
        RETURN();
876 4fa551d7 ths
}
877 4fa551d7 ths
878 4fa551d7 ths
void OPPROTO op_absl_T1_T1 (void)
879 4fa551d7 ths
{
880 4fa551d7 ths
        int32_t st = T1;
881 4fa551d7 ths
882 4fa551d7 ths
        T1 = st < 0 ? -st : st;
883 4fa551d7 ths
        RETURN();
884 4fa551d7 ths
}
885 4fa551d7 ths
886 4fa551d7 ths
void OPPROTO op_muls_T0_T1 (void)
887 4fa551d7 ths
{
888 4fa551d7 ths
        int64_t tmp, t0 ,t1;
889 4fa551d7 ths
890 4fa551d7 ths
        /* cast into signed values to make GCC sign extend these babies.  */
891 4fa551d7 ths
        t0 = (int32_t)T0;
892 4fa551d7 ths
        t1 = (int32_t)T1;
893 4fa551d7 ths
894 4fa551d7 ths
        tmp = t0 * t1;
895 4fa551d7 ths
        T0 = tmp & 0xffffffff;
896 9004627f edgar_igl
        env->pregs[PR_MOF] = tmp >> 32;
897 4fa551d7 ths
        RETURN();
898 4fa551d7 ths
}
899 4fa551d7 ths
900 4fa551d7 ths
void OPPROTO op_mulu_T0_T1 (void)
901 4fa551d7 ths
{
902 4fa551d7 ths
        uint64_t tmp, t0 ,t1;
903 4fa551d7 ths
        t0 = T0;
904 4fa551d7 ths
        t1 = T1;
905 4fa551d7 ths
906 4fa551d7 ths
        tmp = t0 * t1;
907 4fa551d7 ths
        T0 = tmp & 0xffffffff;
908 9004627f edgar_igl
        env->pregs[PR_MOF] = tmp >> 32;
909 4fa551d7 ths
        RETURN();
910 4fa551d7 ths
}
911 4fa551d7 ths
912 4fa551d7 ths
void OPPROTO op_dstep_T0_T1 (void)
913 4fa551d7 ths
{
914 4fa551d7 ths
        T0 <<= 1;
915 4fa551d7 ths
        if (T0 >= T1)
916 4fa551d7 ths
                T0 -= T1;
917 4fa551d7 ths
        RETURN();
918 4fa551d7 ths
}
919 4fa551d7 ths
920 4fa551d7 ths
void OPPROTO op_orl_T0_T1 (void)
921 4fa551d7 ths
{
922 4fa551d7 ths
        T0 |= T1;
923 4fa551d7 ths
        RETURN();
924 4fa551d7 ths
}
925 4fa551d7 ths
926 4fa551d7 ths
void OPPROTO op_andl_T0_T1 (void)
927 4fa551d7 ths
{
928 4fa551d7 ths
        T0 &= T1;
929 4fa551d7 ths
        RETURN();
930 4fa551d7 ths
}
931 4fa551d7 ths
932 4fa551d7 ths
void OPPROTO op_xorl_T0_T1 (void)
933 4fa551d7 ths
{
934 4fa551d7 ths
        T0 ^= T1;
935 4fa551d7 ths
        RETURN();
936 4fa551d7 ths
}
937 4fa551d7 ths
938 4fa551d7 ths
void OPPROTO op_lsll_T0_T1 (void)
939 4fa551d7 ths
{
940 4fa551d7 ths
        int s = T1;
941 4fa551d7 ths
        if (s > 31)
942 4fa551d7 ths
                T0 = 0;
943 4fa551d7 ths
        else
944 4fa551d7 ths
                T0 <<= s;
945 4fa551d7 ths
        RETURN();
946 4fa551d7 ths
}
947 4fa551d7 ths
948 4fa551d7 ths
void OPPROTO op_lsll_T0_im (void)
949 4fa551d7 ths
{
950 4fa551d7 ths
        T0 <<= PARAM1;
951 4fa551d7 ths
        RETURN();
952 4fa551d7 ths
}
953 4fa551d7 ths
954 4fa551d7 ths
void OPPROTO op_lsrl_T0_T1 (void)
955 4fa551d7 ths
{
956 4fa551d7 ths
        int s = T1;
957 4fa551d7 ths
        if (s > 31)
958 4fa551d7 ths
                T0 = 0;
959 4fa551d7 ths
        else
960 4fa551d7 ths
                T0 >>= s;
961 4fa551d7 ths
        RETURN();
962 4fa551d7 ths
}
963 4fa551d7 ths
964 4fa551d7 ths
/* Rely on GCC emitting an arithmetic shift for signed right shifts.  */
965 4fa551d7 ths
void OPPROTO op_asrl_T0_T1 (void)
966 4fa551d7 ths
{
967 4fa551d7 ths
        int s = T1;
968 4fa551d7 ths
        if (s > 31)
969 4fa551d7 ths
                T0 = T0 & 0x80000000 ? -1 : 0;
970 4fa551d7 ths
        else
971 4fa551d7 ths
                T0 = (int32_t)T0 >> s;
972 4fa551d7 ths
        RETURN();
973 4fa551d7 ths
}
974 4fa551d7 ths
975 4fa551d7 ths
void OPPROTO op_btst_T0_T1 (void)
976 4fa551d7 ths
{
977 4fa551d7 ths
        /* FIXME: clean this up.  */
978 4fa551d7 ths
979 4fa551d7 ths
        /* des ref:
980 4fa551d7 ths
           The N flag is set according to the selected bit in the dest reg.
981 4fa551d7 ths
           The Z flag is set if the selected bit and all bits to the right are
982 4fa551d7 ths
           zero.
983 bbaf29c7 edgar_igl
           The X flag is cleared.
984 bbaf29c7 edgar_igl
           Other flags are left untouched.
985 4fa551d7 ths
           The destination reg is not affected.*/
986 4fa551d7 ths
        unsigned int fz, sbit, bset, mask, masked_t0;
987 4fa551d7 ths
988 4fa551d7 ths
        sbit = T1 & 31;
989 4fa551d7 ths
        bset = !!(T0 & (1 << sbit));
990 4fa551d7 ths
        mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
991 4fa551d7 ths
        masked_t0 = T0 & mask;
992 4fa551d7 ths
        fz = !(masked_t0 | bset);
993 bbaf29c7 edgar_igl
994 bbaf29c7 edgar_igl
        /* Clear the X, N and Z flags.  */
995 bbaf29c7 edgar_igl
        T0 = env->pregs[PR_CCS] & ~(X_FLAG | N_FLAG | Z_FLAG);
996 4fa551d7 ths
        /* Set the N and Z flags accordingly.  */
997 bbaf29c7 edgar_igl
        T0 |= (bset << 3) | (fz << 2);
998 4fa551d7 ths
        RETURN();
999 4fa551d7 ths
}
1000 4fa551d7 ths
1001 4fa551d7 ths
void OPPROTO op_bound_T0_T1 (void)
1002 4fa551d7 ths
{
1003 4fa551d7 ths
        if (T0 > T1)
1004 4fa551d7 ths
                T0 = T1;
1005 4fa551d7 ths
        RETURN();
1006 4fa551d7 ths
}
1007 4fa551d7 ths
1008 4fa551d7 ths
void OPPROTO op_lz_T0_T1 (void)
1009 4fa551d7 ths
{
1010 941db528 ths
        T0 = clz32(T1);
1011 4fa551d7 ths
        RETURN();
1012 4fa551d7 ths
}
1013 4fa551d7 ths
1014 4fa551d7 ths
void OPPROTO op_negl_T0_T1 (void)
1015 4fa551d7 ths
{
1016 4fa551d7 ths
        T0 = -T1;
1017 4fa551d7 ths
        RETURN();
1018 4fa551d7 ths
}
1019 4fa551d7 ths
1020 4fa551d7 ths
void OPPROTO op_negl_T1_T1 (void)
1021 4fa551d7 ths
{
1022 4fa551d7 ths
        T1 = -T1;
1023 4fa551d7 ths
        RETURN();
1024 4fa551d7 ths
}
1025 4fa551d7 ths
1026 4fa551d7 ths
void OPPROTO op_not_T0_T0 (void)
1027 4fa551d7 ths
{
1028 4fa551d7 ths
        T0 = ~(T0);
1029 4fa551d7 ths
        RETURN();
1030 4fa551d7 ths
}
1031 4fa551d7 ths
void OPPROTO op_not_T1_T1 (void)
1032 4fa551d7 ths
{
1033 4fa551d7 ths
        T1 = ~(T1);
1034 4fa551d7 ths
        RETURN();
1035 4fa551d7 ths
}
1036 4fa551d7 ths
1037 4fa551d7 ths
void OPPROTO op_swapw_T0_T0 (void)
1038 4fa551d7 ths
{
1039 4fa551d7 ths
        T0 = (T0 << 16) | ((T0 >> 16));
1040 4fa551d7 ths
        RETURN();
1041 4fa551d7 ths
}
1042 4fa551d7 ths
1043 4fa551d7 ths
void OPPROTO op_swapb_T0_T0 (void)
1044 4fa551d7 ths
{
1045 4fa551d7 ths
        T0 = ((T0 << 8) & 0xff00ff00) | ((T0 >> 8) & 0x00ff00ff);
1046 4fa551d7 ths
        RETURN();
1047 4fa551d7 ths
}
1048 4fa551d7 ths
1049 4fa551d7 ths
void OPPROTO op_swapr_T0_T0 (void)
1050 4fa551d7 ths
{
1051 4fa551d7 ths
        T0 = (((T0 << 7) & 0x80808080) |
1052 4fa551d7 ths
              ((T0 << 5) & 0x40404040) |
1053 4fa551d7 ths
              ((T0 << 3) & 0x20202020) |
1054 4fa551d7 ths
              ((T0 << 1) & 0x10101010) |
1055 4fa551d7 ths
              ((T0 >> 1) & 0x08080808) |
1056 4fa551d7 ths
              ((T0 >> 3) & 0x04040404) |
1057 4fa551d7 ths
              ((T0 >> 5) & 0x02020202) |
1058 4fa551d7 ths
              ((T0 >> 7) & 0x01010101));
1059 4fa551d7 ths
        RETURN();
1060 4fa551d7 ths
}
1061 4fa551d7 ths
1062 4fa551d7 ths
void OPPROTO op_tst_cc_eq (void) {
1063 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1064 4fa551d7 ths
        int z_set;
1065 4fa551d7 ths
1066 4fa551d7 ths
        z_set = !!(flags & Z_FLAG);
1067 4fa551d7 ths
        T0 = z_set;
1068 4fa551d7 ths
        RETURN();
1069 4fa551d7 ths
}
1070 4fa551d7 ths
1071 4fa551d7 ths
void OPPROTO op_tst_cc_eq_fast (void) {
1072 4fa551d7 ths
        T0 = !(env->cc_result);
1073 4fa551d7 ths
        RETURN();
1074 4fa551d7 ths
}
1075 4fa551d7 ths
1076 4fa551d7 ths
void OPPROTO op_tst_cc_ne (void) {
1077 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1078 4fa551d7 ths
        int z_set;
1079 4fa551d7 ths
1080 4fa551d7 ths
        z_set = !!(flags & Z_FLAG);
1081 4fa551d7 ths
        T0 = !z_set;
1082 4fa551d7 ths
        RETURN();
1083 4fa551d7 ths
}
1084 4fa551d7 ths
void OPPROTO op_tst_cc_ne_fast (void) {
1085 4fa551d7 ths
        T0 = !!(env->cc_result);
1086 4fa551d7 ths
        RETURN();
1087 4fa551d7 ths
}
1088 4fa551d7 ths
1089 4fa551d7 ths
void OPPROTO op_tst_cc_cc (void) {
1090 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1091 4fa551d7 ths
        int c_set;
1092 4fa551d7 ths
1093 4fa551d7 ths
        c_set = !!(flags & C_FLAG);
1094 4fa551d7 ths
        T0 = !c_set;
1095 4fa551d7 ths
        RETURN();
1096 4fa551d7 ths
}
1097 4fa551d7 ths
void OPPROTO op_tst_cc_cs (void) {
1098 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1099 4fa551d7 ths
        int c_set;
1100 4fa551d7 ths
1101 4fa551d7 ths
        c_set = !!(flags & C_FLAG);
1102 4fa551d7 ths
        T0 = c_set;
1103 4fa551d7 ths
        RETURN();
1104 4fa551d7 ths
}
1105 4fa551d7 ths
1106 4fa551d7 ths
void OPPROTO op_tst_cc_vc (void) {
1107 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1108 4fa551d7 ths
        int v_set;
1109 4fa551d7 ths
1110 4fa551d7 ths
        v_set = !!(flags & V_FLAG);
1111 4fa551d7 ths
        T0 = !v_set;
1112 4fa551d7 ths
        RETURN();
1113 4fa551d7 ths
}
1114 4fa551d7 ths
void OPPROTO op_tst_cc_vs (void) {
1115 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1116 4fa551d7 ths
        int v_set;
1117 4fa551d7 ths
1118 4fa551d7 ths
        v_set = !!(flags & V_FLAG);
1119 4fa551d7 ths
        T0 = v_set;
1120 4fa551d7 ths
        RETURN();
1121 4fa551d7 ths
}
1122 4fa551d7 ths
void OPPROTO op_tst_cc_pl (void) {
1123 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1124 4fa551d7 ths
        int n_set;
1125 4fa551d7 ths
1126 4fa551d7 ths
        n_set = !!(flags & N_FLAG);
1127 4fa551d7 ths
        T0 = !n_set;
1128 4fa551d7 ths
        RETURN();
1129 4fa551d7 ths
}
1130 4fa551d7 ths
void OPPROTO op_tst_cc_pl_fast (void) {
1131 4fa551d7 ths
        T0 = ((int32_t)env->cc_result) >= 0;
1132 4fa551d7 ths
        RETURN();
1133 4fa551d7 ths
}
1134 4fa551d7 ths
1135 4fa551d7 ths
void OPPROTO op_tst_cc_mi (void) {
1136 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1137 4fa551d7 ths
        int n_set;
1138 4fa551d7 ths
1139 4fa551d7 ths
        n_set = !!(flags & N_FLAG);
1140 4fa551d7 ths
        T0 = n_set;
1141 4fa551d7 ths
        RETURN();
1142 4fa551d7 ths
}
1143 4fa551d7 ths
void OPPROTO op_tst_cc_mi_fast (void) {
1144 4fa551d7 ths
        T0 = ((int32_t)env->cc_result) < 0;
1145 4fa551d7 ths
        RETURN();
1146 4fa551d7 ths
}
1147 4fa551d7 ths
1148 4fa551d7 ths
void OPPROTO op_tst_cc_ls (void) {
1149 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1150 4fa551d7 ths
        int c_set;
1151 4fa551d7 ths
        int z_set;
1152 4fa551d7 ths
1153 4fa551d7 ths
        c_set = !!(flags & C_FLAG);
1154 4fa551d7 ths
        z_set = !!(flags & Z_FLAG);
1155 4fa551d7 ths
        T0 = c_set || z_set;
1156 4fa551d7 ths
        RETURN();
1157 4fa551d7 ths
}
1158 4fa551d7 ths
void OPPROTO op_tst_cc_hi (void) {
1159 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1160 4fa551d7 ths
        int z_set;
1161 4fa551d7 ths
        int c_set;
1162 4fa551d7 ths
1163 4fa551d7 ths
        z_set = !!(flags & Z_FLAG);
1164 4fa551d7 ths
        c_set = !!(flags & C_FLAG);
1165 4fa551d7 ths
        T0 = !c_set && !z_set;
1166 4fa551d7 ths
        RETURN();
1167 4fa551d7 ths
1168 4fa551d7 ths
}
1169 4fa551d7 ths
1170 4fa551d7 ths
void OPPROTO op_tst_cc_ge (void) {
1171 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1172 4fa551d7 ths
        int n_set;
1173 4fa551d7 ths
        int v_set;
1174 4fa551d7 ths
1175 4fa551d7 ths
        n_set = !!(flags & N_FLAG);
1176 4fa551d7 ths
        v_set = !!(flags & V_FLAG);
1177 4fa551d7 ths
        T0 = (n_set && v_set) || (!n_set && !v_set);
1178 4fa551d7 ths
        RETURN();
1179 4fa551d7 ths
}
1180 4fa551d7 ths
1181 4fa551d7 ths
void OPPROTO op_tst_cc_ge_fast (void) {
1182 4fa551d7 ths
        T0 = ((int32_t)env->cc_src < (int32_t)env->cc_dest);
1183 4fa551d7 ths
        RETURN();
1184 4fa551d7 ths
}
1185 4fa551d7 ths
1186 4fa551d7 ths
void OPPROTO op_tst_cc_lt (void) {
1187 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1188 4fa551d7 ths
        int n_set;
1189 4fa551d7 ths
        int v_set;
1190 4fa551d7 ths
1191 4fa551d7 ths
        n_set = !!(flags & N_FLAG);
1192 4fa551d7 ths
        v_set = !!(flags & V_FLAG);
1193 4fa551d7 ths
        T0 = (n_set && !v_set) || (!n_set && v_set);
1194 4fa551d7 ths
        RETURN();
1195 4fa551d7 ths
}
1196 4fa551d7 ths
1197 4fa551d7 ths
void OPPROTO op_tst_cc_gt (void) {
1198 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1199 4fa551d7 ths
        int n_set;
1200 4fa551d7 ths
        int v_set;
1201 4fa551d7 ths
        int z_set;
1202 4fa551d7 ths
1203 4fa551d7 ths
        n_set = !!(flags & N_FLAG);
1204 4fa551d7 ths
        v_set = !!(flags & V_FLAG);
1205 4fa551d7 ths
        z_set = !!(flags & Z_FLAG);
1206 4fa551d7 ths
        T0 = (n_set && v_set && !z_set)
1207 4fa551d7 ths
                || (!n_set && !v_set && !z_set);
1208 4fa551d7 ths
        RETURN();
1209 4fa551d7 ths
}
1210 4fa551d7 ths
1211 4fa551d7 ths
void OPPROTO op_tst_cc_le (void) {
1212 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1213 4fa551d7 ths
        int n_set;
1214 4fa551d7 ths
        int v_set;
1215 4fa551d7 ths
        int z_set;
1216 4fa551d7 ths
1217 4fa551d7 ths
        n_set = !!(flags & N_FLAG);
1218 4fa551d7 ths
        v_set = !!(flags & V_FLAG);
1219 4fa551d7 ths
        z_set = !!(flags & Z_FLAG);
1220 4fa551d7 ths
        T0 = z_set || (n_set && !v_set) || (!n_set && v_set);
1221 4fa551d7 ths
        RETURN();
1222 4fa551d7 ths
}
1223 4fa551d7 ths
1224 4fa551d7 ths
void OPPROTO op_tst_cc_p (void) {
1225 9004627f edgar_igl
        uint32_t flags = env->pregs[PR_CCS];
1226 4fa551d7 ths
        int p_set;
1227 4fa551d7 ths
1228 4fa551d7 ths
        p_set = !!(flags & P_FLAG);
1229 4fa551d7 ths
        T0 = p_set;
1230 4fa551d7 ths
        RETURN();
1231 4fa551d7 ths
}
1232 4fa551d7 ths
1233 4fa551d7 ths
/* Evaluate the if the branch should be taken or not. Needs to be done in
1234 4fa551d7 ths
   the original sequence. The acutal branch is rescheduled to right after the
1235 4fa551d7 ths
   delay-slot.  */
1236 4fa551d7 ths
void OPPROTO op_evaluate_bcc (void)
1237 4fa551d7 ths
{
1238 4fa551d7 ths
        env->btaken = T0;
1239 4fa551d7 ths
        RETURN();
1240 4fa551d7 ths
}
1241 4fa551d7 ths
1242 4fa551d7 ths
/* this one is used on every alu op, optimize it!.  */
1243 4fa551d7 ths
void OPPROTO op_goto_if_not_x (void)
1244 4fa551d7 ths
{
1245 9004627f edgar_igl
        if (env->pregs[PR_CCS] & X_FLAG)
1246 4fa551d7 ths
                GOTO_LABEL_PARAM(1);
1247 4fa551d7 ths
        RETURN();
1248 4fa551d7 ths
}
1249 4fa551d7 ths
1250 4fa551d7 ths
void OPPROTO op_cc_jmp (void)
1251 4fa551d7 ths
{
1252 4fa551d7 ths
        if (env->btaken)
1253 4fa551d7 ths
                env->pc = PARAM1;
1254 4fa551d7 ths
        else
1255 4fa551d7 ths
                env->pc = PARAM2;
1256 4fa551d7 ths
        RETURN();
1257 4fa551d7 ths
}
1258 4fa551d7 ths
1259 4fa551d7 ths
void OPPROTO op_cc_ngoto (void)
1260 4fa551d7 ths
{
1261 4fa551d7 ths
        if (!env->btaken)
1262 4fa551d7 ths
                GOTO_LABEL_PARAM(1);
1263 4fa551d7 ths
        RETURN();
1264 4fa551d7 ths
}
1265 4fa551d7 ths
1266 4fa551d7 ths
void OPPROTO op_movl_btarget_T0 (void)
1267 4fa551d7 ths
{
1268 4fa551d7 ths
        env->btarget = T0;
1269 4fa551d7 ths
        RETURN();
1270 4fa551d7 ths
}
1271 4fa551d7 ths
1272 57fec1fe bellard
void OPPROTO op_jmp1 (void)
1273 4fa551d7 ths
{
1274 4fa551d7 ths
        env->pc = env->btarget;
1275 4fa551d7 ths
        RETURN();
1276 4fa551d7 ths
}
1277 4fa551d7 ths
1278 4fa551d7 ths
/* Load and store */
1279 4fa551d7 ths
#define MEMSUFFIX _raw
1280 4fa551d7 ths
#include "op_mem.c"
1281 4fa551d7 ths
#undef MEMSUFFIX
1282 4fa551d7 ths
#if !defined(CONFIG_USER_ONLY)
1283 4fa551d7 ths
#define MEMSUFFIX _user
1284 4fa551d7 ths
#include "op_mem.c"
1285 4fa551d7 ths
#undef MEMSUFFIX
1286 4fa551d7 ths
1287 4fa551d7 ths
#define MEMSUFFIX _kernel
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#include "op_mem.c"
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#undef MEMSUFFIX
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#endif