root / hw / pckbd.c @ 78ced65e
History | View | Annotate | Download (15.4 kB)
1 | 80cabfad | bellard | /*
|
---|---|---|---|
2 | 80cabfad | bellard | * QEMU PC keyboard emulation
|
3 | 5fafdf24 | ths | *
|
4 | 80cabfad | bellard | * Copyright (c) 2003 Fabrice Bellard
|
5 | 5fafdf24 | ths | *
|
6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
|
8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
|
9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
|
11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
|
12 | 80cabfad | bellard | *
|
13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
|
14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
|
15 | 80cabfad | bellard | *
|
16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 80cabfad | bellard | * THE SOFTWARE.
|
23 | 80cabfad | bellard | */
|
24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "isa.h" |
26 | 87ecb68b | pbrook | #include "pc.h" |
27 | 87ecb68b | pbrook | #include "ps2.h" |
28 | 87ecb68b | pbrook | #include "sysemu.h" |
29 | 80cabfad | bellard | |
30 | 80cabfad | bellard | /* debug PC keyboard */
|
31 | 80cabfad | bellard | //#define DEBUG_KBD
|
32 | c86d2c23 | Blue Swirl | #ifdef DEBUG_KBD
|
33 | c86d2c23 | Blue Swirl | #define DPRINTF(fmt, ...) \
|
34 | c86d2c23 | Blue Swirl | do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0) |
35 | c86d2c23 | Blue Swirl | #else
|
36 | c86d2c23 | Blue Swirl | #define DPRINTF(fmt, ...)
|
37 | c86d2c23 | Blue Swirl | #endif
|
38 | 80cabfad | bellard | |
39 | 80cabfad | bellard | /* Keyboard Controller Commands */
|
40 | 80cabfad | bellard | #define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */ |
41 | 80cabfad | bellard | #define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */ |
42 | 80cabfad | bellard | #define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */ |
43 | 80cabfad | bellard | #define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */ |
44 | 80cabfad | bellard | #define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */ |
45 | 80cabfad | bellard | #define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */ |
46 | 80cabfad | bellard | #define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */ |
47 | 80cabfad | bellard | #define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */ |
48 | 80cabfad | bellard | #define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */ |
49 | 80cabfad | bellard | #define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */ |
50 | 80cabfad | bellard | #define KBD_CCMD_READ_INPORT 0xC0 /* read input port */ |
51 | 80cabfad | bellard | #define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */ |
52 | 80cabfad | bellard | #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */ |
53 | 80cabfad | bellard | #define KBD_CCMD_WRITE_OBUF 0xD2 |
54 | 80cabfad | bellard | #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if |
55 | 80cabfad | bellard | initiated by the auxiliary device */
|
56 | 80cabfad | bellard | #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */ |
57 | 80cabfad | bellard | #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */ |
58 | 80cabfad | bellard | #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */ |
59 | 5ccaa4ce | Bernhard Kohl | #define KBD_CCMD_PULSE_BITS_3_0 0xF0 /* Pulse bits 3-0 of the output port P2. */ |
60 | 5ccaa4ce | Bernhard Kohl | #define KBD_CCMD_RESET 0xFE /* Pulse bit 0 of the output port P2 = CPU reset. */ |
61 | 5ccaa4ce | Bernhard Kohl | #define KBD_CCMD_NO_OP 0xFF /* Pulse no bits of the output port P2. */ |
62 | 80cabfad | bellard | |
63 | 80cabfad | bellard | /* Keyboard Commands */
|
64 | 80cabfad | bellard | #define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */ |
65 | 80cabfad | bellard | #define KBD_CMD_ECHO 0xEE |
66 | 80cabfad | bellard | #define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */ |
67 | 80cabfad | bellard | #define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */ |
68 | 80cabfad | bellard | #define KBD_CMD_ENABLE 0xF4 /* Enable scanning */ |
69 | 80cabfad | bellard | #define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */ |
70 | 80cabfad | bellard | #define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */ |
71 | 80cabfad | bellard | #define KBD_CMD_RESET 0xFF /* Reset */ |
72 | 80cabfad | bellard | |
73 | 80cabfad | bellard | /* Keyboard Replies */
|
74 | 80cabfad | bellard | #define KBD_REPLY_POR 0xAA /* Power on reset */ |
75 | 80cabfad | bellard | #define KBD_REPLY_ACK 0xFA /* Command ACK */ |
76 | 80cabfad | bellard | #define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */ |
77 | 80cabfad | bellard | |
78 | 80cabfad | bellard | /* Status Register Bits */
|
79 | 80cabfad | bellard | #define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */ |
80 | 80cabfad | bellard | #define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */ |
81 | 80cabfad | bellard | #define KBD_STAT_SELFTEST 0x04 /* Self test successful */ |
82 | 80cabfad | bellard | #define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */ |
83 | 80cabfad | bellard | #define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */ |
84 | 80cabfad | bellard | #define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */ |
85 | 80cabfad | bellard | #define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */ |
86 | 80cabfad | bellard | #define KBD_STAT_PERR 0x80 /* Parity error */ |
87 | 80cabfad | bellard | |
88 | 80cabfad | bellard | /* Controller Mode Register Bits */
|
89 | 80cabfad | bellard | #define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */ |
90 | 80cabfad | bellard | #define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */ |
91 | 80cabfad | bellard | #define KBD_MODE_SYS 0x04 /* The system flag (?) */ |
92 | 80cabfad | bellard | #define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */ |
93 | 80cabfad | bellard | #define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */ |
94 | 80cabfad | bellard | #define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */ |
95 | 80cabfad | bellard | #define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */ |
96 | 80cabfad | bellard | #define KBD_MODE_RFU 0x80 |
97 | 80cabfad | bellard | |
98 | 956a3e6b | Blue Swirl | /* Output Port Bits */
|
99 | 956a3e6b | Blue Swirl | #define KBD_OUT_RESET 0x01 /* 1=normal mode, 0=reset */ |
100 | 956a3e6b | Blue Swirl | #define KBD_OUT_A20 0x02 /* x86 only */ |
101 | 956a3e6b | Blue Swirl | #define KBD_OUT_OBF 0x10 /* Keyboard output buffer full */ |
102 | 956a3e6b | Blue Swirl | #define KBD_OUT_MOUSE_OBF 0x20 /* Mouse output buffer full */ |
103 | 956a3e6b | Blue Swirl | |
104 | 80cabfad | bellard | /* Mouse Commands */
|
105 | 80cabfad | bellard | #define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */ |
106 | 80cabfad | bellard | #define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */ |
107 | 80cabfad | bellard | #define AUX_SET_RES 0xE8 /* Set resolution */ |
108 | 80cabfad | bellard | #define AUX_GET_SCALE 0xE9 /* Get scaling factor */ |
109 | 80cabfad | bellard | #define AUX_SET_STREAM 0xEA /* Set stream mode */ |
110 | 80cabfad | bellard | #define AUX_POLL 0xEB /* Poll */ |
111 | 80cabfad | bellard | #define AUX_RESET_WRAP 0xEC /* Reset wrap mode */ |
112 | 80cabfad | bellard | #define AUX_SET_WRAP 0xEE /* Set wrap mode */ |
113 | 80cabfad | bellard | #define AUX_SET_REMOTE 0xF0 /* Set remote mode */ |
114 | 80cabfad | bellard | #define AUX_GET_TYPE 0xF2 /* Get type */ |
115 | 80cabfad | bellard | #define AUX_SET_SAMPLE 0xF3 /* Set sample rate */ |
116 | 80cabfad | bellard | #define AUX_ENABLE_DEV 0xF4 /* Enable aux device */ |
117 | 80cabfad | bellard | #define AUX_DISABLE_DEV 0xF5 /* Disable aux device */ |
118 | 80cabfad | bellard | #define AUX_SET_DEFAULT 0xF6 |
119 | 80cabfad | bellard | #define AUX_RESET 0xFF /* Reset aux device */ |
120 | 80cabfad | bellard | #define AUX_ACK 0xFA /* Command byte ACK. */ |
121 | 80cabfad | bellard | |
122 | 80cabfad | bellard | #define MOUSE_STATUS_REMOTE 0x40 |
123 | 80cabfad | bellard | #define MOUSE_STATUS_ENABLED 0x20 |
124 | 80cabfad | bellard | #define MOUSE_STATUS_SCALE21 0x10 |
125 | 80cabfad | bellard | |
126 | daa57963 | bellard | #define KBD_PENDING_KBD 1 |
127 | daa57963 | bellard | #define KBD_PENDING_AUX 2 |
128 | 80cabfad | bellard | |
129 | 80cabfad | bellard | typedef struct KBDState { |
130 | 80cabfad | bellard | uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
|
131 | 80cabfad | bellard | uint8_t status; |
132 | 80cabfad | bellard | uint8_t mode; |
133 | 956a3e6b | Blue Swirl | uint8_t outport; |
134 | daa57963 | bellard | /* Bitmask of devices with data available. */
|
135 | 7783e9f0 | pbrook | uint8_t pending; |
136 | daa57963 | bellard | void *kbd;
|
137 | daa57963 | bellard | void *mouse;
|
138 | b7678d96 | ths | |
139 | d537cf6c | pbrook | qemu_irq irq_kbd; |
140 | d537cf6c | pbrook | qemu_irq irq_mouse; |
141 | 956a3e6b | Blue Swirl | qemu_irq *a20_out; |
142 | c227f099 | Anthony Liguori | target_phys_addr_t mask; |
143 | 80cabfad | bellard | } KBDState; |
144 | 80cabfad | bellard | |
145 | 80cabfad | bellard | /* update irq and KBD_STAT_[MOUSE_]OBF */
|
146 | 80cabfad | bellard | /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
|
147 | 80cabfad | bellard | incorrect, but it avoids having to simulate exact delays */
|
148 | 80cabfad | bellard | static void kbd_update_irq(KBDState *s) |
149 | 80cabfad | bellard | { |
150 | b7678d96 | ths | int irq_kbd_level, irq_mouse_level;
|
151 | 80cabfad | bellard | |
152 | b7678d96 | ths | irq_kbd_level = 0;
|
153 | b7678d96 | ths | irq_mouse_level = 0;
|
154 | 80cabfad | bellard | s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF); |
155 | 956a3e6b | Blue Swirl | s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF); |
156 | daa57963 | bellard | if (s->pending) {
|
157 | 80cabfad | bellard | s->status |= KBD_STAT_OBF; |
158 | 956a3e6b | Blue Swirl | s->outport |= KBD_OUT_OBF; |
159 | b92bb99b | ths | /* kbd data takes priority over aux data. */
|
160 | daa57963 | bellard | if (s->pending == KBD_PENDING_AUX) {
|
161 | 80cabfad | bellard | s->status |= KBD_STAT_MOUSE_OBF; |
162 | 956a3e6b | Blue Swirl | s->outport |= KBD_OUT_MOUSE_OBF; |
163 | 80cabfad | bellard | if (s->mode & KBD_MODE_MOUSE_INT)
|
164 | b7678d96 | ths | irq_mouse_level = 1;
|
165 | 80cabfad | bellard | } else {
|
166 | 5fafdf24 | ths | if ((s->mode & KBD_MODE_KBD_INT) &&
|
167 | 80cabfad | bellard | !(s->mode & KBD_MODE_DISABLE_KBD)) |
168 | b7678d96 | ths | irq_kbd_level = 1;
|
169 | 80cabfad | bellard | } |
170 | 80cabfad | bellard | } |
171 | d537cf6c | pbrook | qemu_set_irq(s->irq_kbd, irq_kbd_level); |
172 | d537cf6c | pbrook | qemu_set_irq(s->irq_mouse, irq_mouse_level); |
173 | 80cabfad | bellard | } |
174 | 80cabfad | bellard | |
175 | daa57963 | bellard | static void kbd_update_kbd_irq(void *opaque, int level) |
176 | 80cabfad | bellard | { |
177 | daa57963 | bellard | KBDState *s = (KBDState *)opaque; |
178 | 80cabfad | bellard | |
179 | daa57963 | bellard | if (level)
|
180 | daa57963 | bellard | s->pending |= KBD_PENDING_KBD; |
181 | 80cabfad | bellard | else
|
182 | daa57963 | bellard | s->pending &= ~KBD_PENDING_KBD; |
183 | 80cabfad | bellard | kbd_update_irq(s); |
184 | 80cabfad | bellard | } |
185 | 80cabfad | bellard | |
186 | daa57963 | bellard | static void kbd_update_aux_irq(void *opaque, int level) |
187 | 80cabfad | bellard | { |
188 | daa57963 | bellard | KBDState *s = (KBDState *)opaque; |
189 | daa57963 | bellard | |
190 | daa57963 | bellard | if (level)
|
191 | daa57963 | bellard | s->pending |= KBD_PENDING_AUX; |
192 | daa57963 | bellard | else
|
193 | daa57963 | bellard | s->pending &= ~KBD_PENDING_AUX; |
194 | daa57963 | bellard | kbd_update_irq(s); |
195 | 80cabfad | bellard | } |
196 | 80cabfad | bellard | |
197 | b41a2cd1 | bellard | static uint32_t kbd_read_status(void *opaque, uint32_t addr) |
198 | 80cabfad | bellard | { |
199 | b41a2cd1 | bellard | KBDState *s = opaque; |
200 | 80cabfad | bellard | int val;
|
201 | 80cabfad | bellard | val = s->status; |
202 | c86d2c23 | Blue Swirl | DPRINTF("kbd: read status=0x%02x\n", val);
|
203 | 80cabfad | bellard | return val;
|
204 | 80cabfad | bellard | } |
205 | 80cabfad | bellard | |
206 | daa57963 | bellard | static void kbd_queue(KBDState *s, int b, int aux) |
207 | daa57963 | bellard | { |
208 | daa57963 | bellard | if (aux)
|
209 | daa57963 | bellard | ps2_queue(s->mouse, b); |
210 | daa57963 | bellard | else
|
211 | daa57963 | bellard | ps2_queue(s->kbd, b); |
212 | daa57963 | bellard | } |
213 | daa57963 | bellard | |
214 | 956a3e6b | Blue Swirl | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
215 | 956a3e6b | Blue Swirl | { |
216 | 956a3e6b | Blue Swirl | KBDState *s = opaque; |
217 | 956a3e6b | Blue Swirl | |
218 | c86d2c23 | Blue Swirl | DPRINTF("kbd: write outport=0x%02x\n", val);
|
219 | 956a3e6b | Blue Swirl | s->outport = val; |
220 | 956a3e6b | Blue Swirl | if (s->a20_out) {
|
221 | 956a3e6b | Blue Swirl | qemu_set_irq(*s->a20_out, (val >> 1) & 1); |
222 | 956a3e6b | Blue Swirl | } |
223 | 956a3e6b | Blue Swirl | if (!(val & 1)) { |
224 | 956a3e6b | Blue Swirl | qemu_system_reset_request(); |
225 | 956a3e6b | Blue Swirl | } |
226 | 956a3e6b | Blue Swirl | } |
227 | 956a3e6b | Blue Swirl | |
228 | 956a3e6b | Blue Swirl | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
229 | 956a3e6b | Blue Swirl | { |
230 | 956a3e6b | Blue Swirl | KBDState *s = opaque; |
231 | c86d2c23 | Blue Swirl | uint32_t ret; |
232 | 956a3e6b | Blue Swirl | |
233 | c86d2c23 | Blue Swirl | ret = s->outport; |
234 | c86d2c23 | Blue Swirl | DPRINTF("kbd: read outport=0x%02x\n", ret);
|
235 | c86d2c23 | Blue Swirl | return ret;
|
236 | 956a3e6b | Blue Swirl | } |
237 | 956a3e6b | Blue Swirl | |
238 | b41a2cd1 | bellard | static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val) |
239 | 80cabfad | bellard | { |
240 | b41a2cd1 | bellard | KBDState *s = opaque; |
241 | 80cabfad | bellard | |
242 | c86d2c23 | Blue Swirl | DPRINTF("kbd: write cmd=0x%02x\n", val);
|
243 | 5ccaa4ce | Bernhard Kohl | |
244 | 5ccaa4ce | Bernhard Kohl | /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
|
245 | 5ccaa4ce | Bernhard Kohl | * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
|
246 | 5ccaa4ce | Bernhard Kohl | * command specify the output port bits to be pulsed.
|
247 | 5ccaa4ce | Bernhard Kohl | * 0: Bit should be pulsed. 1: Bit should not be modified.
|
248 | 5ccaa4ce | Bernhard Kohl | * The only useful version of this command is pulsing bit 0,
|
249 | 5ccaa4ce | Bernhard Kohl | * which does a CPU reset.
|
250 | 5ccaa4ce | Bernhard Kohl | */
|
251 | 5ccaa4ce | Bernhard Kohl | if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
|
252 | 5ccaa4ce | Bernhard Kohl | if(!(val & 1)) |
253 | 5ccaa4ce | Bernhard Kohl | val = KBD_CCMD_RESET; |
254 | 5ccaa4ce | Bernhard Kohl | else
|
255 | 5ccaa4ce | Bernhard Kohl | val = KBD_CCMD_NO_OP; |
256 | 5ccaa4ce | Bernhard Kohl | } |
257 | 5ccaa4ce | Bernhard Kohl | |
258 | 80cabfad | bellard | switch(val) {
|
259 | 80cabfad | bellard | case KBD_CCMD_READ_MODE:
|
260 | 889bec69 | balrog | kbd_queue(s, s->mode, 0);
|
261 | 80cabfad | bellard | break;
|
262 | 80cabfad | bellard | case KBD_CCMD_WRITE_MODE:
|
263 | 80cabfad | bellard | case KBD_CCMD_WRITE_OBUF:
|
264 | 80cabfad | bellard | case KBD_CCMD_WRITE_AUX_OBUF:
|
265 | 80cabfad | bellard | case KBD_CCMD_WRITE_MOUSE:
|
266 | 80cabfad | bellard | case KBD_CCMD_WRITE_OUTPORT:
|
267 | 80cabfad | bellard | s->write_cmd = val; |
268 | 80cabfad | bellard | break;
|
269 | 80cabfad | bellard | case KBD_CCMD_MOUSE_DISABLE:
|
270 | 80cabfad | bellard | s->mode |= KBD_MODE_DISABLE_MOUSE; |
271 | 80cabfad | bellard | break;
|
272 | 80cabfad | bellard | case KBD_CCMD_MOUSE_ENABLE:
|
273 | 80cabfad | bellard | s->mode &= ~KBD_MODE_DISABLE_MOUSE; |
274 | 80cabfad | bellard | break;
|
275 | 80cabfad | bellard | case KBD_CCMD_TEST_MOUSE:
|
276 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
277 | 80cabfad | bellard | break;
|
278 | 80cabfad | bellard | case KBD_CCMD_SELF_TEST:
|
279 | 80cabfad | bellard | s->status |= KBD_STAT_SELFTEST; |
280 | 80cabfad | bellard | kbd_queue(s, 0x55, 0); |
281 | 80cabfad | bellard | break;
|
282 | 80cabfad | bellard | case KBD_CCMD_KBD_TEST:
|
283 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
284 | 80cabfad | bellard | break;
|
285 | 80cabfad | bellard | case KBD_CCMD_KBD_DISABLE:
|
286 | 80cabfad | bellard | s->mode |= KBD_MODE_DISABLE_KBD; |
287 | 80cabfad | bellard | kbd_update_irq(s); |
288 | 80cabfad | bellard | break;
|
289 | 80cabfad | bellard | case KBD_CCMD_KBD_ENABLE:
|
290 | 80cabfad | bellard | s->mode &= ~KBD_MODE_DISABLE_KBD; |
291 | 80cabfad | bellard | kbd_update_irq(s); |
292 | 80cabfad | bellard | break;
|
293 | 80cabfad | bellard | case KBD_CCMD_READ_INPORT:
|
294 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
295 | 80cabfad | bellard | break;
|
296 | 80cabfad | bellard | case KBD_CCMD_READ_OUTPORT:
|
297 | 956a3e6b | Blue Swirl | kbd_queue(s, s->outport, 0);
|
298 | 80cabfad | bellard | break;
|
299 | 80cabfad | bellard | case KBD_CCMD_ENABLE_A20:
|
300 | 956a3e6b | Blue Swirl | if (s->a20_out) {
|
301 | 956a3e6b | Blue Swirl | qemu_irq_raise(*s->a20_out); |
302 | 956a3e6b | Blue Swirl | } |
303 | 956a3e6b | Blue Swirl | s->outport |= KBD_OUT_A20; |
304 | 80cabfad | bellard | break;
|
305 | 80cabfad | bellard | case KBD_CCMD_DISABLE_A20:
|
306 | 956a3e6b | Blue Swirl | if (s->a20_out) {
|
307 | 956a3e6b | Blue Swirl | qemu_irq_lower(*s->a20_out); |
308 | 956a3e6b | Blue Swirl | } |
309 | 956a3e6b | Blue Swirl | s->outport &= ~KBD_OUT_A20; |
310 | 80cabfad | bellard | break;
|
311 | 80cabfad | bellard | case KBD_CCMD_RESET:
|
312 | d7d02e3c | bellard | qemu_system_reset_request(); |
313 | 80cabfad | bellard | break;
|
314 | 5ccaa4ce | Bernhard Kohl | case KBD_CCMD_NO_OP:
|
315 | 5ccaa4ce | Bernhard Kohl | /* ignore that */
|
316 | 80cabfad | bellard | break;
|
317 | 80cabfad | bellard | default:
|
318 | 80cabfad | bellard | fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
|
319 | 80cabfad | bellard | break;
|
320 | 80cabfad | bellard | } |
321 | 80cabfad | bellard | } |
322 | 80cabfad | bellard | |
323 | b41a2cd1 | bellard | static uint32_t kbd_read_data(void *opaque, uint32_t addr) |
324 | 80cabfad | bellard | { |
325 | b41a2cd1 | bellard | KBDState *s = opaque; |
326 | e41c0f26 | balrog | uint32_t val; |
327 | 80cabfad | bellard | |
328 | daa57963 | bellard | if (s->pending == KBD_PENDING_AUX)
|
329 | e41c0f26 | balrog | val = ps2_read_data(s->mouse); |
330 | e41c0f26 | balrog | else
|
331 | e41c0f26 | balrog | val = ps2_read_data(s->kbd); |
332 | 80cabfad | bellard | |
333 | c86d2c23 | Blue Swirl | DPRINTF("kbd: read data=0x%02x\n", val);
|
334 | e41c0f26 | balrog | return val;
|
335 | 80cabfad | bellard | } |
336 | 80cabfad | bellard | |
337 | 9596ebb7 | pbrook | static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val) |
338 | 80cabfad | bellard | { |
339 | b41a2cd1 | bellard | KBDState *s = opaque; |
340 | 80cabfad | bellard | |
341 | c86d2c23 | Blue Swirl | DPRINTF("kbd: write data=0x%02x\n", val);
|
342 | 80cabfad | bellard | |
343 | 80cabfad | bellard | switch(s->write_cmd) {
|
344 | 80cabfad | bellard | case 0: |
345 | daa57963 | bellard | ps2_write_keyboard(s->kbd, val); |
346 | 80cabfad | bellard | break;
|
347 | 80cabfad | bellard | case KBD_CCMD_WRITE_MODE:
|
348 | 80cabfad | bellard | s->mode = val; |
349 | f94f5d71 | pbrook | ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
|
350 | daa57963 | bellard | /* ??? */
|
351 | 80cabfad | bellard | kbd_update_irq(s); |
352 | 80cabfad | bellard | break;
|
353 | 80cabfad | bellard | case KBD_CCMD_WRITE_OBUF:
|
354 | 80cabfad | bellard | kbd_queue(s, val, 0);
|
355 | 80cabfad | bellard | break;
|
356 | 80cabfad | bellard | case KBD_CCMD_WRITE_AUX_OBUF:
|
357 | 80cabfad | bellard | kbd_queue(s, val, 1);
|
358 | 80cabfad | bellard | break;
|
359 | 80cabfad | bellard | case KBD_CCMD_WRITE_OUTPORT:
|
360 | 956a3e6b | Blue Swirl | ioport92_write(s, 0, val);
|
361 | 80cabfad | bellard | break;
|
362 | 80cabfad | bellard | case KBD_CCMD_WRITE_MOUSE:
|
363 | daa57963 | bellard | ps2_write_mouse(s->mouse, val); |
364 | 80cabfad | bellard | break;
|
365 | 80cabfad | bellard | default:
|
366 | 80cabfad | bellard | break;
|
367 | 80cabfad | bellard | } |
368 | 80cabfad | bellard | s->write_cmd = 0;
|
369 | 80cabfad | bellard | } |
370 | 80cabfad | bellard | |
371 | d7d02e3c | bellard | static void kbd_reset(void *opaque) |
372 | 80cabfad | bellard | { |
373 | d7d02e3c | bellard | KBDState *s = opaque; |
374 | 80cabfad | bellard | |
375 | 80cabfad | bellard | s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT; |
376 | 80cabfad | bellard | s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED; |
377 | 956a3e6b | Blue Swirl | s->outport = KBD_OUT_RESET | KBD_OUT_A20; |
378 | 80cabfad | bellard | } |
379 | 80cabfad | bellard | |
380 | 3c619b59 | Juan Quintela | static const VMStateDescription vmstate_kbd = { |
381 | 3c619b59 | Juan Quintela | .name = "pckbd",
|
382 | 3c619b59 | Juan Quintela | .version_id = 3,
|
383 | 3c619b59 | Juan Quintela | .minimum_version_id = 3,
|
384 | 3c619b59 | Juan Quintela | .minimum_version_id_old = 3,
|
385 | 3c619b59 | Juan Quintela | .fields = (VMStateField []) { |
386 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(write_cmd, KBDState), |
387 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(status, KBDState), |
388 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(mode, KBDState), |
389 | 3c619b59 | Juan Quintela | VMSTATE_UINT8(pending, KBDState), |
390 | 3c619b59 | Juan Quintela | VMSTATE_END_OF_LIST() |
391 | 3c619b59 | Juan Quintela | } |
392 | 3c619b59 | Juan Quintela | }; |
393 | 675376f2 | bellard | |
394 | b92bb99b | ths | /* Memory mapped interface */
|
395 | c227f099 | Anthony Liguori | static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr) |
396 | b92bb99b | ths | { |
397 | b92bb99b | ths | KBDState *s = opaque; |
398 | b92bb99b | ths | |
399 | 4efbe58f | aurel32 | if (addr & s->mask)
|
400 | 80355292 | ths | return kbd_read_status(s, 0) & 0xff; |
401 | 4efbe58f | aurel32 | else
|
402 | 4efbe58f | aurel32 | return kbd_read_data(s, 0) & 0xff; |
403 | b92bb99b | ths | } |
404 | b92bb99b | ths | |
405 | c227f099 | Anthony Liguori | static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) |
406 | b92bb99b | ths | { |
407 | b92bb99b | ths | KBDState *s = opaque; |
408 | b92bb99b | ths | |
409 | 4efbe58f | aurel32 | if (addr & s->mask)
|
410 | 80355292 | ths | kbd_write_command(s, 0, value & 0xff); |
411 | 4efbe58f | aurel32 | else
|
412 | 4efbe58f | aurel32 | kbd_write_data(s, 0, value & 0xff); |
413 | b92bb99b | ths | } |
414 | b92bb99b | ths | |
415 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const kbd_mm_read[] = { |
416 | b92bb99b | ths | &kbd_mm_readb, |
417 | b92bb99b | ths | &kbd_mm_readb, |
418 | b92bb99b | ths | &kbd_mm_readb, |
419 | b92bb99b | ths | }; |
420 | b92bb99b | ths | |
421 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const kbd_mm_write[] = { |
422 | b92bb99b | ths | &kbd_mm_writeb, |
423 | b92bb99b | ths | &kbd_mm_writeb, |
424 | b92bb99b | ths | &kbd_mm_writeb, |
425 | b92bb99b | ths | }; |
426 | b92bb99b | ths | |
427 | 71db710f | blueswir1 | void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
|
428 | c227f099 | Anthony Liguori | target_phys_addr_t base, ram_addr_t size, |
429 | c227f099 | Anthony Liguori | target_phys_addr_t mask) |
430 | b92bb99b | ths | { |
431 | 5acd0646 | Blue Swirl | KBDState *s = qemu_mallocz(sizeof(KBDState));
|
432 | b92bb99b | ths | int s_io_memory;
|
433 | b92bb99b | ths | |
434 | b92bb99b | ths | s->irq_kbd = kbd_irq; |
435 | b92bb99b | ths | s->irq_mouse = mouse_irq; |
436 | 4efbe58f | aurel32 | s->mask = mask; |
437 | b92bb99b | ths | |
438 | 0be71e32 | Alex Williamson | vmstate_register(NULL, 0, &vmstate_kbd, s); |
439 | 1eed09cb | Avi Kivity | s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s); |
440 | 4efbe58f | aurel32 | cpu_register_physical_memory(base, size, s_io_memory); |
441 | b92bb99b | ths | |
442 | b92bb99b | ths | s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
443 | b92bb99b | ths | s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
444 | a08d4367 | Jan Kiszka | qemu_register_reset(kbd_reset, s); |
445 | b92bb99b | ths | } |
446 | da85ccfb | Gerd Hoffmann | |
447 | da85ccfb | Gerd Hoffmann | typedef struct ISAKBDState { |
448 | da85ccfb | Gerd Hoffmann | ISADevice dev; |
449 | da85ccfb | Gerd Hoffmann | KBDState kbd; |
450 | da85ccfb | Gerd Hoffmann | } ISAKBDState; |
451 | da85ccfb | Gerd Hoffmann | |
452 | 956a3e6b | Blue Swirl | void i8042_isa_mouse_fake_event(void *opaque) |
453 | 956a3e6b | Blue Swirl | { |
454 | 956a3e6b | Blue Swirl | ISADevice *dev = opaque; |
455 | 956a3e6b | Blue Swirl | KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd); |
456 | 956a3e6b | Blue Swirl | |
457 | 956a3e6b | Blue Swirl | ps2_mouse_fake_event(s->mouse); |
458 | 956a3e6b | Blue Swirl | } |
459 | 956a3e6b | Blue Swirl | |
460 | 956a3e6b | Blue Swirl | void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out)
|
461 | 956a3e6b | Blue Swirl | { |
462 | 956a3e6b | Blue Swirl | KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd); |
463 | 956a3e6b | Blue Swirl | |
464 | 956a3e6b | Blue Swirl | s->a20_out = a20_out; |
465 | 956a3e6b | Blue Swirl | } |
466 | 956a3e6b | Blue Swirl | |
467 | d05ac8fa | Blue Swirl | static const VMStateDescription vmstate_kbd_isa = { |
468 | be73cfe2 | Juan Quintela | .name = "pckbd",
|
469 | be73cfe2 | Juan Quintela | .version_id = 3,
|
470 | be73cfe2 | Juan Quintela | .minimum_version_id = 3,
|
471 | be73cfe2 | Juan Quintela | .minimum_version_id_old = 3,
|
472 | be73cfe2 | Juan Quintela | .fields = (VMStateField []) { |
473 | be73cfe2 | Juan Quintela | VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
|
474 | be73cfe2 | Juan Quintela | VMSTATE_END_OF_LIST() |
475 | be73cfe2 | Juan Quintela | } |
476 | be73cfe2 | Juan Quintela | }; |
477 | be73cfe2 | Juan Quintela | |
478 | 81a322d4 | Gerd Hoffmann | static int i8042_initfn(ISADevice *dev) |
479 | da85ccfb | Gerd Hoffmann | { |
480 | da85ccfb | Gerd Hoffmann | KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd); |
481 | da85ccfb | Gerd Hoffmann | |
482 | 2e15e23b | Gerd Hoffmann | isa_init_irq(dev, &s->irq_kbd, 1);
|
483 | 2e15e23b | Gerd Hoffmann | isa_init_irq(dev, &s->irq_mouse, 12);
|
484 | da85ccfb | Gerd Hoffmann | |
485 | 86c86157 | Gerd Hoffmann | register_ioport_read(0x60, 1, 1, kbd_read_data, s); |
486 | 86c86157 | Gerd Hoffmann | register_ioport_write(0x60, 1, 1, kbd_write_data, s); |
487 | 86c86157 | Gerd Hoffmann | register_ioport_read(0x64, 1, 1, kbd_read_status, s); |
488 | 86c86157 | Gerd Hoffmann | register_ioport_write(0x64, 1, 1, kbd_write_command, s); |
489 | 956a3e6b | Blue Swirl | register_ioport_read(0x92, 1, 1, ioport92_read, s); |
490 | 956a3e6b | Blue Swirl | register_ioport_write(0x92, 1, 1, ioport92_write, s); |
491 | da85ccfb | Gerd Hoffmann | |
492 | da85ccfb | Gerd Hoffmann | s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
493 | da85ccfb | Gerd Hoffmann | s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
494 | da85ccfb | Gerd Hoffmann | qemu_register_reset(kbd_reset, s); |
495 | 81a322d4 | Gerd Hoffmann | return 0; |
496 | da85ccfb | Gerd Hoffmann | } |
497 | da85ccfb | Gerd Hoffmann | |
498 | da85ccfb | Gerd Hoffmann | static ISADeviceInfo i8042_info = {
|
499 | da85ccfb | Gerd Hoffmann | .qdev.name = "i8042",
|
500 | da85ccfb | Gerd Hoffmann | .qdev.size = sizeof(ISAKBDState),
|
501 | be73cfe2 | Juan Quintela | .qdev.vmsd = &vmstate_kbd_isa, |
502 | da85ccfb | Gerd Hoffmann | .qdev.no_user = 1,
|
503 | da85ccfb | Gerd Hoffmann | .init = i8042_initfn, |
504 | da85ccfb | Gerd Hoffmann | }; |
505 | da85ccfb | Gerd Hoffmann | |
506 | da85ccfb | Gerd Hoffmann | static void i8042_register(void) |
507 | da85ccfb | Gerd Hoffmann | { |
508 | da85ccfb | Gerd Hoffmann | isa_qdev_register(&i8042_info); |
509 | da85ccfb | Gerd Hoffmann | } |
510 | da85ccfb | Gerd Hoffmann | device_init(i8042_register) |