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Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Correct spelling of licensed
Correct typos of "licenced" to "licensed".
Reviewed-by: Stefan Weil <weil@mail.berlios.de>Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de>Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. Thetarget endianness is not of their concern, so we need to push thingsdown a level.
This patch adds a parameter to cpu_register_io_memory that allows adevice to choose its endianness. For now, all devices simply choose...
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
Make CPURead/WriteFunc structure 'const'
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Remove io_index argument from cpu_register_io_memory()
The parameter is always zero except when registering the three internalio regions (ROM, unassigned, notdirty). Remove the parameter to reducethe API's power, thus facilitating future change.
Signed-off-by: Avi Kivity <avi@redhat.com>...
Replace cpu_abort with hw_error
Signed-off-by: Paul Brook <paul@codesourcery.com>
SH4: fix TMU init
Init the TMU and the ptimer with the correct cpu reset value
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6549 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).
Main purpose of this is to delete *physical = address & 0x1fffffff;at target-sh4/helper.c:449, using new mmio rule introduced by #5849This masking is a nice trick to realize P4/A7 duality of SH registers....
Change MMIO callbacks to use offsets, not absolute addresses.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
SH4: Use qemu_irq in timer emulation.
Adds interrupt support to the sh specific timer code (Magnus Damm).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3812 c046a42c-6fe2-441c-8c8c-71466251a162
Add statics and missing #includes for prototypes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3683 c046a42c-6fe2-441c-8c8c-71466251a162
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
Stand-alone TMU emulation code, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3269 c046a42c-6fe2-441c-8c8c-71466251a162