kvm: i8254: Fix conversion of in-kernel to userspace state
Due to a offset between the clock used to generate the in-kernelcount_load_time (CLOCK_MONOTONIC) and the clock used for processing thisin userspace (vm_clock), reading back the output of PIT channel 2 via...
kvm/apic: correct short memset
kvm_put_apic_state's attempt to clear kapic before setting itsbits cleared sizeof(void) bytes (no more than 8) rather than theintended 1024 (KVM_APIC_REG_SIZE) bytes. Spotted by coverity.
Signed-off-by: Jim Meyering <meyering@redhat.com>...
kvm: x86: Wire up MSI support for in-kernel irqchip
Catch writes to the MSI MMIO region in the KVM APIC and forward them tothe kernel. Provide the kernel support GSI routing, this allows toenable MSI support also for in-kernel irqchip mode.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
kvmclock: guest stop notification
Often when a guest is stopped from the qemu console, it will report spurioussoft lockup warnings on resume. There are kernel patches being discussed thatwill give the host the ability to tell the guest that it is being stopped and...
i386 hw/: Don't use CPUState
Scripted conversion: for file in hw/apic.h hw/kvm/apic.c hw/kvmvapic.c hw/pc.c hw/vmport.c hw/xen_machine_pv.c; do sed -i "s/CPUState/CPUX86State/g" $file done
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
kvmclock: Always register type
Currently, the "kvmclock" type is only registered when kvm_enabled().
This breaks when moving type registration to before command lineparsing (so that QOM types can be used for CPU and machine).
Since the QOM classes are lazy-initialized anyway and kvmclock_create()...
kvm: x86: Add user space part for in-kernel i8254
This provides the required user space stubs to enable the in-kerneli8254 emulation of KVM.
The in-kernel model supports lost tick compensation according to the"delay" policy. This is enabled by default and can be switched off via a...
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
kvmvapic: Introduce TPR access optimization for Windows guests
This enables acceleration for MMIO-based TPR registers accesses of32-bit Windows guest systems. It is mostly useful with KVM enabled,either on older Intel CPUs (without flexpriority feature, can also be...
i8259: Do not clear level-triggered lines in IRR on init
When an input line is handled as level-triggered, it will immediatelyraise an IRQ on the output of a PIC again that goes through an initreset. So only clear the edge-triggered inputs from IRR in that...
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