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1 | 02eb84d0 | Michael S. Tsirkin | /*
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2 | 02eb84d0 | Michael S. Tsirkin | * MSI-X device support
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3 | 02eb84d0 | Michael S. Tsirkin | *
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4 | 02eb84d0 | Michael S. Tsirkin | * This module includes support for MSI-X in pci devices.
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5 | 02eb84d0 | Michael S. Tsirkin | *
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6 | 02eb84d0 | Michael S. Tsirkin | * Author: Michael S. Tsirkin <mst@redhat.com>
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7 | 02eb84d0 | Michael S. Tsirkin | *
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8 | 02eb84d0 | Michael S. Tsirkin | * Copyright (c) 2009, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
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9 | 02eb84d0 | Michael S. Tsirkin | *
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10 | 02eb84d0 | Michael S. Tsirkin | * This work is licensed under the terms of the GNU GPL, version 2. See
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11 | 02eb84d0 | Michael S. Tsirkin | * the COPYING file in the top-level directory.
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12 | 6b620ca3 | Paolo Bonzini | *
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13 | 6b620ca3 | Paolo Bonzini | * Contributions after 2012-01-13 are licensed under the terms of the
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14 | 6b620ca3 | Paolo Bonzini | * GNU GPL, version 2 or (at your option) any later version.
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15 | 02eb84d0 | Michael S. Tsirkin | */
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16 | 02eb84d0 | Michael S. Tsirkin | |
17 | 02eb84d0 | Michael S. Tsirkin | #include "hw.h" |
18 | 60ba3cc2 | Jan Kiszka | #include "msi.h" |
19 | 02eb84d0 | Michael S. Tsirkin | #include "msix.h" |
20 | 02eb84d0 | Michael S. Tsirkin | #include "pci.h" |
21 | bf1b0071 | Blue Swirl | #include "range.h" |
22 | 02eb84d0 | Michael S. Tsirkin | |
23 | 02eb84d0 | Michael S. Tsirkin | #define MSIX_CAP_LENGTH 12 |
24 | 02eb84d0 | Michael S. Tsirkin | |
25 | 2760952b | Michael S. Tsirkin | /* MSI enable bit and maskall bit are in byte 1 in FLAGS register */
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26 | 2760952b | Michael S. Tsirkin | #define MSIX_CONTROL_OFFSET (PCI_MSIX_FLAGS + 1) |
27 | 02eb84d0 | Michael S. Tsirkin | #define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8) |
28 | 5b5cb086 | Michael S. Tsirkin | #define MSIX_MASKALL_MASK (PCI_MSIX_FLAGS_MASKALL >> 8) |
29 | 02eb84d0 | Michael S. Tsirkin | |
30 | 5a1fc5e8 | Michael S. Tsirkin | /* How much space does an MSIX table need. */
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31 | 5a1fc5e8 | Michael S. Tsirkin | /* The spec requires giving the table structure
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32 | 5a1fc5e8 | Michael S. Tsirkin | * a 4K aligned region all by itself. */
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33 | 5a1fc5e8 | Michael S. Tsirkin | #define MSIX_PAGE_SIZE 0x1000 |
34 | 5a1fc5e8 | Michael S. Tsirkin | /* Reserve second half of the page for pending bits */
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35 | 5a1fc5e8 | Michael S. Tsirkin | #define MSIX_PAGE_PENDING (MSIX_PAGE_SIZE / 2) |
36 | 02eb84d0 | Michael S. Tsirkin | #define MSIX_MAX_ENTRIES 32 |
37 | 02eb84d0 | Michael S. Tsirkin | |
38 | bc4caf49 | Jan Kiszka | static MSIMessage msix_get_message(PCIDevice *dev, unsigned vector) |
39 | bc4caf49 | Jan Kiszka | { |
40 | bc4caf49 | Jan Kiszka | uint8_t *table_entry = dev->msix_table_page + vector * PCI_MSIX_ENTRY_SIZE; |
41 | bc4caf49 | Jan Kiszka | MSIMessage msg; |
42 | bc4caf49 | Jan Kiszka | |
43 | bc4caf49 | Jan Kiszka | msg.address = pci_get_quad(table_entry + PCI_MSIX_ENTRY_LOWER_ADDR); |
44 | bc4caf49 | Jan Kiszka | msg.data = pci_get_long(table_entry + PCI_MSIX_ENTRY_DATA); |
45 | bc4caf49 | Jan Kiszka | return msg;
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46 | bc4caf49 | Jan Kiszka | } |
47 | 02eb84d0 | Michael S. Tsirkin | |
48 | 02eb84d0 | Michael S. Tsirkin | /* Add MSI-X capability to the config space for the device. */
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49 | 02eb84d0 | Michael S. Tsirkin | /* Given a bar and its size, add MSI-X table on top of it
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50 | 02eb84d0 | Michael S. Tsirkin | * and fill MSI-X capability in the config space.
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51 | 02eb84d0 | Michael S. Tsirkin | * Original bar size must be a power of 2 or 0.
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52 | 02eb84d0 | Michael S. Tsirkin | * New bar size is returned. */
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53 | 02eb84d0 | Michael S. Tsirkin | static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries, |
54 | 02eb84d0 | Michael S. Tsirkin | unsigned bar_nr, unsigned bar_size) |
55 | 02eb84d0 | Michael S. Tsirkin | { |
56 | 02eb84d0 | Michael S. Tsirkin | int config_offset;
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57 | 02eb84d0 | Michael S. Tsirkin | uint8_t *config; |
58 | 02eb84d0 | Michael S. Tsirkin | uint32_t new_size; |
59 | 02eb84d0 | Michael S. Tsirkin | |
60 | 02eb84d0 | Michael S. Tsirkin | if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1) |
61 | 02eb84d0 | Michael S. Tsirkin | return -EINVAL;
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62 | 02eb84d0 | Michael S. Tsirkin | if (bar_size > 0x80000000) |
63 | 02eb84d0 | Michael S. Tsirkin | return -ENOSPC;
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64 | 02eb84d0 | Michael S. Tsirkin | |
65 | 02eb84d0 | Michael S. Tsirkin | /* Add space for MSI-X structures */
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66 | 5e520a7d | Blue Swirl | if (!bar_size) {
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67 | 5a1fc5e8 | Michael S. Tsirkin | new_size = MSIX_PAGE_SIZE; |
68 | 5a1fc5e8 | Michael S. Tsirkin | } else if (bar_size < MSIX_PAGE_SIZE) { |
69 | 5a1fc5e8 | Michael S. Tsirkin | bar_size = MSIX_PAGE_SIZE; |
70 | 5a1fc5e8 | Michael S. Tsirkin | new_size = MSIX_PAGE_SIZE * 2;
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71 | 5a1fc5e8 | Michael S. Tsirkin | } else {
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72 | 02eb84d0 | Michael S. Tsirkin | new_size = bar_size * 2;
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73 | 5a1fc5e8 | Michael S. Tsirkin | } |
74 | 02eb84d0 | Michael S. Tsirkin | |
75 | 02eb84d0 | Michael S. Tsirkin | pdev->msix_bar_size = new_size; |
76 | ca77089d | Isaku Yamahata | config_offset = pci_add_capability(pdev, PCI_CAP_ID_MSIX, |
77 | ca77089d | Isaku Yamahata | 0, MSIX_CAP_LENGTH);
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78 | 02eb84d0 | Michael S. Tsirkin | if (config_offset < 0) |
79 | 02eb84d0 | Michael S. Tsirkin | return config_offset;
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80 | 02eb84d0 | Michael S. Tsirkin | config = pdev->config + config_offset; |
81 | 02eb84d0 | Michael S. Tsirkin | |
82 | 02eb84d0 | Michael S. Tsirkin | pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1);
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83 | 02eb84d0 | Michael S. Tsirkin | /* Table on top of BAR */
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84 | 01731cfb | Jan Kiszka | pci_set_long(config + PCI_MSIX_TABLE, bar_size | bar_nr); |
85 | 02eb84d0 | Michael S. Tsirkin | /* Pending bits on top of that */
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86 | 01731cfb | Jan Kiszka | pci_set_long(config + PCI_MSIX_PBA, (bar_size + MSIX_PAGE_PENDING) | |
87 | 5a1fc5e8 | Michael S. Tsirkin | bar_nr); |
88 | 02eb84d0 | Michael S. Tsirkin | pdev->msix_cap = config_offset; |
89 | ebabb67a | Stefan Weil | /* Make flags bit writable. */
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90 | 5b5cb086 | Michael S. Tsirkin | pdev->wmask[config_offset + MSIX_CONTROL_OFFSET] |= MSIX_ENABLE_MASK | |
91 | 5b5cb086 | Michael S. Tsirkin | MSIX_MASKALL_MASK; |
92 | 50322249 | Michael S. Tsirkin | pdev->msix_function_masked = true;
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93 | 02eb84d0 | Michael S. Tsirkin | return 0; |
94 | 02eb84d0 | Michael S. Tsirkin | } |
95 | 02eb84d0 | Michael S. Tsirkin | |
96 | 95524ae8 | Avi Kivity | static uint64_t msix_mmio_read(void *opaque, target_phys_addr_t addr, |
97 | 95524ae8 | Avi Kivity | unsigned size)
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98 | 02eb84d0 | Michael S. Tsirkin | { |
99 | 02eb84d0 | Michael S. Tsirkin | PCIDevice *dev = opaque; |
100 | 76f5159d | Michael S. Tsirkin | unsigned int offset = addr & (MSIX_PAGE_SIZE - 1) & ~0x3; |
101 | 02eb84d0 | Michael S. Tsirkin | void *page = dev->msix_table_page;
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102 | 02eb84d0 | Michael S. Tsirkin | |
103 | 76f5159d | Michael S. Tsirkin | return pci_get_long(page + offset);
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104 | 02eb84d0 | Michael S. Tsirkin | } |
105 | 02eb84d0 | Michael S. Tsirkin | |
106 | 02eb84d0 | Michael S. Tsirkin | static uint8_t msix_pending_mask(int vector) |
107 | 02eb84d0 | Michael S. Tsirkin | { |
108 | 02eb84d0 | Michael S. Tsirkin | return 1 << (vector % 8); |
109 | 02eb84d0 | Michael S. Tsirkin | } |
110 | 02eb84d0 | Michael S. Tsirkin | |
111 | 02eb84d0 | Michael S. Tsirkin | static uint8_t *msix_pending_byte(PCIDevice *dev, int vector) |
112 | 02eb84d0 | Michael S. Tsirkin | { |
113 | 5a1fc5e8 | Michael S. Tsirkin | return dev->msix_table_page + MSIX_PAGE_PENDING + vector / 8; |
114 | 02eb84d0 | Michael S. Tsirkin | } |
115 | 02eb84d0 | Michael S. Tsirkin | |
116 | 02eb84d0 | Michael S. Tsirkin | static int msix_is_pending(PCIDevice *dev, int vector) |
117 | 02eb84d0 | Michael S. Tsirkin | { |
118 | 02eb84d0 | Michael S. Tsirkin | return *msix_pending_byte(dev, vector) & msix_pending_mask(vector);
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119 | 02eb84d0 | Michael S. Tsirkin | } |
120 | 02eb84d0 | Michael S. Tsirkin | |
121 | 02eb84d0 | Michael S. Tsirkin | static void msix_set_pending(PCIDevice *dev, int vector) |
122 | 02eb84d0 | Michael S. Tsirkin | { |
123 | 02eb84d0 | Michael S. Tsirkin | *msix_pending_byte(dev, vector) |= msix_pending_mask(vector); |
124 | 02eb84d0 | Michael S. Tsirkin | } |
125 | 02eb84d0 | Michael S. Tsirkin | |
126 | 02eb84d0 | Michael S. Tsirkin | static void msix_clr_pending(PCIDevice *dev, int vector) |
127 | 02eb84d0 | Michael S. Tsirkin | { |
128 | 02eb84d0 | Michael S. Tsirkin | *msix_pending_byte(dev, vector) &= ~msix_pending_mask(vector); |
129 | 02eb84d0 | Michael S. Tsirkin | } |
130 | 02eb84d0 | Michael S. Tsirkin | |
131 | ae392c41 | Michael S. Tsirkin | static bool msix_vector_masked(PCIDevice *dev, int vector, bool fmask) |
132 | 02eb84d0 | Michael S. Tsirkin | { |
133 | ae392c41 | Michael S. Tsirkin | unsigned offset = vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL;
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134 | ae392c41 | Michael S. Tsirkin | return fmask || dev->msix_table_page[offset] & PCI_MSIX_ENTRY_CTRL_MASKBIT;
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135 | 5b5cb086 | Michael S. Tsirkin | } |
136 | 5b5cb086 | Michael S. Tsirkin | |
137 | ae392c41 | Michael S. Tsirkin | static bool msix_is_masked(PCIDevice *dev, int vector) |
138 | 5b5cb086 | Michael S. Tsirkin | { |
139 | ae392c41 | Michael S. Tsirkin | return msix_vector_masked(dev, vector, dev->msix_function_masked);
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140 | ae392c41 | Michael S. Tsirkin | } |
141 | ae392c41 | Michael S. Tsirkin | |
142 | 2cdfe53c | Jan Kiszka | static void msix_fire_vector_notifier(PCIDevice *dev, |
143 | 2cdfe53c | Jan Kiszka | unsigned int vector, bool is_masked) |
144 | 2cdfe53c | Jan Kiszka | { |
145 | 2cdfe53c | Jan Kiszka | MSIMessage msg; |
146 | 2cdfe53c | Jan Kiszka | int ret;
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147 | 2cdfe53c | Jan Kiszka | |
148 | 2cdfe53c | Jan Kiszka | if (!dev->msix_vector_use_notifier) {
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149 | 2cdfe53c | Jan Kiszka | return;
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150 | 2cdfe53c | Jan Kiszka | } |
151 | 2cdfe53c | Jan Kiszka | if (is_masked) {
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152 | 2cdfe53c | Jan Kiszka | dev->msix_vector_release_notifier(dev, vector); |
153 | 2cdfe53c | Jan Kiszka | } else {
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154 | 2cdfe53c | Jan Kiszka | msg = msix_get_message(dev, vector); |
155 | 2cdfe53c | Jan Kiszka | ret = dev->msix_vector_use_notifier(dev, vector, msg); |
156 | 2cdfe53c | Jan Kiszka | assert(ret >= 0);
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157 | 2cdfe53c | Jan Kiszka | } |
158 | 2cdfe53c | Jan Kiszka | } |
159 | 2cdfe53c | Jan Kiszka | |
160 | ae392c41 | Michael S. Tsirkin | static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked) |
161 | ae392c41 | Michael S. Tsirkin | { |
162 | ae392c41 | Michael S. Tsirkin | bool is_masked = msix_is_masked(dev, vector);
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163 | 2cdfe53c | Jan Kiszka | |
164 | ae392c41 | Michael S. Tsirkin | if (is_masked == was_masked) {
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165 | ae392c41 | Michael S. Tsirkin | return;
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166 | ae392c41 | Michael S. Tsirkin | } |
167 | ae392c41 | Michael S. Tsirkin | |
168 | 2cdfe53c | Jan Kiszka | msix_fire_vector_notifier(dev, vector, is_masked); |
169 | 2cdfe53c | Jan Kiszka | |
170 | ae392c41 | Michael S. Tsirkin | if (!is_masked && msix_is_pending(dev, vector)) {
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171 | 5b5cb086 | Michael S. Tsirkin | msix_clr_pending(dev, vector); |
172 | 5b5cb086 | Michael S. Tsirkin | msix_notify(dev, vector); |
173 | 5b5cb086 | Michael S. Tsirkin | } |
174 | 5b5cb086 | Michael S. Tsirkin | } |
175 | 5b5cb086 | Michael S. Tsirkin | |
176 | 50322249 | Michael S. Tsirkin | static void msix_update_function_masked(PCIDevice *dev) |
177 | 50322249 | Michael S. Tsirkin | { |
178 | 50322249 | Michael S. Tsirkin | dev->msix_function_masked = !msix_enabled(dev) || |
179 | 50322249 | Michael S. Tsirkin | (dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & MSIX_MASKALL_MASK); |
180 | 50322249 | Michael S. Tsirkin | } |
181 | 50322249 | Michael S. Tsirkin | |
182 | 5b5cb086 | Michael S. Tsirkin | /* Handle MSI-X capability config write. */
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183 | 5b5cb086 | Michael S. Tsirkin | void msix_write_config(PCIDevice *dev, uint32_t addr,
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184 | 5b5cb086 | Michael S. Tsirkin | uint32_t val, int len)
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185 | 5b5cb086 | Michael S. Tsirkin | { |
186 | 5b5cb086 | Michael S. Tsirkin | unsigned enable_pos = dev->msix_cap + MSIX_CONTROL_OFFSET;
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187 | 5b5cb086 | Michael S. Tsirkin | int vector;
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188 | 50322249 | Michael S. Tsirkin | bool was_masked;
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189 | 5b5cb086 | Michael S. Tsirkin | |
190 | 7c9958b0 | Jan Kiszka | if (!msix_present(dev) || !range_covers_byte(addr, len, enable_pos)) {
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191 | 5b5cb086 | Michael S. Tsirkin | return;
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192 | 5b5cb086 | Michael S. Tsirkin | } |
193 | 5b5cb086 | Michael S. Tsirkin | |
194 | 50322249 | Michael S. Tsirkin | was_masked = dev->msix_function_masked; |
195 | 50322249 | Michael S. Tsirkin | msix_update_function_masked(dev); |
196 | 50322249 | Michael S. Tsirkin | |
197 | 5b5cb086 | Michael S. Tsirkin | if (!msix_enabled(dev)) {
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198 | 5b5cb086 | Michael S. Tsirkin | return;
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199 | 5b5cb086 | Michael S. Tsirkin | } |
200 | 5b5cb086 | Michael S. Tsirkin | |
201 | e407bf13 | Isaku Yamahata | pci_device_deassert_intx(dev); |
202 | 5b5cb086 | Michael S. Tsirkin | |
203 | 50322249 | Michael S. Tsirkin | if (dev->msix_function_masked == was_masked) {
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204 | 5b5cb086 | Michael S. Tsirkin | return;
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205 | 5b5cb086 | Michael S. Tsirkin | } |
206 | 5b5cb086 | Michael S. Tsirkin | |
207 | 5b5cb086 | Michael S. Tsirkin | for (vector = 0; vector < dev->msix_entries_nr; ++vector) { |
208 | ae392c41 | Michael S. Tsirkin | msix_handle_mask_update(dev, vector, |
209 | ae392c41 | Michael S. Tsirkin | msix_vector_masked(dev, vector, was_masked)); |
210 | 5b5cb086 | Michael S. Tsirkin | } |
211 | 02eb84d0 | Michael S. Tsirkin | } |
212 | 02eb84d0 | Michael S. Tsirkin | |
213 | 95524ae8 | Avi Kivity | static void msix_mmio_write(void *opaque, target_phys_addr_t addr, |
214 | 95524ae8 | Avi Kivity | uint64_t val, unsigned size)
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215 | 02eb84d0 | Michael S. Tsirkin | { |
216 | 02eb84d0 | Michael S. Tsirkin | PCIDevice *dev = opaque; |
217 | 76f5159d | Michael S. Tsirkin | unsigned int offset = addr & (MSIX_PAGE_SIZE - 1) & ~0x3; |
218 | 01731cfb | Jan Kiszka | int vector = offset / PCI_MSIX_ENTRY_SIZE;
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219 | ae392c41 | Michael S. Tsirkin | bool was_masked;
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220 | 9a93b617 | Michael S. Tsirkin | |
221 | 9a93b617 | Michael S. Tsirkin | /* MSI-X page includes a read-only PBA and a writeable Vector Control. */
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222 | 9a93b617 | Michael S. Tsirkin | if (vector >= dev->msix_entries_nr) {
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223 | 9a93b617 | Michael S. Tsirkin | return;
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224 | 9a93b617 | Michael S. Tsirkin | } |
225 | 9a93b617 | Michael S. Tsirkin | |
226 | ae392c41 | Michael S. Tsirkin | was_masked = msix_is_masked(dev, vector); |
227 | 76f5159d | Michael S. Tsirkin | pci_set_long(dev->msix_table_page + offset, val); |
228 | ae392c41 | Michael S. Tsirkin | msix_handle_mask_update(dev, vector, was_masked); |
229 | 02eb84d0 | Michael S. Tsirkin | } |
230 | 02eb84d0 | Michael S. Tsirkin | |
231 | 95524ae8 | Avi Kivity | static const MemoryRegionOps msix_mmio_ops = { |
232 | 95524ae8 | Avi Kivity | .read = msix_mmio_read, |
233 | 95524ae8 | Avi Kivity | .write = msix_mmio_write, |
234 | 95524ae8 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
235 | 95524ae8 | Avi Kivity | .valid = { |
236 | 95524ae8 | Avi Kivity | .min_access_size = 4,
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237 | 95524ae8 | Avi Kivity | .max_access_size = 4,
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238 | 95524ae8 | Avi Kivity | }, |
239 | 02eb84d0 | Michael S. Tsirkin | }; |
240 | 02eb84d0 | Michael S. Tsirkin | |
241 | 95524ae8 | Avi Kivity | static void msix_mmio_setup(PCIDevice *d, MemoryRegion *bar) |
242 | 02eb84d0 | Michael S. Tsirkin | { |
243 | 02eb84d0 | Michael S. Tsirkin | uint8_t *config = d->config + d->msix_cap; |
244 | 01731cfb | Jan Kiszka | uint32_t table = pci_get_long(config + PCI_MSIX_TABLE); |
245 | 5a1fc5e8 | Michael S. Tsirkin | uint32_t offset = table & ~(MSIX_PAGE_SIZE - 1);
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246 | 02eb84d0 | Michael S. Tsirkin | /* TODO: for assigned devices, we'll want to make it possible to map
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247 | 02eb84d0 | Michael S. Tsirkin | * pending bits separately in case they are in a separate bar. */
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248 | 02eb84d0 | Michael S. Tsirkin | |
249 | 95524ae8 | Avi Kivity | memory_region_add_subregion(bar, offset, &d->msix_mmio); |
250 | 02eb84d0 | Michael S. Tsirkin | } |
251 | 02eb84d0 | Michael S. Tsirkin | |
252 | ae1be0bb | Michael S. Tsirkin | static void msix_mask_all(struct PCIDevice *dev, unsigned nentries) |
253 | ae1be0bb | Michael S. Tsirkin | { |
254 | ae1be0bb | Michael S. Tsirkin | int vector;
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255 | 5b5f1330 | Jan Kiszka | |
256 | ae1be0bb | Michael S. Tsirkin | for (vector = 0; vector < nentries; ++vector) { |
257 | 01731cfb | Jan Kiszka | unsigned offset =
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258 | 01731cfb | Jan Kiszka | vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; |
259 | 5b5f1330 | Jan Kiszka | bool was_masked = msix_is_masked(dev, vector);
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260 | 5b5f1330 | Jan Kiszka | |
261 | 01731cfb | Jan Kiszka | dev->msix_table_page[offset] |= PCI_MSIX_ENTRY_CTRL_MASKBIT; |
262 | 5b5f1330 | Jan Kiszka | msix_handle_mask_update(dev, vector, was_masked); |
263 | ae1be0bb | Michael S. Tsirkin | } |
264 | ae1be0bb | Michael S. Tsirkin | } |
265 | ae1be0bb | Michael S. Tsirkin | |
266 | 02eb84d0 | Michael S. Tsirkin | /* Initialize the MSI-X structures. Note: if MSI-X is supported, BAR size is
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267 | 02eb84d0 | Michael S. Tsirkin | * modified, it should be retrieved with msix_bar_size. */
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268 | 02eb84d0 | Michael S. Tsirkin | int msix_init(struct PCIDevice *dev, unsigned short nentries, |
269 | 95524ae8 | Avi Kivity | MemoryRegion *bar, |
270 | 5a1fc5e8 | Michael S. Tsirkin | unsigned bar_nr, unsigned bar_size) |
271 | 02eb84d0 | Michael S. Tsirkin | { |
272 | 02eb84d0 | Michael S. Tsirkin | int ret;
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273 | 60ba3cc2 | Jan Kiszka | |
274 | 02eb84d0 | Michael S. Tsirkin | /* Nothing to do if MSI is not supported by interrupt controller */
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275 | 60ba3cc2 | Jan Kiszka | if (!msi_supported) {
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276 | 02eb84d0 | Michael S. Tsirkin | return -ENOTSUP;
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277 | 60ba3cc2 | Jan Kiszka | } |
278 | 02eb84d0 | Michael S. Tsirkin | if (nentries > MSIX_MAX_ENTRIES)
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279 | 02eb84d0 | Michael S. Tsirkin | return -EINVAL;
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280 | 02eb84d0 | Michael S. Tsirkin | |
281 | 7267c094 | Anthony Liguori | dev->msix_entry_used = g_malloc0(MSIX_MAX_ENTRIES * |
282 | 02eb84d0 | Michael S. Tsirkin | sizeof *dev->msix_entry_used);
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283 | 02eb84d0 | Michael S. Tsirkin | |
284 | 7267c094 | Anthony Liguori | dev->msix_table_page = g_malloc0(MSIX_PAGE_SIZE); |
285 | ae1be0bb | Michael S. Tsirkin | msix_mask_all(dev, nentries); |
286 | 02eb84d0 | Michael S. Tsirkin | |
287 | 95524ae8 | Avi Kivity | memory_region_init_io(&dev->msix_mmio, &msix_mmio_ops, dev, |
288 | 95524ae8 | Avi Kivity | "msix", MSIX_PAGE_SIZE);
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289 | 02eb84d0 | Michael S. Tsirkin | |
290 | 02eb84d0 | Michael S. Tsirkin | dev->msix_entries_nr = nentries; |
291 | 02eb84d0 | Michael S. Tsirkin | ret = msix_add_config(dev, nentries, bar_nr, bar_size); |
292 | 02eb84d0 | Michael S. Tsirkin | if (ret)
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293 | 02eb84d0 | Michael S. Tsirkin | goto err_config;
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294 | 02eb84d0 | Michael S. Tsirkin | |
295 | 02eb84d0 | Michael S. Tsirkin | dev->cap_present |= QEMU_PCI_CAP_MSIX; |
296 | 95524ae8 | Avi Kivity | msix_mmio_setup(dev, bar); |
297 | 02eb84d0 | Michael S. Tsirkin | return 0; |
298 | 02eb84d0 | Michael S. Tsirkin | |
299 | 02eb84d0 | Michael S. Tsirkin | err_config:
|
300 | 3174ecd1 | Michael S. Tsirkin | dev->msix_entries_nr = 0;
|
301 | 95524ae8 | Avi Kivity | memory_region_destroy(&dev->msix_mmio); |
302 | 7267c094 | Anthony Liguori | g_free(dev->msix_table_page); |
303 | 02eb84d0 | Michael S. Tsirkin | dev->msix_table_page = NULL;
|
304 | 7267c094 | Anthony Liguori | g_free(dev->msix_entry_used); |
305 | 02eb84d0 | Michael S. Tsirkin | dev->msix_entry_used = NULL;
|
306 | 02eb84d0 | Michael S. Tsirkin | return ret;
|
307 | 02eb84d0 | Michael S. Tsirkin | } |
308 | 02eb84d0 | Michael S. Tsirkin | |
309 | 98304c84 | Michael S. Tsirkin | static void msix_free_irq_entries(PCIDevice *dev) |
310 | 98304c84 | Michael S. Tsirkin | { |
311 | 98304c84 | Michael S. Tsirkin | int vector;
|
312 | 98304c84 | Michael S. Tsirkin | |
313 | 98304c84 | Michael S. Tsirkin | for (vector = 0; vector < dev->msix_entries_nr; ++vector) { |
314 | 98304c84 | Michael S. Tsirkin | dev->msix_entry_used[vector] = 0;
|
315 | 98304c84 | Michael S. Tsirkin | msix_clr_pending(dev, vector); |
316 | 98304c84 | Michael S. Tsirkin | } |
317 | 98304c84 | Michael S. Tsirkin | } |
318 | 98304c84 | Michael S. Tsirkin | |
319 | 02eb84d0 | Michael S. Tsirkin | /* Clean up resources for the device. */
|
320 | 95524ae8 | Avi Kivity | int msix_uninit(PCIDevice *dev, MemoryRegion *bar)
|
321 | 02eb84d0 | Michael S. Tsirkin | { |
322 | 02eb84d0 | Michael S. Tsirkin | if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
|
323 | 02eb84d0 | Michael S. Tsirkin | return 0; |
324 | 02eb84d0 | Michael S. Tsirkin | pci_del_capability(dev, PCI_CAP_ID_MSIX, MSIX_CAP_LENGTH); |
325 | 02eb84d0 | Michael S. Tsirkin | dev->msix_cap = 0;
|
326 | 02eb84d0 | Michael S. Tsirkin | msix_free_irq_entries(dev); |
327 | 02eb84d0 | Michael S. Tsirkin | dev->msix_entries_nr = 0;
|
328 | 95524ae8 | Avi Kivity | memory_region_del_subregion(bar, &dev->msix_mmio); |
329 | 95524ae8 | Avi Kivity | memory_region_destroy(&dev->msix_mmio); |
330 | 7267c094 | Anthony Liguori | g_free(dev->msix_table_page); |
331 | 02eb84d0 | Michael S. Tsirkin | dev->msix_table_page = NULL;
|
332 | 7267c094 | Anthony Liguori | g_free(dev->msix_entry_used); |
333 | 02eb84d0 | Michael S. Tsirkin | dev->msix_entry_used = NULL;
|
334 | 02eb84d0 | Michael S. Tsirkin | dev->cap_present &= ~QEMU_PCI_CAP_MSIX; |
335 | 02eb84d0 | Michael S. Tsirkin | return 0; |
336 | 02eb84d0 | Michael S. Tsirkin | } |
337 | 02eb84d0 | Michael S. Tsirkin | |
338 | 02eb84d0 | Michael S. Tsirkin | void msix_save(PCIDevice *dev, QEMUFile *f)
|
339 | 02eb84d0 | Michael S. Tsirkin | { |
340 | 9a3e12c8 | Michael S. Tsirkin | unsigned n = dev->msix_entries_nr;
|
341 | 9a3e12c8 | Michael S. Tsirkin | |
342 | 72755a70 | Michael S. Tsirkin | if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) {
|
343 | 9a3e12c8 | Michael S. Tsirkin | return;
|
344 | 72755a70 | Michael S. Tsirkin | } |
345 | 9a3e12c8 | Michael S. Tsirkin | |
346 | 01731cfb | Jan Kiszka | qemu_put_buffer(f, dev->msix_table_page, n * PCI_MSIX_ENTRY_SIZE); |
347 | 5a1fc5e8 | Michael S. Tsirkin | qemu_put_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8); |
348 | 02eb84d0 | Michael S. Tsirkin | } |
349 | 02eb84d0 | Michael S. Tsirkin | |
350 | 02eb84d0 | Michael S. Tsirkin | /* Should be called after restoring the config space. */
|
351 | 02eb84d0 | Michael S. Tsirkin | void msix_load(PCIDevice *dev, QEMUFile *f)
|
352 | 02eb84d0 | Michael S. Tsirkin | { |
353 | 02eb84d0 | Michael S. Tsirkin | unsigned n = dev->msix_entries_nr;
|
354 | 2cdfe53c | Jan Kiszka | unsigned int vector; |
355 | 02eb84d0 | Michael S. Tsirkin | |
356 | 98846d73 | Blue Swirl | if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) {
|
357 | 02eb84d0 | Michael S. Tsirkin | return;
|
358 | 98846d73 | Blue Swirl | } |
359 | 02eb84d0 | Michael S. Tsirkin | |
360 | 4bfd1712 | Michael S. Tsirkin | msix_free_irq_entries(dev); |
361 | 01731cfb | Jan Kiszka | qemu_get_buffer(f, dev->msix_table_page, n * PCI_MSIX_ENTRY_SIZE); |
362 | 5a1fc5e8 | Michael S. Tsirkin | qemu_get_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8); |
363 | 50322249 | Michael S. Tsirkin | msix_update_function_masked(dev); |
364 | 2cdfe53c | Jan Kiszka | |
365 | 2cdfe53c | Jan Kiszka | for (vector = 0; vector < n; vector++) { |
366 | 2cdfe53c | Jan Kiszka | msix_handle_mask_update(dev, vector, true);
|
367 | 2cdfe53c | Jan Kiszka | } |
368 | 02eb84d0 | Michael S. Tsirkin | } |
369 | 02eb84d0 | Michael S. Tsirkin | |
370 | 02eb84d0 | Michael S. Tsirkin | /* Does device support MSI-X? */
|
371 | 02eb84d0 | Michael S. Tsirkin | int msix_present(PCIDevice *dev)
|
372 | 02eb84d0 | Michael S. Tsirkin | { |
373 | 02eb84d0 | Michael S. Tsirkin | return dev->cap_present & QEMU_PCI_CAP_MSIX;
|
374 | 02eb84d0 | Michael S. Tsirkin | } |
375 | 02eb84d0 | Michael S. Tsirkin | |
376 | 02eb84d0 | Michael S. Tsirkin | /* Is MSI-X enabled? */
|
377 | 02eb84d0 | Michael S. Tsirkin | int msix_enabled(PCIDevice *dev)
|
378 | 02eb84d0 | Michael S. Tsirkin | { |
379 | 02eb84d0 | Michael S. Tsirkin | return (dev->cap_present & QEMU_PCI_CAP_MSIX) &&
|
380 | 2760952b | Michael S. Tsirkin | (dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] & |
381 | 02eb84d0 | Michael S. Tsirkin | MSIX_ENABLE_MASK); |
382 | 02eb84d0 | Michael S. Tsirkin | } |
383 | 02eb84d0 | Michael S. Tsirkin | |
384 | 02eb84d0 | Michael S. Tsirkin | /* Size of bar where MSI-X table resides, or 0 if MSI-X not supported. */
|
385 | 02eb84d0 | Michael S. Tsirkin | uint32_t msix_bar_size(PCIDevice *dev) |
386 | 02eb84d0 | Michael S. Tsirkin | { |
387 | 02eb84d0 | Michael S. Tsirkin | return (dev->cap_present & QEMU_PCI_CAP_MSIX) ?
|
388 | 02eb84d0 | Michael S. Tsirkin | dev->msix_bar_size : 0;
|
389 | 02eb84d0 | Michael S. Tsirkin | } |
390 | 02eb84d0 | Michael S. Tsirkin | |
391 | 02eb84d0 | Michael S. Tsirkin | /* Send an MSI-X message */
|
392 | 02eb84d0 | Michael S. Tsirkin | void msix_notify(PCIDevice *dev, unsigned vector) |
393 | 02eb84d0 | Michael S. Tsirkin | { |
394 | bc4caf49 | Jan Kiszka | MSIMessage msg; |
395 | 02eb84d0 | Michael S. Tsirkin | |
396 | 02eb84d0 | Michael S. Tsirkin | if (vector >= dev->msix_entries_nr || !dev->msix_entry_used[vector])
|
397 | 02eb84d0 | Michael S. Tsirkin | return;
|
398 | 02eb84d0 | Michael S. Tsirkin | if (msix_is_masked(dev, vector)) {
|
399 | 02eb84d0 | Michael S. Tsirkin | msix_set_pending(dev, vector); |
400 | 02eb84d0 | Michael S. Tsirkin | return;
|
401 | 02eb84d0 | Michael S. Tsirkin | } |
402 | 02eb84d0 | Michael S. Tsirkin | |
403 | bc4caf49 | Jan Kiszka | msg = msix_get_message(dev, vector); |
404 | bc4caf49 | Jan Kiszka | |
405 | bc4caf49 | Jan Kiszka | stl_le_phys(msg.address, msg.data); |
406 | 02eb84d0 | Michael S. Tsirkin | } |
407 | 02eb84d0 | Michael S. Tsirkin | |
408 | 02eb84d0 | Michael S. Tsirkin | void msix_reset(PCIDevice *dev)
|
409 | 02eb84d0 | Michael S. Tsirkin | { |
410 | 02eb84d0 | Michael S. Tsirkin | if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
|
411 | 02eb84d0 | Michael S. Tsirkin | return;
|
412 | 02eb84d0 | Michael S. Tsirkin | msix_free_irq_entries(dev); |
413 | 2760952b | Michael S. Tsirkin | dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &= |
414 | 2760952b | Michael S. Tsirkin | ~dev->wmask[dev->msix_cap + MSIX_CONTROL_OFFSET]; |
415 | 5a1fc5e8 | Michael S. Tsirkin | memset(dev->msix_table_page, 0, MSIX_PAGE_SIZE);
|
416 | ae1be0bb | Michael S. Tsirkin | msix_mask_all(dev, dev->msix_entries_nr); |
417 | 02eb84d0 | Michael S. Tsirkin | } |
418 | 02eb84d0 | Michael S. Tsirkin | |
419 | 02eb84d0 | Michael S. Tsirkin | /* PCI spec suggests that devices make it possible for software to configure
|
420 | 02eb84d0 | Michael S. Tsirkin | * less vectors than supported by the device, but does not specify a standard
|
421 | 02eb84d0 | Michael S. Tsirkin | * mechanism for devices to do so.
|
422 | 02eb84d0 | Michael S. Tsirkin | *
|
423 | 02eb84d0 | Michael S. Tsirkin | * We support this by asking devices to declare vectors software is going to
|
424 | 02eb84d0 | Michael S. Tsirkin | * actually use, and checking this on the notification path. Devices that
|
425 | 02eb84d0 | Michael S. Tsirkin | * don't want to follow the spec suggestion can declare all vectors as used. */
|
426 | 02eb84d0 | Michael S. Tsirkin | |
427 | 02eb84d0 | Michael S. Tsirkin | /* Mark vector as used. */
|
428 | 02eb84d0 | Michael S. Tsirkin | int msix_vector_use(PCIDevice *dev, unsigned vector) |
429 | 02eb84d0 | Michael S. Tsirkin | { |
430 | 02eb84d0 | Michael S. Tsirkin | if (vector >= dev->msix_entries_nr)
|
431 | 02eb84d0 | Michael S. Tsirkin | return -EINVAL;
|
432 | 02eb84d0 | Michael S. Tsirkin | dev->msix_entry_used[vector]++; |
433 | 02eb84d0 | Michael S. Tsirkin | return 0; |
434 | 02eb84d0 | Michael S. Tsirkin | } |
435 | 02eb84d0 | Michael S. Tsirkin | |
436 | 02eb84d0 | Michael S. Tsirkin | /* Mark vector as unused. */
|
437 | 02eb84d0 | Michael S. Tsirkin | void msix_vector_unuse(PCIDevice *dev, unsigned vector) |
438 | 02eb84d0 | Michael S. Tsirkin | { |
439 | 98304c84 | Michael S. Tsirkin | if (vector >= dev->msix_entries_nr || !dev->msix_entry_used[vector]) {
|
440 | 98304c84 | Michael S. Tsirkin | return;
|
441 | 98304c84 | Michael S. Tsirkin | } |
442 | 98304c84 | Michael S. Tsirkin | if (--dev->msix_entry_used[vector]) {
|
443 | 98304c84 | Michael S. Tsirkin | return;
|
444 | 98304c84 | Michael S. Tsirkin | } |
445 | 98304c84 | Michael S. Tsirkin | msix_clr_pending(dev, vector); |
446 | 02eb84d0 | Michael S. Tsirkin | } |
447 | b5f28bca | Michael S. Tsirkin | |
448 | b5f28bca | Michael S. Tsirkin | void msix_unuse_all_vectors(PCIDevice *dev)
|
449 | b5f28bca | Michael S. Tsirkin | { |
450 | b5f28bca | Michael S. Tsirkin | if (!(dev->cap_present & QEMU_PCI_CAP_MSIX))
|
451 | b5f28bca | Michael S. Tsirkin | return;
|
452 | b5f28bca | Michael S. Tsirkin | msix_free_irq_entries(dev); |
453 | b5f28bca | Michael S. Tsirkin | } |
454 | 2cdfe53c | Jan Kiszka | |
455 | cb697aaa | Jan Kiszka | unsigned int msix_nr_vectors_allocated(const PCIDevice *dev) |
456 | cb697aaa | Jan Kiszka | { |
457 | cb697aaa | Jan Kiszka | return dev->msix_entries_nr;
|
458 | cb697aaa | Jan Kiszka | } |
459 | cb697aaa | Jan Kiszka | |
460 | 2cdfe53c | Jan Kiszka | static int msix_set_notifier_for_vector(PCIDevice *dev, unsigned int vector) |
461 | 2cdfe53c | Jan Kiszka | { |
462 | 2cdfe53c | Jan Kiszka | MSIMessage msg; |
463 | 2cdfe53c | Jan Kiszka | |
464 | 2cdfe53c | Jan Kiszka | if (msix_is_masked(dev, vector)) {
|
465 | 2cdfe53c | Jan Kiszka | return 0; |
466 | 2cdfe53c | Jan Kiszka | } |
467 | 2cdfe53c | Jan Kiszka | msg = msix_get_message(dev, vector); |
468 | 2cdfe53c | Jan Kiszka | return dev->msix_vector_use_notifier(dev, vector, msg);
|
469 | 2cdfe53c | Jan Kiszka | } |
470 | 2cdfe53c | Jan Kiszka | |
471 | 2cdfe53c | Jan Kiszka | static void msix_unset_notifier_for_vector(PCIDevice *dev, unsigned int vector) |
472 | 2cdfe53c | Jan Kiszka | { |
473 | 2cdfe53c | Jan Kiszka | if (msix_is_masked(dev, vector)) {
|
474 | 2cdfe53c | Jan Kiszka | return;
|
475 | 2cdfe53c | Jan Kiszka | } |
476 | 2cdfe53c | Jan Kiszka | dev->msix_vector_release_notifier(dev, vector); |
477 | 2cdfe53c | Jan Kiszka | } |
478 | 2cdfe53c | Jan Kiszka | |
479 | 2cdfe53c | Jan Kiszka | int msix_set_vector_notifiers(PCIDevice *dev,
|
480 | 2cdfe53c | Jan Kiszka | MSIVectorUseNotifier use_notifier, |
481 | 2cdfe53c | Jan Kiszka | MSIVectorReleaseNotifier release_notifier) |
482 | 2cdfe53c | Jan Kiszka | { |
483 | 2cdfe53c | Jan Kiszka | int vector, ret;
|
484 | 2cdfe53c | Jan Kiszka | |
485 | 2cdfe53c | Jan Kiszka | assert(use_notifier && release_notifier); |
486 | 2cdfe53c | Jan Kiszka | |
487 | 2cdfe53c | Jan Kiszka | dev->msix_vector_use_notifier = use_notifier; |
488 | 2cdfe53c | Jan Kiszka | dev->msix_vector_release_notifier = release_notifier; |
489 | 2cdfe53c | Jan Kiszka | |
490 | 2cdfe53c | Jan Kiszka | if ((dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &
|
491 | 2cdfe53c | Jan Kiszka | (MSIX_ENABLE_MASK | MSIX_MASKALL_MASK)) == MSIX_ENABLE_MASK) { |
492 | 2cdfe53c | Jan Kiszka | for (vector = 0; vector < dev->msix_entries_nr; vector++) { |
493 | 2cdfe53c | Jan Kiszka | ret = msix_set_notifier_for_vector(dev, vector); |
494 | 2cdfe53c | Jan Kiszka | if (ret < 0) { |
495 | 2cdfe53c | Jan Kiszka | goto undo;
|
496 | 2cdfe53c | Jan Kiszka | } |
497 | 2cdfe53c | Jan Kiszka | } |
498 | 2cdfe53c | Jan Kiszka | } |
499 | 2cdfe53c | Jan Kiszka | return 0; |
500 | 2cdfe53c | Jan Kiszka | |
501 | 2cdfe53c | Jan Kiszka | undo:
|
502 | 2cdfe53c | Jan Kiszka | while (--vector >= 0) { |
503 | 2cdfe53c | Jan Kiszka | msix_unset_notifier_for_vector(dev, vector); |
504 | 2cdfe53c | Jan Kiszka | } |
505 | 2cdfe53c | Jan Kiszka | dev->msix_vector_use_notifier = NULL;
|
506 | 2cdfe53c | Jan Kiszka | dev->msix_vector_release_notifier = NULL;
|
507 | 2cdfe53c | Jan Kiszka | return ret;
|
508 | 2cdfe53c | Jan Kiszka | } |
509 | 2cdfe53c | Jan Kiszka | |
510 | 2cdfe53c | Jan Kiszka | void msix_unset_vector_notifiers(PCIDevice *dev)
|
511 | 2cdfe53c | Jan Kiszka | { |
512 | 2cdfe53c | Jan Kiszka | int vector;
|
513 | 2cdfe53c | Jan Kiszka | |
514 | 2cdfe53c | Jan Kiszka | assert(dev->msix_vector_use_notifier && |
515 | 2cdfe53c | Jan Kiszka | dev->msix_vector_release_notifier); |
516 | 2cdfe53c | Jan Kiszka | |
517 | 2cdfe53c | Jan Kiszka | if ((dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &
|
518 | 2cdfe53c | Jan Kiszka | (MSIX_ENABLE_MASK | MSIX_MASKALL_MASK)) == MSIX_ENABLE_MASK) { |
519 | 2cdfe53c | Jan Kiszka | for (vector = 0; vector < dev->msix_entries_nr; vector++) { |
520 | 2cdfe53c | Jan Kiszka | msix_unset_notifier_for_vector(dev, vector); |
521 | 2cdfe53c | Jan Kiszka | } |
522 | 2cdfe53c | Jan Kiszka | } |
523 | 2cdfe53c | Jan Kiszka | dev->msix_vector_use_notifier = NULL;
|
524 | 2cdfe53c | Jan Kiszka | dev->msix_vector_release_notifier = NULL;
|
525 | 2cdfe53c | Jan Kiszka | } |