tests: Some unit tests for vmstate.c
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Juan Quintela <quintela@redhat.com>
bitmap: use long as index
Move index and size fields from int to long. We need that formigration. long is 64 bits on sane architectures, and 32bits shouldbe enough on all the 32bits architectures.
Signed-off-by: Juan Quintela <quintela@redhat.com>Reviewed-by: Eric Blake <eblake@redhat.com>...
memory: cpu_physical_memory_set_dirty_flags() result is never used
So return void.
Signed-off-by: Juan Quintela <quintela@redhat.com>Reviewed-by: Orit Wasserman <owasserm@redhat.com>Reviewed-by: Eric Blake <eblake@redhat.com>
memory: cpu_physical_memory_set_dirty_range() return void
exec: use accessor function to know if memory is dirty
memory: create function to set a single dirty bit
exec: create function to get a single dirty bit
Signed-off-by: Juan Quintela <quintela@redhat.com>Reviewed-by: Eric Blake <eblake@redhat.com>Reviewed-by: Orit Wasserman <owasserm@redhat.com>
savevm.c: Coding style fixes
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Orit Wasserman <owasserm@redhat.com>Signed-off-by: Juan Quintela <quintela@redhat.com>
savevm.c: Coding style fix
vmstate: Move VMState code to vmstate.c
This will allow unit tests to be written for VMState code withoutpulling dependencies from the savevm code.
qemu-file: Move QEMUFile code to qemu-file.c
savevm: Small comment about why timer QEMUFile/VMState code is in savevm.c
avoid a bogus COMPLETED->CANCELLED transition
Avoid a bogus COMPLETED->CANCELLED transition.There is a period of time from the timing of setting COMPLETED state to that of migration thread exits, so during which it's problematic in COMPLETED->CANCELLED transition....
introduce MIG_STATE_CANCELLING state
Introduce MIG_STATE_CANCELLING state to avoid starting a new migration task while the previous one still exist.
Signed-off-by: Zeng Junliang <zengjunliang@huawei.com>Signed-off-by: Zhang Haoyu <haoyu.zhang@huawei.com>...
migration: Fix rate limit
The migration thread appears to want to allow writeout to occur at fullspeed rather than being rate limited during completion of state saving,but sets the limit to INT_MAX when xfer_limit is INT64_MAX. This causesproblems if there's more than 2GB of state left to save at this point. It...
qemu-file: Make a few functions non-static
The QEMUFile code will be moved to qemu-file.c. This will require makingthe following functions non-static because they are used by the savevm.ccode:
migration: Move QEMU_VM_* defines to migration/migration.h
The VMState code will be moved to vmstate.c and it uses some of theQEMU_VM_* constants, so move it to a header.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Orit Wasserman <owasserm@redhat.com>...
savevm: Convert all tabs to spaces
Merge remote-tracking branch 'pmaydell/tags/pull-cocoa-20140112' into staging
cocoa queue: * pass command key to guest when VM has mousegrab * add .qcow2 to extension list for image load dialog * fix bugs in code for starting QEMU via image load dialog...
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140112' into staging
target-arm queue: * build fix for bigendian hosts
ui/cocoa: Add ".qcow2" to extension list for image load dialog
Add ".qcow2" to the list of file extensions which are acceptedby the initial disk image load dialog which is displayed if theuser runs QEMU without any command line arguments.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
ui/cocoa: Fix code for starting QEMU via image file load dialog
Fix a number of bugs in the code for starting QEMU via the imagefile load dialog: * use the actual argv0 rather than "qemu": this avoids failures to find BIOS image files caused by not looking in the correct directory...
ui/cocoa: Redraw at correct size when switching surface
If the surface switch involved a resize, we were doing the redrawat the old size rather than the new, because the update ofscreen.width and screen.height was being done after the setFramemethod calls which triggered a redraw. Normally this isn't very...
ui/cocoa: Draw black rectangle if we have no data yet
If our redraw method is called before we have any data from the guest,then draw a black rectangle rather than leaving the window empty.This mostly only matters when the guest machine has no framebuffer...
ui/cocoa: Remove stray tabs
The ui/cocoa.m file has just three lines with hardcoded tabs; fix them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Stefan Weil <sw@weilnetz.de>Message-id: 1387886052-27067-1-git-send-email-peter.maydell@linaro.org
MAINTAINERS: add myself as cocoa UI co-maintainer
Add myself to the maintainers list for the cocoa UI; statusremains "Odd Fixes".
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Acked-by: Andreas Färber <andreas.faerber@web.de>Message-id: 1387207075-10280-1-git-send-email-peter.maydell@linaro.org
ui/cocoa: Send warning message to stderr, not stdout
Bring a warning message into line with the others in this file bysending it to stderr, not stdout.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Message-id: 1386543546-31919-4-git-send-email-peter.maydell@linaro.org
ui/cocoa: Pass command key through to guest when VM has mousegrab
The guest might want to be able to use the command key for its wonpurposes (as command if it is MacOS X, or for the Windows key ifit is a PC guest, for instance). In line with other UI frontends,...
ui/cocoa: Correct typos in comments and variable names
Fix various non-user-visible typos in comments and variable names.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Stefan Weil <sw@weilnetz.de>Message-id: 1386543546-31919-3-git-send-email-peter.maydell@linaro.org
arm: fix compile on bigendian host
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Merge remote-tracking branch 'bonzini/scsi-next' into staging
Message-id: 1387720926-11421-1-git-send-email-pbonzini@redhat.com...
Merge remote-tracking branch 'stefanha/block' into staging
Merge remote-tracking branch 'mst/tags/for_anthony' into staging
acpi,pci,pc,fedora,virtio fixes and enhancements
This includes some Preparatory patches for cpu hotplug for q25 and memoryhotplug by Igor, tests and memory mapping changeby Laszlo and pci reset cleanup by Paolo....
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings / X86CPU
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140107' into staging
target-arm queue: * further A64 decoder patches, including enabling the aarch64-linux-user target; this includes full floating point support. Neon is not yet supported....
Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging
Message-id: 1389364137-23287-1-git-send-email-riku.voipio@linaro.org...
linux-user: Remove regs parameter of load_elf_binary and load_flt_binary
The regs parameter is not used anywhere, so remove it.
Signed-off-by: Will Newton <will.newton@linaro.org>Reviewed-by: Erik de Castro Lopo <erikd@mega-nerd.com>Reviewed-by: Andreas Färber <afaerber@suse.de>...
linux-user: Support the accept4 socketcall
Cc: Riku Voipio <riku.voipio@iki.fi>Signed-off-by: André Hentschel <nerv@dawncrow.de>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Erik de Castro Lopo <erikd@mega-nerd.com>Reviewed-by: Laurent Vivier <laurent@vivier.eu>...
Merge remote-tracking branch 'otubo/seccomp' into staging
Message-id: 1387565447-24241-1-git-send-email-otubo@linux.vnet.ibm.comSigned-off-by: Anthony Liguori <aliguori@amazon.com>
Merge remote-tracking branch 'rth/ldst-i386-2' into staging
Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging
QOM infrastructure fixes and device conversions
Merge remote-tracking branch 'mjt/trivial-patches' into staging
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140108' into staging
target-arm: A64: Add floating-point<->fixed-point instructions
This patch adds emulation for the instruction group labeled"Floating-point <-> fixed-point conversions" in the ARM ARM.
Namely this includes the instructions SCVTF, UCVTF, FCVTZS, FCVTZU(scalar, fixed-point)....
target-arm: A64: Add floating-point<->integer conversion instructions
Add support for the AArch64 floating-point <-> integer conversioninstructions to disas_fpintconv. In the process we can rearrangeand simplify the detection of unallocated encodings a little....
target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
This patch adds support for those instructions in the "Floating-pointdata-processing (1 source)" group which are simple 32-bit-to-32-bitor 64-bit-to-64-bit operations (ie everything except FCVT between...
target-arm: A64: Add support for FCVT between half, single and double
Add support for FCVT between half, single and double precision.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm: fix build with gcc 4.8.2
commit 5ce4f35781028ce1aee3341e6002f925fdc7aaf3 "target-arm: A64: add set_pc cpu method"
introduces an array aarch64_cpus which is zerosize if this code is built without CONFIG_USER_ONLY.In particular an attempt to iterate over this array produces a warning...
arm_gic: Rename GIC_X_TRIGGER to GIC_X_EDGE_TRIGGER
TRIGGER can really mean mean anything (e.g. was it triggered, is itlevel-triggered, is it edge-triggered, etc.). Rename to EDGE_TRIGGER tomake the code comprehensible without looking up the data structure....
hw: arm_gic: Introduce gic_set_priority function
To make the code slightly cleaner to look at and make the save/restorecode easier to understand, introduce this function to set the priority ofinterrupts.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
softfloat: Fix exception flag handling for float32_to_float16()
Our float32 to float16 conversion routine was generating the correctnumerical answers, but not always setting the right set of exceptionflags. Fix this, mostly by rearranging the code to more closely...
softfloat: Add float to 16bit integer conversions.
ARMv8 requires support for converting 32 and 64bit floating pointvalues to signed and unsigned 16bit integers.
Signed-off-by: Will Newton <will.newton@linaro.org>[PMM: updated not to incorrectly set Inexact for Invalid inputs]...
softfloat: Add 16 bit integer to float conversions
Add the float to 16 bit integer conversion routines. These can betrivially implemented in terms of the int32_to_float* routines, butproviding them makes our API more symmetrical and can simplify callers....
softfloat: Make the int-to-float functions take exact-width types
Currently the int-to-float functions take types which are specifiedas "at least X bits wide", rather than "exactly X bits wide". This isconfusing and unhelpful since it means that the callers have to include...
softfloat: Fix float64_to_uint64
The comment preceding the float64_to_uint64 routine suggests thatthe implementation is broken. And this is, indeed, the case.
This patch properly implements the conversion of a 64-bit floatingpoint number to an unsigned, 64 bit integer....
softfloat: Only raise Invalid when conversions to int are out of range
We implement a number of float-to-integer conversions using conversionto an integer type with a wider range and then a check against thenarrower range we are actually converting to. If we find the result to...
softfloat: Fix factor 2 error for scalbn on denormal inputs
If the input to float*_scalbn() is denormal then it representsa number 0.[mantissabits] * 2^(1-exponentbias) (and the actualexponent field is all zeroes). This means that when we convertit to our unpacked encoding the unpacked exponent must be one...
softfloat: Add float32_to_uint64()
This patch adds the float32_to_uint64() routine, which converts a32-bit floating point number to an unsigned 64 bit number.
This contribution can be licensed under either the softfloat-2a or -2blicense.
Signed-off-by: Tom Musta <tommusta@gmail.com>...
softfloat: Fix float64_to_uint64_round_to_zero
The float64_to_uint64_round_to_zero routine is incorrect.
For example, the following test pattern:
46697351FF4AEC29 / 0x1.97351ff4aec29p+103
currently produces 8000000000000000 instead of FFFFFFFFFFFFFFFF....
softfloat: Fix float64_to_uint32
The float64_to_uint32 has several flaws:
- for numbers between 2**32 and 2**64, the inexact exception flag may get incorrectly set. In this case, only the invalid flag should be set.
test pattern: 425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38...
softfloat: Fix float64_to_uint32_round_to_zero
The float64_to_uint32_round_to_zero routine is incorrect.
425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38
will erroneously set the inexact flag.
This patch re-implements the routine to use the float64_to_uint64_round_to_zero...
softfloat: Provide complete set of accessors for fp state
Tidy up the get/set accessors for the fp state to add missing onesand make them all inline in softfloat.h rather than some inline andsome not.
softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
In preparation for adding conversions between float16 and float64,factor out code currently done inline in the float16<=>float32conversion functions into functions RoundAndPackFloat16 and...
softfloat: Add float16 <=> float64 conversion functions
Add the conversion functions float16_to_float64() andfloat64_to_float16(), which will be needed for the ARMA64 instruction set.
softfloat: Refactor code handling various rounding modes
Refactor the code in various functions which calculates roundingincrements given the current rounding mode, so that instead of aset of nested if statements we have a simple switch statement.This will give us a clean place to add the case for the new...
softfloat: Add support for ties-away rounding
IEEE754-2008 specifies a new rounding mode:
"roundTiesToAway: the floating-point number nearest to the infinitelyprecise result shall be delivered; if the two nearest floating-pointnumbers bracketing an unrepresentable infinitely precise result are...
target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
Make the VFP_CONV_FIX helpers a little more flexible inpreparation for the A64 uses. This requires two changes: * use the correct softfloat conversion function based on itype rather than always the int32 one; this is possible now that...
target-arm: Rename A32 VFP conversion helpers
The VFP conversion helpers for A32 round to zero as this is the onlyrounding mode supported. Rename these helpers to make it clear thatthey round to zero and are not suitable for use in the AArch64 code.
Signed-off-by: Will Newton <will.newton@linaro.org>...
target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
The VFP fixed point conversion helpers first call float_scalbn andthen convert the result to an integer. This scalbn operation mayset floating point exception flags for: * overflow & inexact (if it overflows to infinity)...
target-arm: A64: Add extra VFP fixed point conversion helpers
Define the full set of floating point to fixed point conversionhelpers required to support AArch64.
Signed-off-by: Will Newton <will.newton@linaro.org>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
default-configs: Add config for aarch64-linux-user
Add a config for aarch64-linux-user, thereby enabling it asa valid target.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Alexander Graf <agraf@suse.de>Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm: A64: Add support for dumping AArch64 VFP register state
When dumping the current CPU state, we can also get a requestto dump the FPU state along with the CPU's integer state.
Add support to dump the VFP state when that flag is set, so thatwe can properly debug code that modifies floating point registers....
target-arm: A64: Fix vector register access on bigendian hosts
The A64 128 bit vector registers are stored as a pair ofuint64_t values in the register array. This means that ifwe're directly loading or storing a value of size less than64 bits we must adjust the offset appropriately to account...
target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum
Use the VFP_BINOP macro to provide helpers for min, max, minnumand maxnum, rather than hand-rolling them. (The float64 maxversion is not used by A32 but will be needed for A64.)
target-arm: A64: Add "Floating-point data-processing (2 source)" insns
This patch adds emulation for the "Floating-point data-processing (2 source)" group of instructions.
Signed-off-by: Alexander Graf <agraf@suse.de>[WN: Commit message tweak, merge single and double precision patches. Rebase...
target-arm: A64: Add "Floating-point data-processing (3 source)" insns
This patch adds emulation for the "Floating-point data-processing (3 source)" group of instructions.
Signed-off-by: Alexander Graf <agraf@suse.de>[WN: Commit message tweak, merged single and double precision patches....
target-arm: A64: Add fmov (scalar, immediate) instruction
This patch adds emulation for the fmov instruction working on scalarswith an immediate payload.
Signed-off-by: Alexander Graf <agraf@suse.de>[WN: Commit message tweak, rebase and use new infrastructure.]...
target-arm: A64: Add support for floating point compare
Add decoding support for C3.6.22 Floating-point compare.
Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm: A64: Add support for floating point conditional compare
This adds decoding support for C3.6.23 FP Conditional Compare.
target-arm: A64: Add support for floating point cond select
This adds decoding support for C3.6.24 FP conditional select.
target-arm: Give the FPSCR rounding modes names
When setting rounding modes we currently just hardcode the numeric valuesfor rounding modes in a big switch statement.
With AArch64 support coming, we will need to refer to these rounding modesat different places throughout the code though, so let's better give them...
char/cadence_uart: Mark struct fields as public/private
As per current QOM conventions.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Message-id: a1e31bd62e9709ffb9b3efc6c120f83f30b7a660.1388626249.git.peter.crosthwaite@xilinx.comSigned-off-by: Peter Maydell <peter.maydell@linaro.org>
char/cadence_uart: Add missing uart_update_state
This should be rechecked on bus write accesses as such accesses maychange the underlying state that generates the interrupt. Particularrelevant for when the guest touches the interrupt status or mask.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>...
char/cadence_uart: Fix reset.
Don't reset the uart as an init step. Register the reset function as aproper reset fn instead.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Message-id: d82cd2e65e5a6f8b6deeecb6cced61f0bf3f8c89.1388626249.git.peter.crosthwaite@xilinx.com...
char/cadence_uart: s/r_fifo/rx_fifo
Rename this field to match the many other uses of "rx". Xilinxdocmentation (UG585) also refers to this as "RxFIFO".
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Message-id: 7386d7cee0ea175f7e53ed5ff045265528d34e32.1388626249.git.peter.crosthwaite@xilinx.com...
char/cadence_uart: Simplify status generation
The status register bits are always pure functions of other devicestate. Move the generation of these bits to the update_status()function to simplify. Makes developing much easier as theres now no needto recheck status bits on all the changes to rx/tx fifo state....
char/cadence_uart: Define Missing SR/ISR fields
Some (interrupt) status register bits relating to the TxFIFO path werenot defined. Define them. This prepares support for proper Tx data pathflow control.
char/cadence_uart: Remove TX timer & add TX FIFO state
This tx timer implementation is flawed. Despite the controllerattempting to time the guest visable assertion of the TX-empty statusbit (and corresponding interrupt) the controller is still transmitting...
char/cadence_uart: Fix can_receive logic
The can_receive logic was only taking into account the RxFIFOoccupancy. RxFIFO population is only used for the echo and normal modeshowever. Improve the logic to correctly return the true number ofreceivable characters based on the current mode:...
char/cadence_uart: Use the TX fifo for transmission
Populate the TxFIFO with the Tx data before sending. Preparessupport for proper Tx flow control implementation.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Message-id: bdf7f8af2ef02839bea18665701bc2612f7baa6f.1388626249.git.peter.crosthwaite@xilinx.com...
char/cadence_uart: Delete redundant rx rst logic
uart_rx_reset() called immediately above already does this. Remove.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Message-id: 05e30826496cf2579084ed801ac0b2c0d0a3071f.1388626249.git.peter.crosthwaite@xilinx.com...
char/cadence_uart: Implement Tx flow control
If the UART back-end blocks, buffer in the Tx FIFO to try again later.This stops the IO-thread busy waiting on char back-ends (which causesall sorts of performance problems).
target-arm: use c13_context field for CONTEXTIDR
Use c13_context field instead of c13_fcse for CONTEXTIDR registerdefinition.
Signed-off-by: Sergey Fedorov <s.fedorov@samsung.com>Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-arm: remove raw_read|write duplication
There is an inline duplication of the raw_read and raw_write functionbodies. Fix by just calling raw_read/raw_write instead.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
arm/xilinx_zynq: Always instantiate the GEMs
Don't conditionalise GEM instantiation on networking attachments. Thedevice should always be present even if not attached to a network.
This allows for probing of the device by expectant guests (such asOS's). This is needed because sysbus (or AXI in Xilinx's real hw case)...
target-arm: Widen exclusive-access support struct fields to 64 bits
In preparation for adding support for A64 load/store exclusive instructions,widen the fields in the CPU state struct that deal with address and data valuesfor exclusives from 32 to 64 bits. Although in practice AArch64 and AArch32...
target-arm: A64: support for ld/st/cl exclusive
This implement exclusive loads/stores for aarch64 along the lines ofarm32 and ppc implementations. The exclusive load remembers the addressand loaded value. The exclusive store throws an an exception which uses...
linux-user: AArch64: define TARGET_CLONE_BACKWARDS
The AArch64 linux-user support was written before but merged aftercommit 4ce6243dc621 which cleaned up the handling of the clone()syscall argument order, so we failed to notice that AArch64 also needsTARGET_CLONE_BACKWARDS to be defined. Add this define so that clone...
linux-user: AArch64: Use correct values for FPSR/FPCR in sigcontext
Use the helpers provided for getting the correct FPSR and FPCRvalues for the signal context.
.travis.yml: Add aarch64-* targets
Now the AArch64 targets are in mainline we can include them in ourTravis test matrix.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>