Rework ASI instructions (Aurelien Jarno)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
Improve keyboard handling
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3204 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid compilation warnings on 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3203 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid compilation warnings on 64 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3202 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC definitions, from POWER 2.04 specifications and misc sources.Check that at least instructions set and SPRs are correct for PowerPC 401, 403, 405 and 440 cores.Implement PowerPC 401 MMU model (real-mode only).Improve INSNs and SPRs dump to ease parse with standard shell tools....
Rework PowerPC 440 TLB management (thanks to Hollis Blanchard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3200 c046a42c-6fe2-441c-8c8c-71466251a162
Make CPU hflags be a masked version of the PowerPC MSR.As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162
Extend TB flags to 64 bits (Alexander Graf).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162
Change ldl_phys to cpu_physical_memory_read, fix pte address
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3197 c046a42c-6fe2-441c-8c8c-71466251a162
Fix tadd op generation with GCC 4.x
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3196 c046a42c-6fe2-441c-8c8c-71466251a162
View all revisions | View revisions
Also available in: Atom