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root / hw / intc @ 81cce07e

Name Size
Makefile.objs 1.1 kB
allwinner-a10-pic.c 5.8 kB
apic.c 23.5 kB
apic_common.c 11 kB
arm_gic.c 25.4 kB
arm_gic_common.c 5.8 kB
arm_gic_kvm.c 5.5 kB
armv7m_nvic.c 18.2 kB
etraxfs_pic.c 5.3 kB
exynos4210_combiner.c 15.2 kB
exynos4210_gic.c 14.4 kB
gic_internal.h 3.5 kB
grlib_irqmp.c 9.4 kB
heathrow_pic.c 5.8 kB
i8259.c 13.5 kB
i8259_common.c 5.2 kB
imx_avic.c 11.8 kB
ioapic.c 7.5 kB
ioapic_common.c 3.6 kB
lm32_pic.c 4.5 kB
omap_intc.c 18.1 kB
openpic.c 45.4 kB
openpic_kvm.c 7.5 kB
pl190.c 7.9 kB
puv3_intc.c 3.3 kB
realview_gic.c 2.5 kB
sh_intc.c 13.3 kB
slavio_intctl.c 13.9 kB
xics.c 23.5 kB
xics_kvm.c 14.3 kB
xilinx_intc.c 5.2 kB

Latest revisions

# Date Author Comment
105a0601 02/21/2014 05:04 pm Peter Maydell

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140220' into staging

target-arm queue: * Fix a bug causing an assertion in the NVIC on ARMv7M models * More A64 Neon instructions * Refactor cpreg API to separate out access check functions, as...
87316902 02/20/2014 12:35 pm Peter Maydell

hw/intc/arm_gic: Fix NVIC assertion failure

Commit 40d225009ef accidentally changed the behaviour of
gic_acknowledge_irq() for the NVIC. The NVIC doesn't have SGIs,
so this meant we hit an assertion:
gic_acknowledge_irq: Assertion `s->sgi_pending[irq][cpu] != 0' failed....
c7bcc85d 02/14/2014 10:12 pm Paolo Bonzini

qdev: Remove hex8/32/64 property types

Replace them with uint8/32/64.

Reviewed-by: Igor Mammedov <>
Reviewed-by: Eric Blake <>
Signed-off-by: Paolo Bonzini <>
Signed-off-by: Andreas Färber <>
2a221651 02/11/2014 02:57 pm Edgar E. Iglesias

exec: Make cpu_physical_memory_write_rom input an AS

Reviewed-by: Peter Maydell <>
Signed-off-by: Edgar E. Iglesias <>
aa7d461a 02/08/2014 04:50 pm Christoffer Dall

arm_gic: Support setting/getting binary point reg

Add a binary_point field to the gic emulation structure and support
setting/getting this register now when we have it. We don't actually
support interrupt grouping yet, oh well.

Reviewed-by: Peter Maydell <>...
a9d477c4 02/08/2014 04:50 pm Christoffer Dall

arm_gic: Add GICC_APRn state to the GICState

The GICC_APRn registers are not currently supported by the ARM GIC v2.0
emulation. This patch adds the missing state.

Note that we also change the number of APRs to use a define GIC_NR_APRS
based on the maximum number of preemption levels. This patch also adds...
8d999995 02/08/2014 04:47 pm Christoffer Dall

arm_gic: Fix GIC pending behavior

The existing implementation of the pending behavior in gic_set_irq,
gic_complete_irq, and the distributor pending set/clear registers does
not follow the semantics of the GICv2.0 specs, but may implement the
11MPCore support. Therefore, maintain the existing semantics for...
40d22500 02/08/2014 04:47 pm Christoffer Dall

arm_gic: Keep track of SGI sources

Right now the arm gic emulation doesn't keep track of the source of an
SGI (which apparently Linux guests don't use, or they're fine with
assuming CPU 0 always).

Add the necessary matrix on the GICState structure and maintain the data...
41ab7b55 01/31/2014 04:47 pm Christoffer Dall

arm_gic: Introduce define for GIC_NR_SGIS

Instead of hardcoding 16 various places in the code, use a define to
make it more clear what is going on.

Signed-off-by: Christoffer Dall <>
Reviewed-by: Peter Maydell <>...
5b0adce1 01/31/2014 04:47 pm Christoffer Dall

arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes

Fix two bugs that would allow changing the state of SGIs through the
ICPENDR and ISPENDRs.

Signed-off-by: Christoffer Dall <>
Reviewed-by: Peter Maydell <>...

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