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Makefile.objs 1.3 kB

Latest revisions

# Date Author Comment
059ca2bf 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Mark struct fields as public/private

As per current QOM conventions.

Signed-off-by: Peter Crosthwaite <>
Message-id:
Signed-off-by: Peter Maydell <>

589bfb68 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Add missing uart_update_state

This should be rechecked on bus write accesses as such accesses may
change the underlying state that generates the interrupt. Particular
relevant for when the guest touches the interrupt status or mask.

Signed-off-by: Peter Crosthwaite <>...

823dd487 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Fix reset.

Don't reset the uart as an init step. Register the reset function as a
proper reset fn instead.

Signed-off-by: Peter Crosthwaite <>
Message-id: ...

5fe269b1 12/20/2013 02:58 am Paul Mackerras

spapr: limit numa memory regions by ram size

This makes sure that all NUMA memory blocks reside within RAM or
have zero length.

Reviewed-by: Thomas Huth <>
Signed-off-by: Alexey Kardashevskiy <>
Signed-off-by: Alexander Graf <>

c4177479 12/20/2013 02:58 am Alexey Kardashevskiy

spapr: make sure RMA is in first mode of first memory node

The SPAPR specification says that the RMA starts at the LPAR's logical
address 0 and is the first logical memory block reported in
the LPAR’s device tree.

So SLOF only maps the first block and that block needs to span...

5a4348d1 12/20/2013 02:58 am Peter Crosthwaite

device_tree: s/qemu_devtree/qemu_fdt globally

The qemu_devtree API is a wrapper around the fdt_ set of APIs.
Rename accordingly.

Signed-off-by: Peter Crosthwaite <>
[agraf: also convert hw/arm/virt.c]
Signed-off-by: Alexander Graf <>

582b55a9 12/20/2013 02:58 am Alexander Graf

roms: Flush icache when writing roms to guest memory

We use the rom infrastructure to write firmware and/or initial kernel
blobs into guest address space. So we're basically emulating the cache
off phase on very early system bootup.

That phase is usually responsible for clearing the instruction cache for...

3978b863 12/20/2013 02:58 am Paolo Bonzini

spapr: tie spapr-nvram to -pflash

spapr-nvram's drive property is currently connected to a non-existent
"-machine nvram=<drivename>" option. Instead, tie it to -pflash like
other non-volatile RAM devices. This provides the following possibilities
for adding a backend for the sPAPR non-volatile RAM:...

8a0e1104 12/20/2013 02:58 am Alexander Graf

PPC: Use default pci bus name for grackle and heathrow

There's no good reason to call our bus "pci" rather than let the default
bus name take over ("pci.0").

The big downside to calling it different from anyone else is that tools
that pass -device get confused. They are looking for a bus "pci.0" rather...

3ada6b11 12/20/2013 02:57 am Alexey Kardashevskiy

spapr-rtas: add ibm, (get|set)-system-parameter

This adds very basic handlers for ibm,get-system-parameter and
ibm,set-system-parameter RTAS calls.

The only parameter handled at the moment is
"platform-processor-diagnostics-run-mode" which is always disabled and...

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