root / hw / spapr.c @ 8294a64d
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 8d90ad90 | David Gibson | #include "net.h" |
31 | 6e270446 | Ben Herrenschmidt | #include "blockdev.h" |
32 | e97c3636 | David Gibson | #include "cpus.h" |
33 | e97c3636 | David Gibson | #include "kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
43 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
44 | 9fdf0c29 | David Gibson | |
45 | f61b4bed | Alexander Graf | #include "kvm.h" |
46 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
47 | 3384f95c | David Gibson | #include "pci.h" |
48 | f61b4bed | Alexander Graf | |
49 | 890c2b77 | Avi Kivity | #include "exec-memory.h" |
50 | 890c2b77 | Avi Kivity | |
51 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
52 | 9fdf0c29 | David Gibson | |
53 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF memory layout:
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54 | 4d8d5467 | Benjamin Herrenschmidt | *
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55 | 4d8d5467 | Benjamin Herrenschmidt | * SLOF raw image loaded at 0, copies its romfs right below the flat
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56 | 4d8d5467 | Benjamin Herrenschmidt | * device-tree, then position SLOF itself 31M below that
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57 | 4d8d5467 | Benjamin Herrenschmidt | *
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58 | 4d8d5467 | Benjamin Herrenschmidt | * So we set FW_OVERHEAD to 40MB which should account for all of that
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59 | 4d8d5467 | Benjamin Herrenschmidt | * and more
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60 | 4d8d5467 | Benjamin Herrenschmidt | *
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61 | 4d8d5467 | Benjamin Herrenschmidt | * We load our kernel at 4M, leaving space for SLOF initial image
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62 | 4d8d5467 | Benjamin Herrenschmidt | */
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63 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
64 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
65 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
66 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
67 | 4d8d5467 | Benjamin Herrenschmidt | #define FW_OVERHEAD 0x2800000 |
68 | 4d8d5467 | Benjamin Herrenschmidt | #define KERNEL_LOAD_ADDR FW_MAX_SIZE
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69 | a9f8ad8f | David Gibson | |
70 | 4d8d5467 | Benjamin Herrenschmidt | #define MIN_RMA_SLOF 128UL |
71 | 9fdf0c29 | David Gibson | |
72 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
73 | 9fdf0c29 | David Gibson | |
74 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
75 | 4d8d5467 | Benjamin Herrenschmidt | #define XICS_IRQS 1024 |
76 | 9fdf0c29 | David Gibson | |
77 | 3384f95c | David Gibson | #define SPAPR_PCI_BUID 0x800000020000001ULL |
78 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_ADDR (0x10000000000ULL + 0xA0000000) |
79 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_SIZE 0x20000000 |
80 | 3384f95c | David Gibson | #define SPAPR_PCI_IO_WIN_ADDR (0x10000000000ULL + 0x80000000) |
81 | 3384f95c | David Gibson | |
82 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
83 | 0c103f8e | David Gibson | |
84 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
85 | 9fdf0c29 | David Gibson | |
86 | d07fee7e | David Gibson | qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num, |
87 | d07fee7e | David Gibson | enum xics_irq_type type)
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88 | e6c866d4 | David Gibson | { |
89 | e6c866d4 | David Gibson | uint32_t irq; |
90 | e6c866d4 | David Gibson | qemu_irq qirq; |
91 | e6c866d4 | David Gibson | |
92 | e6c866d4 | David Gibson | if (hint) {
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93 | e6c866d4 | David Gibson | irq = hint; |
94 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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95 | e6c866d4 | David Gibson | } else {
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96 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
97 | e6c866d4 | David Gibson | } |
98 | e6c866d4 | David Gibson | |
99 | d07fee7e | David Gibson | qirq = xics_assign_irq(spapr->icp, irq, type); |
100 | e6c866d4 | David Gibson | if (!qirq) {
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101 | e6c866d4 | David Gibson | return NULL; |
102 | e6c866d4 | David Gibson | } |
103 | e6c866d4 | David Gibson | |
104 | e6c866d4 | David Gibson | if (irq_num) {
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105 | e6c866d4 | David Gibson | *irq_num = irq; |
106 | e6c866d4 | David Gibson | } |
107 | e6c866d4 | David Gibson | |
108 | e6c866d4 | David Gibson | return qirq;
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109 | e6c866d4 | David Gibson | } |
110 | e6c866d4 | David Gibson | |
111 | 6e806cc3 | Bharata B Rao | static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr) |
112 | 6e806cc3 | Bharata B Rao | { |
113 | 6e806cc3 | Bharata B Rao | int ret = 0, offset; |
114 | e2684c0b | Andreas Färber | CPUPPCState *env; |
115 | 6e806cc3 | Bharata B Rao | char cpu_model[32]; |
116 | 6e806cc3 | Bharata B Rao | int smt = kvmppc_smt_threads();
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117 | 6e806cc3 | Bharata B Rao | |
118 | 6e806cc3 | Bharata B Rao | assert(spapr->cpu_model); |
119 | 6e806cc3 | Bharata B Rao | |
120 | 6e806cc3 | Bharata B Rao | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
121 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x5),
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122 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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123 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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124 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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125 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->numa_node), |
126 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->cpu_index)}; |
127 | 6e806cc3 | Bharata B Rao | |
128 | 6e806cc3 | Bharata B Rao | if ((env->cpu_index % smt) != 0) { |
129 | 6e806cc3 | Bharata B Rao | continue;
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130 | 6e806cc3 | Bharata B Rao | } |
131 | 6e806cc3 | Bharata B Rao | |
132 | 6e806cc3 | Bharata B Rao | snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, |
133 | 6e806cc3 | Bharata B Rao | env->cpu_index); |
134 | 6e806cc3 | Bharata B Rao | |
135 | 6e806cc3 | Bharata B Rao | offset = fdt_path_offset(fdt, cpu_model); |
136 | 6e806cc3 | Bharata B Rao | if (offset < 0) { |
137 | 6e806cc3 | Bharata B Rao | return offset;
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138 | 6e806cc3 | Bharata B Rao | } |
139 | 6e806cc3 | Bharata B Rao | |
140 | 6e806cc3 | Bharata B Rao | ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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141 | 6e806cc3 | Bharata B Rao | sizeof(associativity));
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142 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
143 | 6e806cc3 | Bharata B Rao | return ret;
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144 | 6e806cc3 | Bharata B Rao | } |
145 | 6e806cc3 | Bharata B Rao | } |
146 | 6e806cc3 | Bharata B Rao | return ret;
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147 | 6e806cc3 | Bharata B Rao | } |
148 | 6e806cc3 | Bharata B Rao | |
149 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
150 | 354ac20a | David Gibson | target_phys_addr_t rma_size, |
151 | a3467baa | David Gibson | target_phys_addr_t initrd_base, |
152 | a3467baa | David Gibson | target_phys_addr_t initrd_size, |
153 | 4d8d5467 | Benjamin Herrenschmidt | target_phys_addr_t kernel_size, |
154 | a3467baa | David Gibson | const char *boot_device, |
155 | a3467baa | David Gibson | const char *kernel_cmdline, |
156 | a3467baa | David Gibson | long hash_shift)
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157 | 9fdf0c29 | David Gibson | { |
158 | 9fdf0c29 | David Gibson | void *fdt;
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159 | e2684c0b | Andreas Färber | CPUPPCState *env; |
160 | 6e806cc3 | Bharata B Rao | uint64_t mem_reg_property[2];
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161 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
162 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
163 | f43e3525 | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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164 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
165 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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166 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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167 | 9fdf0c29 | David Gibson | int i;
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168 | 9fdf0c29 | David Gibson | char *modelname;
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169 | e97c3636 | David Gibson | int smt = kvmppc_smt_threads();
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170 | 6e806cc3 | Bharata B Rao | unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; |
171 | 6e806cc3 | Bharata B Rao | uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; |
172 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0), |
173 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0), cpu_to_be32(0x0), |
174 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0)};
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175 | 6e806cc3 | Bharata B Rao | char mem_name[32]; |
176 | 6e806cc3 | Bharata B Rao | target_phys_addr_t node0_size, mem_start; |
177 | 9fdf0c29 | David Gibson | |
178 | 9fdf0c29 | David Gibson | #define _FDT(exp) \
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179 | 9fdf0c29 | David Gibson | do { \
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180 | 9fdf0c29 | David Gibson | int ret = (exp); \
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181 | 9fdf0c29 | David Gibson | if (ret < 0) { \ |
182 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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183 | 9fdf0c29 | David Gibson | #exp, fdt_strerror(ret)); \
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184 | 9fdf0c29 | David Gibson | exit(1); \
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185 | 9fdf0c29 | David Gibson | } \ |
186 | 9fdf0c29 | David Gibson | } while (0) |
187 | 9fdf0c29 | David Gibson | |
188 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
189 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
190 | 9fdf0c29 | David Gibson | |
191 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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192 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size))); |
193 | 4d8d5467 | Benjamin Herrenschmidt | } |
194 | 4d8d5467 | Benjamin Herrenschmidt | if (initrd_size) {
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195 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size))); |
196 | 4d8d5467 | Benjamin Herrenschmidt | } |
197 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
198 | 9fdf0c29 | David Gibson | |
199 | 9fdf0c29 | David Gibson | /* Root node */
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200 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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201 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
202 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
203 | 9fdf0c29 | David Gibson | |
204 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
205 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
206 | 9fdf0c29 | David Gibson | |
207 | 9fdf0c29 | David Gibson | /* /chosen */
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208 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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209 | 9fdf0c29 | David Gibson | |
210 | 6e806cc3 | Bharata B Rao | /* Set Form1_affinity */
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211 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5)))); |
212 | 6e806cc3 | Bharata B Rao | |
213 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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214 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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215 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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216 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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217 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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218 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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219 | 4d8d5467 | Benjamin Herrenschmidt | uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
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220 | 4d8d5467 | Benjamin Herrenschmidt | cpu_to_be64(kernel_size) }; |
221 | 9fdf0c29 | David Gibson | |
222 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop)))); |
223 | 4d8d5467 | Benjamin Herrenschmidt | } |
224 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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225 | 3384f95c | David Gibson | |
226 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
227 | 9fdf0c29 | David Gibson | |
228 | 354ac20a | David Gibson | /* memory node(s) */
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229 | 6e806cc3 | Bharata B Rao | node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size; |
230 | 6e806cc3 | Bharata B Rao | if (rma_size > node0_size) {
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231 | 6e806cc3 | Bharata B Rao | rma_size = node0_size; |
232 | 6e806cc3 | Bharata B Rao | } |
233 | 9fdf0c29 | David Gibson | |
234 | 6e806cc3 | Bharata B Rao | /* RMA */
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235 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = 0; |
236 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(rma_size);
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237 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, "memory@0")));
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238 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
239 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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240 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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241 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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242 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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243 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
244 | 9fdf0c29 | David Gibson | |
245 | 6e806cc3 | Bharata B Rao | /* RAM: Node 0 */
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246 | 6e806cc3 | Bharata B Rao | if (node0_size > rma_size) {
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247 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(rma_size);
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248 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node0_size - rma_size);
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249 | 354ac20a | David Gibson | |
250 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, rma_size);
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251 | 354ac20a | David Gibson | _FDT((fdt_begin_node(fdt, mem_name))); |
252 | 354ac20a | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
253 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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254 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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255 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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256 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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257 | 354ac20a | David Gibson | _FDT((fdt_end_node(fdt))); |
258 | 354ac20a | David Gibson | } |
259 | 354ac20a | David Gibson | |
260 | 6e806cc3 | Bharata B Rao | /* RAM: Node 1 and beyond */
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261 | 6e806cc3 | Bharata B Rao | mem_start = node0_size; |
262 | 6e806cc3 | Bharata B Rao | for (i = 1; i < nb_numa_nodes; i++) { |
263 | 6e806cc3 | Bharata B Rao | mem_reg_property[0] = cpu_to_be64(mem_start);
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264 | 6e806cc3 | Bharata B Rao | mem_reg_property[1] = cpu_to_be64(node_mem[i]);
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265 | 6e806cc3 | Bharata B Rao | associativity[3] = associativity[4] = cpu_to_be32(i); |
266 | 6e806cc3 | Bharata B Rao | sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
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267 | 6e806cc3 | Bharata B Rao | _FDT((fdt_begin_node(fdt, mem_name))); |
268 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
269 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "reg", mem_reg_property,
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270 | 6e806cc3 | Bharata B Rao | sizeof(mem_reg_property))));
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271 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity", associativity,
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272 | 6e806cc3 | Bharata B Rao | sizeof(associativity))));
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273 | 6e806cc3 | Bharata B Rao | _FDT((fdt_end_node(fdt))); |
274 | 6e806cc3 | Bharata B Rao | mem_start += node_mem[i]; |
275 | 6e806cc3 | Bharata B Rao | } |
276 | 6e806cc3 | Bharata B Rao | |
277 | 9fdf0c29 | David Gibson | /* cpus */
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278 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
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279 | 9fdf0c29 | David Gibson | |
280 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
281 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
282 | 9fdf0c29 | David Gibson | |
283 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
284 | 9fdf0c29 | David Gibson | |
285 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
286 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
287 | 9fdf0c29 | David Gibson | } |
288 | 9fdf0c29 | David Gibson | |
289 | 6e806cc3 | Bharata B Rao | /* This is needed during FDT finalization */
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290 | 6e806cc3 | Bharata B Rao | spapr->cpu_model = g_strdup(modelname); |
291 | 6e806cc3 | Bharata B Rao | |
292 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
293 | c7a5c0c9 | David Gibson | int index = env->cpu_index;
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294 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
295 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
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296 | 9fdf0c29 | David Gibson | char *nodename;
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297 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
298 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
299 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
300 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
301 | 9fdf0c29 | David Gibson | |
302 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
303 | e97c3636 | David Gibson | continue;
|
304 | e97c3636 | David Gibson | } |
305 | e97c3636 | David Gibson | |
306 | c7a5c0c9 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, index) < 0) { |
307 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
|
308 | 9fdf0c29 | David Gibson | exit(1);
|
309 | 9fdf0c29 | David Gibson | } |
310 | 9fdf0c29 | David Gibson | |
311 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
312 | 9fdf0c29 | David Gibson | |
313 | 9fdf0c29 | David Gibson | free(nodename); |
314 | 9fdf0c29 | David Gibson | |
315 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
|
316 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
317 | 9fdf0c29 | David Gibson | |
318 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
319 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
|
320 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
321 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
|
322 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
323 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
324 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
325 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
326 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,pft-size",
|
327 | f43e3525 | David Gibson | pft_size_prop, sizeof(pft_size_prop))));
|
328 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
329 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
330 | e97c3636 | David Gibson | |
331 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
|
332 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
333 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
334 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
|
335 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
|
336 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
337 | e97c3636 | David Gibson | } |
338 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
339 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
|
340 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
341 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
|
342 | 9fdf0c29 | David Gibson | |
343 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
344 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
345 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
|
346 | 9fdf0c29 | David Gibson | } |
347 | 9fdf0c29 | David Gibson | |
348 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
|
349 | 6659394f | David Gibson | * 0 / no property == no vector extensions
|
350 | 6659394f | David Gibson | * 1 == VMX / Altivec available
|
351 | 6659394f | David Gibson | * 2 == VSX available */
|
352 | a7342588 | David Gibson | if (env->insns_flags & PPC_ALTIVEC) {
|
353 | a7342588 | David Gibson | uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; |
354 | a7342588 | David Gibson | |
355 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
356 | 6659394f | David Gibson | } |
357 | 6659394f | David Gibson | |
358 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
|
359 | 6659394f | David Gibson | * 0 / no property == no DFP
|
360 | 6659394f | David Gibson | * 1 == DFP available */
|
361 | a7342588 | David Gibson | if (env->insns_flags2 & PPC2_DFP) {
|
362 | a7342588 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); |
363 | 6659394f | David Gibson | } |
364 | 6659394f | David Gibson | |
365 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
366 | 9fdf0c29 | David Gibson | } |
367 | 9fdf0c29 | David Gibson | |
368 | 7267c094 | Anthony Liguori | g_free(modelname); |
369 | 9fdf0c29 | David Gibson | |
370 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
371 | 9fdf0c29 | David Gibson | |
372 | f43e3525 | David Gibson | /* RTAS */
|
373 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
|
374 | f43e3525 | David Gibson | |
375 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
376 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
|
377 | f43e3525 | David Gibson | |
378 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
379 | 6e806cc3 | Bharata B Rao | refpoints, sizeof(refpoints))));
|
380 | 6e806cc3 | Bharata B Rao | |
381 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
382 | f43e3525 | David Gibson | |
383 | b5cec4c5 | David Gibson | /* interrupt controller */
|
384 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
385 | b5cec4c5 | David Gibson | |
386 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
|
387 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
|
388 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
389 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
390 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
391 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
392 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
|
393 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
394 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
395 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
396 | b5cec4c5 | David Gibson | |
397 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
398 | b5cec4c5 | David Gibson | |
399 | 4040ab72 | David Gibson | /* vdevice */
|
400 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
|
401 | 4040ab72 | David Gibson | |
402 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
403 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
404 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
405 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
406 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
407 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
408 | 4040ab72 | David Gibson | |
409 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
410 | 4040ab72 | David Gibson | |
411 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
|
412 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
413 | 9fdf0c29 | David Gibson | |
414 | a3467baa | David Gibson | return fdt;
|
415 | a3467baa | David Gibson | } |
416 | a3467baa | David Gibson | |
417 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
418 | a3467baa | David Gibson | target_phys_addr_t fdt_addr, |
419 | a3467baa | David Gibson | target_phys_addr_t rtas_addr, |
420 | a3467baa | David Gibson | target_phys_addr_t rtas_size) |
421 | a3467baa | David Gibson | { |
422 | a3467baa | David Gibson | int ret;
|
423 | a3467baa | David Gibson | void *fdt;
|
424 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
425 | a3467baa | David Gibson | |
426 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
427 | a3467baa | David Gibson | |
428 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
429 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
430 | 4040ab72 | David Gibson | |
431 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
432 | 4040ab72 | David Gibson | if (ret < 0) { |
433 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
434 | 4040ab72 | David Gibson | exit(1);
|
435 | 4040ab72 | David Gibson | } |
436 | 4040ab72 | David Gibson | |
437 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
438 | 3384f95c | David Gibson | ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt); |
439 | 3384f95c | David Gibson | } |
440 | 3384f95c | David Gibson | |
441 | 3384f95c | David Gibson | if (ret < 0) { |
442 | 3384f95c | David Gibson | fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
443 | 3384f95c | David Gibson | exit(1);
|
444 | 3384f95c | David Gibson | } |
445 | 3384f95c | David Gibson | |
446 | 39ac8455 | David Gibson | /* RTAS */
|
447 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
448 | 39ac8455 | David Gibson | if (ret < 0) { |
449 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
450 | 39ac8455 | David Gibson | } |
451 | 39ac8455 | David Gibson | |
452 | 6e806cc3 | Bharata B Rao | /* Advertise NUMA via ibm,associativity */
|
453 | 6e806cc3 | Bharata B Rao | if (nb_numa_nodes > 1) { |
454 | 6e806cc3 | Bharata B Rao | ret = spapr_set_associativity(fdt, spapr); |
455 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
456 | 6e806cc3 | Bharata B Rao | fprintf(stderr, "Couldn't set up NUMA device tree properties\n");
|
457 | 6e806cc3 | Bharata B Rao | } |
458 | 6e806cc3 | Bharata B Rao | } |
459 | 6e806cc3 | Bharata B Rao | |
460 | 68f3a94c | David Gibson | spapr_populate_chosen_stdout(fdt, spapr->vio_bus); |
461 | 68f3a94c | David Gibson | |
462 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
463 | 4040ab72 | David Gibson | |
464 | 4d8d5467 | Benjamin Herrenschmidt | if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
465 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
466 | 4d8d5467 | Benjamin Herrenschmidt | fdt_totalsize(fdt), FDT_MAX_SIZE); |
467 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
468 | 4d8d5467 | Benjamin Herrenschmidt | } |
469 | 4d8d5467 | Benjamin Herrenschmidt | |
470 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
471 | 9fdf0c29 | David Gibson | |
472 | 7267c094 | Anthony Liguori | g_free(fdt); |
473 | 9fdf0c29 | David Gibson | } |
474 | 9fdf0c29 | David Gibson | |
475 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
476 | 9fdf0c29 | David Gibson | { |
477 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
478 | 9fdf0c29 | David Gibson | } |
479 | 9fdf0c29 | David Gibson | |
480 | e2684c0b | Andreas Färber | static void emulate_spapr_hypercall(CPUPPCState *env) |
481 | 9fdf0c29 | David Gibson | { |
482 | 9fdf0c29 | David Gibson | env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
483 | 9fdf0c29 | David Gibson | } |
484 | 9fdf0c29 | David Gibson | |
485 | a3467baa | David Gibson | static void spapr_reset(void *opaque) |
486 | a3467baa | David Gibson | { |
487 | a3467baa | David Gibson | sPAPREnvironment *spapr = (sPAPREnvironment *)opaque; |
488 | a3467baa | David Gibson | |
489 | a3467baa | David Gibson | fprintf(stderr, "sPAPR reset\n");
|
490 | a3467baa | David Gibson | |
491 | a3467baa | David Gibson | /* flush out the hash table */
|
492 | a3467baa | David Gibson | memset(spapr->htab, 0, spapr->htab_size);
|
493 | a3467baa | David Gibson | |
494 | a3467baa | David Gibson | /* Load the fdt */
|
495 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
496 | a3467baa | David Gibson | spapr->rtas_size); |
497 | a3467baa | David Gibson | |
498 | a3467baa | David Gibson | /* Set up the entry state */
|
499 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
500 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
501 | a3467baa | David Gibson | first_cpu->halted = 0;
|
502 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
503 | a3467baa | David Gibson | |
504 | a3467baa | David Gibson | } |
505 | a3467baa | David Gibson | |
506 | 1bba0dc9 | Andreas Färber | static void spapr_cpu_reset(void *opaque) |
507 | 1bba0dc9 | Andreas Färber | { |
508 | e2684c0b | Andreas Färber | CPUPPCState *env = opaque; |
509 | 1bba0dc9 | Andreas Färber | |
510 | 1bba0dc9 | Andreas Färber | cpu_state_reset(env); |
511 | 1bba0dc9 | Andreas Färber | } |
512 | 1bba0dc9 | Andreas Färber | |
513 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
514 | 9fdf0c29 | David Gibson | static void ppc_spapr_init(ram_addr_t ram_size, |
515 | 9fdf0c29 | David Gibson | const char *boot_device, |
516 | 9fdf0c29 | David Gibson | const char *kernel_filename, |
517 | 9fdf0c29 | David Gibson | const char *kernel_cmdline, |
518 | 9fdf0c29 | David Gibson | const char *initrd_filename, |
519 | 9fdf0c29 | David Gibson | const char *cpu_model) |
520 | 9fdf0c29 | David Gibson | { |
521 | e2684c0b | Andreas Färber | CPUPPCState *env; |
522 | 9fdf0c29 | David Gibson | int i;
|
523 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
524 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
525 | 354ac20a | David Gibson | target_phys_addr_t rma_alloc_size, rma_size; |
526 | 4d8d5467 | Benjamin Herrenschmidt | uint32_t initrd_base = 0;
|
527 | 4d8d5467 | Benjamin Herrenschmidt | long kernel_size = 0, initrd_size = 0; |
528 | 4d8d5467 | Benjamin Herrenschmidt | long load_limit, rtas_limit, fw_size;
|
529 | f43e3525 | David Gibson | long pteg_shift = 17; |
530 | 39ac8455 | David Gibson | char *filename;
|
531 | 9fdf0c29 | David Gibson | |
532 | d43b45e2 | David Gibson | spapr = g_malloc0(sizeof(*spapr));
|
533 | d43b45e2 | David Gibson | QLIST_INIT(&spapr->phbs); |
534 | d43b45e2 | David Gibson | |
535 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
536 | 9fdf0c29 | David Gibson | |
537 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
538 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
539 | 354ac20a | David Gibson | |
540 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
541 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
542 | 354ac20a | David Gibson | exit(1);
|
543 | 354ac20a | David Gibson | } |
544 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
545 | 354ac20a | David Gibson | rma_size = rma_alloc_size; |
546 | 354ac20a | David Gibson | } else {
|
547 | 354ac20a | David Gibson | rma_size = ram_size; |
548 | 354ac20a | David Gibson | } |
549 | 354ac20a | David Gibson | |
550 | 4d8d5467 | Benjamin Herrenschmidt | /* We place the device tree and RTAS just below either the top of the RMA,
|
551 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
552 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
553 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit = MIN(rma_size, 0x80000000);
|
554 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE; |
555 | 4d8d5467 | Benjamin Herrenschmidt | spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE; |
556 | 4d8d5467 | Benjamin Herrenschmidt | load_limit = spapr->fdt_addr - FW_OVERHEAD; |
557 | 9fdf0c29 | David Gibson | |
558 | 9fdf0c29 | David Gibson | /* init CPUs */
|
559 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
560 | 6b7a2cf6 | David Gibson | cpu_model = kvm_enabled() ? "host" : "POWER7"; |
561 | 9fdf0c29 | David Gibson | } |
562 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
563 | c7a5c0c9 | David Gibson | env = cpu_init(cpu_model); |
564 | 9fdf0c29 | David Gibson | |
565 | 9fdf0c29 | David Gibson | if (!env) {
|
566 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
567 | 9fdf0c29 | David Gibson | exit(1);
|
568 | 9fdf0c29 | David Gibson | } |
569 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
570 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
571 | 1bba0dc9 | Andreas Färber | qemu_register_reset(spapr_cpu_reset, env); |
572 | 9fdf0c29 | David Gibson | |
573 | 9fdf0c29 | David Gibson | env->hreset_vector = 0x60;
|
574 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
575 | c7a5c0c9 | David Gibson | env->gpr[3] = env->cpu_index;
|
576 | 9fdf0c29 | David Gibson | } |
577 | 9fdf0c29 | David Gibson | |
578 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
579 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
580 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
581 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
582 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
583 | 354ac20a | David Gibson | |
584 | c5705a77 | Avi Kivity | memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
|
585 | c5705a77 | Avi Kivity | vmstate_register_ram_global(ram); |
586 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
587 | 354ac20a | David Gibson | } |
588 | 9fdf0c29 | David Gibson | |
589 | f43e3525 | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
590 | f43e3525 | David Gibson | * later we should probably make it scale to the size of guest
|
591 | f43e3525 | David Gibson | * RAM */
|
592 | a3467baa | David Gibson | spapr->htab_size = 1ULL << (pteg_shift + 7); |
593 | f61b4bed | Alexander Graf | spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size); |
594 | f43e3525 | David Gibson | |
595 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
596 | a3467baa | David Gibson | env->external_htab = spapr->htab; |
597 | c7a5c0c9 | David Gibson | env->htab_base = -1;
|
598 | a3467baa | David Gibson | env->htab_mask = spapr->htab_size - 1;
|
599 | f61b4bed | Alexander Graf | |
600 | f61b4bed | Alexander Graf | /* Tell KVM that we're in PAPR mode */
|
601 | f61b4bed | Alexander Graf | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
602 | f61b4bed | Alexander Graf | ((pteg_shift + 7) - 18); |
603 | f61b4bed | Alexander Graf | env->spr[SPR_HIOR] = 0;
|
604 | f61b4bed | Alexander Graf | |
605 | f61b4bed | Alexander Graf | if (kvm_enabled()) {
|
606 | f61b4bed | Alexander Graf | kvmppc_set_papr(env); |
607 | f61b4bed | Alexander Graf | } |
608 | f43e3525 | David Gibson | } |
609 | f43e3525 | David Gibson | |
610 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
611 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
612 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit - spapr->rtas_addr); |
613 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
614 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
615 | 39ac8455 | David Gibson | exit(1);
|
616 | 39ac8455 | David Gibson | } |
617 | 4d8d5467 | Benjamin Herrenschmidt | if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
618 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
619 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_size, RTAS_MAX_SIZE); |
620 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
621 | 4d8d5467 | Benjamin Herrenschmidt | } |
622 | 7267c094 | Anthony Liguori | g_free(filename); |
623 | 39ac8455 | David Gibson | |
624 | 4d8d5467 | Benjamin Herrenschmidt | |
625 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
626 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
627 | e6c866d4 | David Gibson | spapr->next_irq = 16;
|
628 | b5cec4c5 | David Gibson | |
629 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
630 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
631 | 4040ab72 | David Gibson | |
632 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
633 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
634 | d601fac4 | David Gibson | spapr_vty_create(spapr->vio_bus, serial_hds[i]); |
635 | 4040ab72 | David Gibson | } |
636 | 4040ab72 | David Gibson | } |
637 | 9fdf0c29 | David Gibson | |
638 | 3384f95c | David Gibson | /* Set up PCI */
|
639 | 3384f95c | David Gibson | spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
|
640 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_ADDR, |
641 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_SIZE, |
642 | 3384f95c | David Gibson | SPAPR_PCI_IO_WIN_ADDR); |
643 | 3384f95c | David Gibson | |
644 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
645 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
646 | 8d90ad90 | David Gibson | |
647 | 8d90ad90 | David Gibson | if (!nd->model) {
|
648 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
649 | 8d90ad90 | David Gibson | } |
650 | 8d90ad90 | David Gibson | |
651 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
652 | d601fac4 | David Gibson | spapr_vlan_create(spapr->vio_bus, nd); |
653 | 8d90ad90 | David Gibson | } else {
|
654 | 3384f95c | David Gibson | pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
655 | 8d90ad90 | David Gibson | } |
656 | 8d90ad90 | David Gibson | } |
657 | 8d90ad90 | David Gibson | |
658 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
659 | d601fac4 | David Gibson | spapr_vscsi_create(spapr->vio_bus); |
660 | 6e270446 | Ben Herrenschmidt | } |
661 | 6e270446 | Ben Herrenschmidt | |
662 | 4d8d5467 | Benjamin Herrenschmidt | if (rma_size < (MIN_RMA_SLOF << 20)) { |
663 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
664 | 4d8d5467 | Benjamin Herrenschmidt | "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
665 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
666 | 4d8d5467 | Benjamin Herrenschmidt | } |
667 | 4d8d5467 | Benjamin Herrenschmidt | |
668 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "sPAPR memory map:\n");
|
669 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "RTAS : 0x%08lx..%08lx\n",
|
670 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)spapr->rtas_addr, |
671 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)(spapr->rtas_addr + spapr->rtas_size - 1)); |
672 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "FDT : 0x%08lx..%08lx\n",
|
673 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)spapr->fdt_addr, |
674 | 4d8d5467 | Benjamin Herrenschmidt | (unsigned long)(spapr->fdt_addr + FDT_MAX_SIZE - 1)); |
675 | 4d8d5467 | Benjamin Herrenschmidt | |
676 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
677 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
678 | 9fdf0c29 | David Gibson | |
679 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
680 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
681 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
682 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
683 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
684 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - KERNEL_LOAD_ADDR); |
685 | 9fdf0c29 | David Gibson | } |
686 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
687 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
688 | 9fdf0c29 | David Gibson | kernel_filename); |
689 | 9fdf0c29 | David Gibson | exit(1);
|
690 | 9fdf0c29 | David Gibson | } |
691 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Kernel : 0x%08x..%08lx\n",
|
692 | 4d8d5467 | Benjamin Herrenschmidt | KERNEL_LOAD_ADDR, KERNEL_LOAD_ADDR + kernel_size - 1);
|
693 | 9fdf0c29 | David Gibson | |
694 | 9fdf0c29 | David Gibson | /* load initrd */
|
695 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
696 | 4d8d5467 | Benjamin Herrenschmidt | /* Try to locate the initrd in the gap between the kernel
|
697 | 4d8d5467 | Benjamin Herrenschmidt | * and the firmware. Add a bit of space just in case
|
698 | 4d8d5467 | Benjamin Herrenschmidt | */
|
699 | 4d8d5467 | Benjamin Herrenschmidt | initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff; |
700 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
701 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - initrd_base); |
702 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
703 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
704 | 9fdf0c29 | David Gibson | initrd_filename); |
705 | 9fdf0c29 | David Gibson | exit(1);
|
706 | 9fdf0c29 | David Gibson | } |
707 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Ramdisk : 0x%08lx..%08lx\n",
|
708 | 4d8d5467 | Benjamin Herrenschmidt | (long)initrd_base, (long)(initrd_base + initrd_size - 1)); |
709 | 9fdf0c29 | David Gibson | } else {
|
710 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
711 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
712 | 9fdf0c29 | David Gibson | } |
713 | 4d8d5467 | Benjamin Herrenschmidt | } |
714 | a3467baa | David Gibson | |
715 | 4d8d5467 | Benjamin Herrenschmidt | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
716 | 4d8d5467 | Benjamin Herrenschmidt | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
717 | 4d8d5467 | Benjamin Herrenschmidt | if (fw_size < 0) { |
718 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
719 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
720 | 4d8d5467 | Benjamin Herrenschmidt | } |
721 | 4d8d5467 | Benjamin Herrenschmidt | g_free(filename); |
722 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Firmware load : 0x%08x..%08lx\n",
|
723 | 4d8d5467 | Benjamin Herrenschmidt | 0, fw_size);
|
724 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "Firmware runtime : 0x%08lx..%08lx\n",
|
725 | 4d8d5467 | Benjamin Herrenschmidt | load_limit, (unsigned long)spapr->fdt_addr); |
726 | 4d8d5467 | Benjamin Herrenschmidt | |
727 | 4d8d5467 | Benjamin Herrenschmidt | spapr->entry_point = 0x100;
|
728 | 4d8d5467 | Benjamin Herrenschmidt | |
729 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF will startup the secondary CPUs using RTAS */
|
730 | 4d8d5467 | Benjamin Herrenschmidt | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
731 | 4d8d5467 | Benjamin Herrenschmidt | env->halted = 1;
|
732 | 9fdf0c29 | David Gibson | } |
733 | 9fdf0c29 | David Gibson | |
734 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
735 | 354ac20a | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size, |
736 | a3467baa | David Gibson | initrd_base, initrd_size, |
737 | 4d8d5467 | Benjamin Herrenschmidt | kernel_size, |
738 | a3467baa | David Gibson | boot_device, kernel_cmdline, |
739 | a3467baa | David Gibson | pteg_shift + 7);
|
740 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
741 | 9fdf0c29 | David Gibson | |
742 | a3467baa | David Gibson | qemu_register_reset(spapr_reset, spapr); |
743 | 9fdf0c29 | David Gibson | } |
744 | 9fdf0c29 | David Gibson | |
745 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
746 | 9fdf0c29 | David Gibson | .name = "pseries",
|
747 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
|
748 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
749 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
750 | 9fdf0c29 | David Gibson | .no_parallel = 1,
|
751 | 6e270446 | Ben Herrenschmidt | .use_scsi = 1,
|
752 | 9fdf0c29 | David Gibson | }; |
753 | 9fdf0c29 | David Gibson | |
754 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
755 | 9fdf0c29 | David Gibson | { |
756 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
757 | 9fdf0c29 | David Gibson | } |
758 | 9fdf0c29 | David Gibson | |
759 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |