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PPC: 405: Fix ppc405ep initialization
When trying to run a ppc405 guest, it segfaults quite quickly, trying toaccess timers that weren't initialized. Initialize them properly instead.
Reported-by: Andreas Faerber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
ppc hw/: Don't use CPUState
Scripted conversion: for file in hw/ppc*.[hc] hw/mpc8544_guts.c hw/spapr*.[hc] hw/virtex_ml507.c hw/xics.c; do sed -i "s/CPUState/CPUPPCState/g" $file done
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
PPC: 405: Use proper CPU reset
On ppc405ep there is a register that allows for software to reset thecore, but not the whole system. Implement this reset using a resetinterrupt.
This gets rid of a bunch of #if 0'ed code.
Reported-by: Andreas Färber <afaerber@suse.de>...
vmstate, memory: decouple vmstate from memory API
Currently creating a memory region automatically registers it forlive migration. This differs from other state (which is enumeratedin a VMStateDescription structure) and ties the live migration codeinto the memory core....
serial: Add MemoryRegion parameter to serial_mm_init
Remove the get_system_memory() call from serial_mm_init, pushingit back into the callers. In many cases we already have thesystem memory region available.
Signed-off-by: Richard Henderson <rth@twiddle.net>...
ppc405: Pass in address_space_mem to ppc405{cr, ep}_init
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Avi Kivity <avi@redhat.com>
serial: Use enum device_endian in serial_mm_init parameter
The use of DEVICE_NATIVE_ENDIAN cleans up lots of ifdefs inmany of the callers.
serial: Remove ioregister parameter from serial_mm_init
All callers passed 1.
ppc4xx_sdram: convert to memory API
Clumsy due to the lack of clipping support, needed forchanging exposed ram size.
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ppc405_uc: convert to memory API
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ppc405_uc: use specific endian ld/st_phys
Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
change all other clock references to use nanosecond resolution accessors
This was done with:
sed -i 's/qemu_get_clock\>/qemu_get_clock_ns/' \ $(git grep -l 'qemu_get_clock\>' ) sed -i 's/qemu_new_timer\>/qemu_new_timer_ns/' \ $(git grep -l 'qemu_new_timer\>' )...
ppc405_uc: fix a buffer overflow
Fix a buffer overflow, reported by cppcheck:[/src/qemu/hw/ppc405_uc.c:72]: (error) Buffer access out-of-bounds: bd.bi_s_version
The use of field bi_s_version seems to be a typo, it should bebi_r_version.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. Thetarget endianness is not of their concern, so we need to push thingsdown a level.
This patch adds a parameter to cpu_register_io_memory that allows adevice to choose its endianness. For now, all devices simply choose...
Delete write only variables
Compiling with GCC 4.6.0 20100925 produced warnings like:/src/qemu/net/tap-win32.c: In function 'tap_win32_open':/src/qemu/net/tap-win32.c:582:12: error: variable 'hThread' set but not used [-Werror=unused-but-set-variable]...
qemu_ram_alloc: Add DeviceState and name parameters
These will be used to generate unique id strings for ramblocks. The namefield is required, the device pointer is optional as most callers don'thave a device. When there's no device or the device isn't a child of...
ppc: add missing 'break', spotted by clang analyzer
Compile serial only once
Push TARGET_WORDS_BIGENDIAN dependency to board level.
PPC: Make DCR uint32_t
For what I know DCR is always 32 bits wide, so we should also use uint32_t topass it along the stacks.
This fixes a warning when compiling qemu-system-ppc64 with KVM enabled, makingit compile without --disable-werror
Signed-off-by: Alexander Graf <agraf@suse.de>...
PPC: rename cpu_ppc_reset to cpu_reset for consistency
PPC: remove unneeded calls to device reset
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
Unexport ticks_per_sec variable. Create get_ticks_per_sec() function
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Make CPURead/WriteFunc structure 'const'
Replace local ADDRX/PADDRX macros with TARGET_FMT_lx/plx
PPC: clean up ppc405
Rely on the subpage system instead of the local version.Make most functions "static".Fix wrong parameter passed to ppc4xx_pob_reset.
Revert "Introduce reset notifier order"
This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (andupdates later added users of qemu_register_reset), we solved theproblem it originally addressed less invasively.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
Introduce reset notifier order
Add the parameter 'order' to qemu_register_reset and sort callbacks onregistration. On system reset, callbacks with lower order will beinvoked before those with higher order. Update all existing users to thestandard order 0....
Yet more phys_ram_base elimination.
Signed-off-by: Paul Brook <paul@cofdesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7067 c046a42c-6fe2-441c-8c8c-71466251a162
hw: remove error handling from qemu_malloc() callers (Avi Kivity)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc: rename ppc405_sdram_init() to ppc4xx_sdram_init()
The SDRAM controller is shared across almost all 405 and 440 embeddedprocessors, with some slight differences such as the sizes supported for eachmemory bank.
Rename only; no functional changes....
target-ppc: move PPC4xx SDRAM controller emulation from ppc405_uc.c to ppc4xx_devs.c
Code movement only; no functional changes....
Use qemu-log.h
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5413 c046a42c-6fe2-441c-8c8c-71466251a162
8250: Customized base baudrate
(Jan Kiszka)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4336 c046a42c-6fe2-441c-8c8c-71466251a162
qemu ppc uic: Order IRQ bit number as described in the UIC documentation.
(Hollis Blanchard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4273 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC debug print fixes - hardware emulation pass.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3726 c046a42c-6fe2-441c-8c8c-71466251a162
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
Temporary hack to avoid Qemu crash at PowerPC reset time.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3482 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC target optimisations: make intensive use of always_inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
Share devices that might be useful for all PowerPC 40x & 440 implementations (mostly CPU registration and UIC, for now).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3340 c046a42c-6fe2-441c-8c8c-71466251a162
We must reset the PowerPC CPU after registering it, as hardware reset effect is implementation dependant.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3323 c046a42c-6fe2-441c-8c8c-71466251a162
Compilation fix (forgotten patch).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3304 c046a42c-6fe2-441c-8c8c-71466251a162
Add flags to support PowerPC 405 bootinfos variations.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3245 c046a42c-6fe2-441c-8c8c-71466251a162
Always keep the bootinfo structure in the first 16 MB, as suggested by Andrew May.Fix compilation warnings introduced by variables types changes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3183 c046a42c-6fe2-441c-8c8c-71466251a162
Coding style fixes in PowerPC related code (no functional change):- avoid useless blanks at EOL.- avoid tabs.- fix wrapping lines on 80 chars terminals.- add missing ';' at macros EOL to avoid confusing auto-identers.- fix identation.- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)...
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Fix incorrect target_ulong use in hw devices
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2962 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC 405 microcontrollers fixes and improvments:- use target_phys_addr_t for physical addresses / offsets- implement fake general purpose timers and memory access layer for PowerPC 405EP- more assigned internal IRQs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2716 c046a42c-6fe2-441c-8c8c-71466251a162
Move PowerPC 405 specific definitions into a separate filePreliminary code for -kernel option support for PowerPC 405 boardsFix DBSR in case of PowerPC 405 chip resetAdd enums for PowerPC 405 clocks.Fix IRQ numbers (IBM reversed bits numbering...)Fix SPRG4-7 read access right...
Add callbacks to allow dynamic change of PowerPC clocks (to be improved)Fix embedded PowerPC watchdog and timersFix PowerPC 405 SPRAdd generic PowerPC 405 core instanciation code + resets support.Implement simple peripherals shared by most PowerPC 405 implementations...