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# Date Author Comment
1768ec06 10/13/2013 02:19 am Richard Henderson

tcg-ppc64: Support new ldst opcodes

Signed-off-by: Richard Henderson <>
f713d6ad 10/10/2013 11:19 pm Richard Henderson

tcg: Add qemu_ld_st_i32/64

Step two in the transition, adding the new ldst opcodes. Keep the old
opcodes around until all backends support the new opcodes.

Signed-off-by: Richard Henderson <>
03271524 09/02/2013 07:08 pm Richard Henderson

tcg: Add muluh and mulsh opcodes

Use them in places where mulu2 and muls2 are used.
Optimize mulx2 with dead low part to mulxh.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
32f5717f 09/02/2013 07:08 pm Richard Henderson

tcg-ppc64: Implement muluh, mulsh

Using these instead of mulu2 and muls2 lets us avoid having to argument
overlap analysis in the backend. Normal register allocation will DTRT.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
5b9f72ab 07/09/2013 05:14 pm Richard Henderson

tcg-ppc64: Don't implement rem

Reviewed-by: Andreas Färber <>
Signed-off-by: Richard Henderson <>
ca675f46 07/09/2013 05:14 pm Richard Henderson

tcg: Split rem requirement from div requirement

There are several hosts with only a "div" insn. Remainder is computed
manually from the quotient and inputs. We can do this generically.

Reviewed-by: Peter Maydell <>
Signed-off-by: Richard Henderson <>
027ffea9 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement movcond

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
6c858762 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement add2/sub2_i64

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
6645c147 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement mulu2/muls2_i64

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
33de9ed2 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement deposit

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
68aebd45 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement bswap64

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
ce1010d6 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement compound logicals

Mostly copied from the ppc32 port.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
5d221582 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement bswap16 and bswap32

Signed-off-by: Richard Henderson <>
313d91c7 04/15/2013 08:55 pm Richard Henderson

tcg-ppc64: Implement rotates

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
28f2dba6 04/15/2013 08:55 pm Richard Henderson

tcg-ppc64: Use automatic implementation of ext32u_i64

The enhancements to and immediate obviate this.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
a9249dff 04/15/2013 08:55 pm Richard Henderson

tcg-ppc64: Improve and_i32 with constant

Use RLWINM

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
e6a72734 02/23/2013 07:25 pm Richard Henderson

tcg: Make 32-bit multiword operations optional for 64-bit hosts

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
d7156f7c 02/23/2013 07:25 pm Richard Henderson

tcg: Add 64-bit multiword arithmetic operations

Matching the 32-bit multiword arithmetic that we already have.

Signed-off-by: Blue Swirl <>
4d3203fd 02/23/2013 07:25 pm Richard Henderson

tcg: Add signed multiword multiplication operations

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
cb9c377f 12/19/2012 09:31 am Paolo Bonzini

janitor: add guards to headers

Signed-off-by: Paolo Bonzini <>
07e10e5d 10/12/2012 02:27 pm Peter Maydell

tcg: Remove TCG_TARGET_HAS_GUEST_BASE define

GUEST_BASE support is now supported by all TCG backends, and is
now mandatory. Drop the now-pointless TCG_TARGET_HAS_GUEST_BASE
define (set by every backend) and the error if it is unset.

Signed-off-by: Peter Maydell <>...
ffc5ea09 09/21/2012 08:53 pm Richard Henderson

tcg: Introduce movcond

Implemented with setcond if the target does not provide
the optional opcode.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
771142c2 11/14/2011 06:47 pm Richard Henderson

tcg: Standardize on TCGReg as the enum for hard registers

Most targets did not name the enum; tci used TCGRegister.

Signed-off-by: Richard Henderson <>
Reviewed-by: Andreas Färber <>
Reviewed-by: Stefan Weil <>...
840f5861 10/01/2011 09:11 am Stefan Weil

tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h

It is now declared for all tcg targets in tcg.h,
so the tcg target specific declarations are redundant.

Signed-off-by: Stefan Weil <>
Signed-off-by: Blue Swirl <>
0bf1dbdc 08/22/2011 05:26 pm malc

tcg/ppc64: fix 16/32 mixup

Signed-off-by: malc <>
157f2662 08/22/2011 01:40 pm malc

tcg/ppc64: implement not_i32/64 and ext32u_i64

Signed-off-by: malc <>
25c4d9cc 08/21/2011 09:52 pm Richard Henderson

tcg: Always define all of the TCGOpcode enum members.

By always defining these symbols, we can eliminate a lot of ifdefs.

To allow this to be checked reliably, the semantics of the
TCG_TARGET_HAS_* macros must be changed from def/undef to true/false.
This allows even more ifdefs to be removed, converting them into...
2bece2c8 06/16/2010 12:29 pm Richard Henderson

tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.

Some hosts (amd64, ia64) have an ABI that ignores the high bits
of the 64-bit register when passing 32-bit arguments. Others
require the value to be properly sign-extended for the type.
I.e. "int32_t" must be sign-extended and "uint32_t" must be...
32d98fbd 03/26/2010 10:52 pm Richard Henderson

tcg: Allow target-specific implementation of NOR.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
9940a96b 03/26/2010 10:44 pm Richard Henderson

tcg: Allow target-specific implementation of NAND.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
8d625cf1 03/26/2010 10:42 pm Richard Henderson

tcg: Allow target-specific implementation of EQV.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
a63b5829 03/26/2010 09:48 pm Paolo Bonzini

remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>
d34f4baf 02/22/2010 08:56 pm malc

tcg/ppc64: Use C90 style comments

Signed-off-by: malc <>
36828256 02/20/2010 10:35 am Richard Henderson

tcg: Add comments for all optional instructions not implemented.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
f6548c0a 07/18/2009 12:16 pm malc

PPC 32/64 GUEST_BASE support

Signed-off-by: malc <>
e63d7abd 03/08/2009 04:45 pm blueswir1

Prune unused TCG_AREGs

Remove definitions for TCG_AREGs corresponding to AREG definitions
removed in r6778.

Signed-off-by: Stuart Brady <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6779 c046a42c-6fe2-441c-8c8c-71466251a162
902b3d5c 12/10/2008 09:18 pm malc

Introduce and use cache-utils.[ch]

Thanks to Segher Boessenkool and Holis Blanchard.

AIX and Darwin cache inquiry:
http://gcc.gnu.org/ml/gcc-patches/2007-08/msg00388.html

Auxiliary vectors:
http://manugarg.googlepages.com/aboutelfauxiliaryvectors

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5973 c046a42c-6fe2-441c-8c8c-71466251a162
e7d05e6f 07/25/2008 01:56 am malc

Use proper value for TCG_TARGET_CALL_STACK_OFFSET

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4941 c046a42c-6fe2-441c-8c8c-71466251a162
e46b9681 07/23/2008 11:01 pm malc

Provide extNs_M instructions

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4934 c046a42c-6fe2-441c-8c8c-71466251a162
810260a8 07/23/2008 10:17 pm malc

Preliminary PPC64/Linux host support

ppc64.ld from Heikki Lindholm's patch
http://marc.info/?l=qemu-devel&m=114086179024634&w=2

Issues:
x86_64 tripple faults shortly after decompressing the kernel
No immediate versions of most 64 bit operations
More...
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