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target-s390x: QOM'ify CPU
Embed CPUS390XState as first member of S390CPU.Since -cpu is being ignored, make TYPE_S390_CPU non-abstract.
Signed-off-by: Andreas Färber <afaerber@suse.de>Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Merge remote-tracking branch 'stefanha/tracing' into staging
Merge branch 'qom-cpu-unicore32.v3' of git://github.com/afaerber/qemu-cpu
Makefile.target: code stp dependency on trace-events
Signed-off-by: Alon Levy <alevy@redhat.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
target-unicore32: QOM'ify CPU
Embed CPUUniCore32State as first member of UniCore32CPU.
Contributed under GPLv2+.
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
target-arm: Minimalistic CPU QOM'ification
Introduce only one non-abstract type TYPE_ARM_CPU and do not touchcp15 registers to not interfere with Peter's ongoing remodelling.Embed CPUARMState as first (additional) field of ARMCPU.
Let CPUClass::reset() call cpu_state_reset() for now....
target-alpha: Move memory helpers to mem_helper.c.
This completes the transition away from AREG0. This patch mustbe last because it requires CONFIG_TCG_PASS_AREG0 set too.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-alpha: Move palcode support helpers to sys_helper.c.
target-alpha: Move floating-point helpers to fpu_helper.c.
target-alpha: Move integer helpers to int_helper.c.
get rid of CONFIG_VIRTIO_SCSI
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Sparc: avoid AREG0 wrappers for memory access helpers
Adjust generation of load and store templates so that the functionstake a parameter for CPUState instead of relying on global env.
Remove wrappers. Move remaining memory helpers to ldst_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc: avoid AREG0 for memory access helpers
Make memory access helpers take a parameter for CPUState insteadof relying on global env. Introduce wrappers for load and store ops.
Merge remote-tracking branch 'kraxel/usb.44' into staging
qom: Add QOM support to user emulators
Link the Object base class and the module infrastructure for classregistration. Introduce $(universal-obj-y) for objects that are morecommon than $(common-obj-y), so that those only get built once.
Call QOM module init for type registration....
usb: the big rename
Reorganize usb source files. Create a new hw/usb/ directory and moveall usb source code to that place. Also make filenames a bit moredescriptive. Host adapters are prefixed with "hch-" now, usb deviceemulations are prefixed with "dev-". Fixup paths Makefile and include...
kvm: x86: Add user space part for in-kernel i8254
This provides the required user space stubs to enable the in-kerneli8254 emulation of KVM.
The in-kernel model supports lost tick compensation according to the"delay" policy. This is enabled by default and can be switched off via a...
cadence_uart: initial version of device model
Implemented cadence UART serial controller
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>Signed-off-by: John Linn <john.linn@xilinx.com>Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>...
cadence_ttc: initial version of device model
Implemented cadence Triple Timer Counter (TCC)
cadence_gem: initial version of device model
Device model for cadence gem ethernet controller.
xilinx_zynq: machine model initial version
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specificsystem level control register (SLCR) module.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>...
microblaze: factored out common boot code
factored out the copy-pasted common boot code from the two microblaze platformsinto a dedicated microblaze bootloader (microblaze_boot.o).
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>...
Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
arm: add device tree support
If compiled with CONFIG_FDT, allow user to specify a device tree file usingthe -dtb argument. If the machine supports it then the dtb will be loadedinto memory and passed to the kernel on boot.
Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>...
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
Merge remote-tracking branch 'bonzini/virtio-scsi' into staging
jazz-led: compile it only twice
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
hw/pc: move rom init to pc_sysfw.c
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
virtio-scsi: Add virtio-scsi stub device
Add a useless virtio SCSI HBA device:
qemu -device virtio-scsi-pci
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
kvmvapic: Introduce TPR access optimization for Windows guests
This enables acceleration for MMIO-based TPR registers accesses of32-bit Windows guest systems. It is mostly useful with KVM enabled,either on older Intel CPUs (without flexpriority feature, can also be...
hw/a15mpcore.c: Add Cortex-A15 private peripheral model
Add a model of the Cortex-A15 memory mapped private peripheralspace. This is fairly simple because the only memory mappedbit of the A15 is the GIC.
Note that we don't currently model a VGIC and therefore don't...
Exynos4210: added display controller implementation
Exynos4210 display controller (FIMD) has 5 hardware windows with alpha andchroma key blending functions.
Signed-off-by: Mitsyanko Igor <i.mitsyanko@samsung.com>Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>...
ARM: exynos4210: MCT support.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
ARM: exynos4210: basic Power Management Unit implementation
Patch adds basic model for Exynos4210 SoC PMU.This model implements PMU registers just as a bulk of memory. Currently,the only reason this device exists is that secondary CPU boot loaderuses PMU INFORM5 register as a holding pen....
ARM: exynos4210: PWM support.
ARM: exynos4210: UART support
Add basic support of exynos4210 UART
Signed-off-by: Maksim Kozlov <m.kozlov@samsung.com>Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
ARM: Samsung exynos4210-based boards emulation
Add initial support of NURI and SMDKC210 boards
ARM: exynos4210: IRQ subsystem support.
make: Remove duplicate use of GLIB_CFLAGS
Makefile, Makefile.hw, Makefile.target and libcacard/Makefileadded GLIB_CFLAGS to QEMU_CFLAGS.
Makefile.objs does this, too, and is included by all otherMakefiles, so GLIB_CFLAGS were added twice (reported by malc)....
w32: Build windows and console executables
System emulation executables with SDL are typically windowsexecutables. Sometimes console executables are more useful,so create both variants if linker option -mwindows was detected.
v2:This version uses QEMU_PROGW / QEMU_PROG instead of QEMU_PROG / QEMU_PROGC....
qom: add the base Object class (v2)
This class provides the main building block for QEMU Object Model and isextensively documented in the header file. It is largely inspired by GObject.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>---v1 -> v2...
arm: SoC model for Calxeda Highbank
Adds support for Calxeda's Highbank SoC.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Add xgmac ethernet model
This adds very basic support for the xgmac ethernet core. Missing thingsinclude:
- statistics counters- WoL support- rx checksum offload- chained descriptors (only linear descriptor ring)- broadcast and multicast handling
Signed-off-by: Rob Herring <rob.herring@calxeda.com>...
vga: compile cirrus_vga in hwlib
Remove target dependencies and compile Cirrus VGA in hwlib.
Address masking can be removed since memory API handles that now.
hyperv: fix build on non-KVM hosts
vga: make Cirrus ISA device optional
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
PPC: Bamboo: fold ppc440.c and ppc440_bamboo.c into a single file
The separation of ppc440 and ppc440_bamboo makes some sense, since ppc440is the SoC while ppc440_bamboo is the actual board. But the separationmakes things harder for us for no good reason, so let's just fold them...
kvm: x86: Add user space part for in-kernel APIC
This introduces the alternative APIC device which makes use of KVM'sin-kernel device model. External NMI injection via LINT1 is emulated bychecking the current state of the in-kernel APIC, only injecting a NMI...
kvm: x86: Add user space part for in-kernel i8259
Introduce the alternative 'kvm-i8259' device model that exploits KVMin-kernel acceleration.
The PIIX3 initialization code is furthermore extended by KVM specificIRQ route setup. GSI injection differs in KVM mode from the user space...
kvm: x86: Add user space part for in-kernel IOAPIC
This introduces the KVM-accelerated IOAPIC model 'kvm-ioapic' andextends the IRQ routing setup by the 0->2 redirection when needed.
The kvm-ioapic model has a property that allows to define its GSI base...
ioapic: Factor out base class for KVM reuse
Split up the IOAPIC analogously to APIC and i8259. KVM will share theIOAPICCommonState, the vmstate, reset logic and certain init parts withthe user space model.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
apic: Factor out base class for KVM reuse
The KVM in-kernel APIC model will reuse parts of the user space modelwhile providing the same frontend view to guest and most managementinterfaces.
Factor out an APIC base class to encapsulate those parts that will be...
kvm: Move kvmclock into hw/kvm folder
More KVM-specific devices will come, so let's start with moving thekvmclock into a dedicated folder.
hyper-v: introduce Hyper-V support infrastructure.
[Jan: fix build with CONFIG_USER_ONLY]
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Merge branch 's390-next' of git://repo.or.cz/qemu/agraf
Merge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into staging
add L2x0/PL310 cache controller device
This is just a dummy device for ARM L2 cache controllers, based on thepl310. The cache type parameter can be defined by a property valueand has a meaningful default.
vmstate, memory: decouple vmstate from memory API
Currently creating a memory region automatically registers it forlive migration. This differs from other state (which is enumeratedin a VMStateDescription structure) and ties the live migration codeinto the memory core....
Compile device-hotplug on all targets
All guest targets could potentially implement hotplugging. With the nextpatches in this set I will also reflect this in the monitor interface.
So let's always compile it in. It shouldn't hurt.
Signed-off-by: Alexander Graf <agraf@suse.de>
Makefile.target: Remove unnecessary dependency rules
Remove some dependency rules which aren't necessary (the automaticallygenerated .d files cover all these). These were leftovers from dyngendays, when the object files also had a dependency on some generated...
Merge remote-tracking branch 'stefanha/trivial-patches-next' into staging
syborg: drop support for Symbian Virtual Platform
The Symbian Virtual Platform was an ARM-based development and debuggingboard. Since Symbian has been disbanded and the code is no longer beingused it can now be removed.
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>...
hw/arm_mptimer.c: Turn ARM MPcore private timers into qdev devices
Turn the ARM MPcore private timer/watchdog blocks into separateqdev devices. This will allow us to share them neatly between11MPCore and A9MPcore.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Makefile.target: Remove out of date comment
Remove the out of date comment, i.e., "# libqemu" since libqemu.a is notavailable anymore.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Merge branch 'tci' of git://qemu.weilnetz.de/qemu
Merge branch 'ppc-next' of git://repo.or.cz/qemu/agraf
tcg: Add tcg interpreter to configure / make
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Add AACI audio playback support to the ARM Versatile/PB platform
This driver emulates the ARM AACI interface (PL041) connected to a LM4549 codec.It enables audio playback for the Versatile/PB platform.
Limitations:- Supports only a playback on one channel (Versatile/Vexpress)...
pseries: Add partial support for PCI
This patch adds a PCI bus to the pseries machine. This instantiatesthe qemu generic PCI bus code, advertises a PCI host bridge in theguest's device tree and implements the RTAS methods specified by PAPRto access PCI config space. It also sets up the memory regions we...
Sparc: split load and store op helpers
Move load and store op helpers top ldst_helper.c.
Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc: split MMU helpers
Move MMU helpers to mmu_helper.c.
Sparc: avoid AREG0 for CWP and PSTATE helpers
Make CWP and PSTATE helpers take a parameter for CPUState insteadof relying on global env. Remove wrapper functions.
Sparc: split CWP and PSTATE op helpers
Move CWP and PSTATE op helpers to win_helper.c.
Sparc: avoid AREG0 for lazy condition code helpers
Make lazy condition code helpers take a parameter for CPUState insteadof relying on global env.
Sparc: split lazy condition code handling op helpers
Move lazy condition code handling op helpers to cc_helper.c.
Sparc: avoid AREG0 for float and VIS ops
Make floating point and VIS ops take a parameter for CPUState insteadof relying on global env.
Sparc: split FPU and VIS op helpers
Move FPU op helpers to fop_helper.c. Move VIS op helpers to vis_helper.c,compile it only for Sparc64.
Sparc: split helper.c
Move CPU init to cpu_init.c and interrupt handling to int32_helper.cfor Sparc32 and int64_helper.c for Sparc64.
i8259: Move to hw library
No target-specific bits remaining, let's move it over.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: add Avnet LX60/LX110/LX200 boards
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60,96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550UART. FPGA may be loaded with almost any Tensilica processor. It is also...
target-xtensa: rename dc232b board to sim
This is to get aligned with the linux name for this machine.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: add fsf core
This is FSF big endian core implemented through linux overlay.
target-xtensa: add dc232b core
This is Diamond 232L Standard Core Rev.B (LE), implemented throughlinux/gdb overlay.
target-xtensa: remove hand-written xtensa cores implementations
Merge remote-tracking branch 'qemu-kvm-tmp/memory/batch' into staging
Introduce PortioList
Add a type and methods for manipulating a list of disjoint I/O ports,used in some older hardware devices.
Based on original patch by Richard Henderson.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Avi Kivity <avi@redhat.com>
Merge remote-tracking branch 'qmp/queue/qmp' into staging
target-alpha: Add CLIPPER emulation.
This is a DP264 variant, SMP capable, no unusual hardware present.
The emulation does not currently include any PCI IOMMU code.Hopefully the generic support for that can be merged to HEAD soon.
Signed-off-by: Richard Henderson <rth@twiddle.net>
PPC: booke timers
While working on the emulation of the freescale p2010 (e500v2) I realized thatthere's no implementation of booke's timers features. Currently mpc8544 usesppc_emb (ppc_emb_timers_init) which is close but not exactly like booke (forexample booke uses different SPR)....
PPC: Add new target config for pseries
We only support -M pseries when certain prerequisites are met, suchas a PPC64 guest and libfdt. To only gather these requirements ina single place, this patch introduces a new CONFIG_PSERIES variablethat gets set when all prerequisites are met....
PPC: E500: Add PV spinning code
CPUs that are not the boot CPU need to run in spinning code to check if theyshould run off to execute and if so where to jump to. This usually happensby leaving secondary CPUs looping and checking if some variable in memory...
PPC: Move openpic to target specific code compilation
The MPIC has some funny feature where it maps different registers to an MMIOregion depending which CPU accesses them.
To be able to reflect that, we need to make OpenPIC be compiled in the targetcode, so it can access cpu_single_env....
qapi: use middle mode in QMP server
Use the new middle mode within the existing QMP server.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
build: Move tracing objects into libuser on usermode emulation targets
This will apply libuser-specific compilation flags (like the ones added by--enable-user-pie), but keep softmmu emulation targets "as-is".
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>...
target-xtensa: add dc232b core and board
This is Diamond 232L Standard Core Rev.B (LE).
target-xtensa: implement SIMCALL
Tensilica iss provides support for applications running in freestandingenvironment through SIMCALL command. It is used by Tensilica libc toaccess argc/argv, for file I/O, etc.
Note that simcalls that accept buffer addresses expect virtual addresses....
target-xtensa: add target stubs
target-xtensa: add sample board
Sample board and sample CPU core are used for debug and may be used fordevelopment of custom SoC emulators.
This board has two fixed size memory regions for DTCM and ITCM andvariable length SRAM region.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>...
g364fb: compile in hwlib
Compile g364fb in hwlib. Two compilations less for the full build.
Acked-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>