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Use float32/64 instead of float/double
The patch below uses the float32 and float64 types instead of the floatand double types in the PPC code. This doesn't change anything whenusing softfloat-native as the types are the same, but that helpscompiling the PPC target with softfloat....
Add new sane low-level memory accessors for PowerPC that do proper size or zero extension, with homogenous names.Fix load & store strings: those are now endian-sensitive, by definition.Fix dcbz: must always align the target address to a cache line boundary....
For consistency, align the address to the cache line before using it, when invalidating the instruction cache.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3449 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC target optimisations: make intensive use of always_inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
Make PowerPC cache line size implementation dependant.Implement dcbz tunable cache line size for PowerPC 970.Make hardware reset vector implementation dependant.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC target cleanups:- remove unuseful historical macros and definitions- fix comments (bugs and cosmetics)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3185 c046a42c-6fe2-441c-8c8c-71466251a162
Coding style fixes in PowerPC related code (no functional change):- avoid useless blanks at EOL.- avoid tabs.- fix wrapping lines on 80 chars terminals.- add missing ';' at macros EOL to avoid confusing auto-identers.- fix identation.- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)...
As icbi is not a priviledge instruction and is treated as a load by the MMUit needs to be implemented for every MMU translation mode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2492 c046a42c-6fe2-441c-8c8c-71466251a162
Make it safe to use 64 bits GPR and/or 64 bits host registers.For "symetry", add 64 bits versions of all modified functions.As a side effect, add a lot of code provision for PowerPC 64 support.Move overflow and carry checks in common routines for simple cases....
Great PowerPC emulation code resynchronisation and improvments:- Add status file to make regression tracking easier- Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c- Update copyrights- Add new / missing PowerPC CPU definitions...
added back loglevel test
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1442 c046a42c-6fe2-441c-8c8c-71466251a162
removed dynamic test of traces
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1440 c046a42c-6fe2-441c-8c8c-71466251a162
This patch adds little-endian mode support to PPC emulation.This is needed by OS/2 and Windows NT and some programs like VirtualPC.This patch has been tested using OS/2 bootloader (thanks to TeroKaarlela).(Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1379 c046a42c-6fe2-441c-8c8c-71466251a162
64 bit target support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
suppressed explicit access type and use the exception routine to infer it from the micro operation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@529 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC system emulation (Jocelyn Mayer) - modified patch to use new TLB api
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@528 c046a42c-6fe2-441c-8c8c-71466251a162