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target-xtensa: implement CPENABLE and PRID SRs
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: add sample board
Sample board and sample CPU core are used for debug and may be used fordevelopment of custom SoC emulators.
This board has two fixed size memory regions for DTCM and ITCM andvariable length SRAM region.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>...